No full-text available
To read the full-text of this research,
you can request a copy directly from the authors.
Parallel interconnection of two 64*32 symmetric selfelectro-optic effect device arrays
Abstract
The cascaded, parallel operation of two 2-dimensional arrays of 2048 symmetric selfelectro-optic effect devices (S-SEEDs) is demonstrated. Bistable operation of both arrays and cascading of information from each array to the other are shown. The system is compact, tolerant to misalignment, stable and extensible.
Over the last years considerable progress has been made in semiconductor optoelectronics because of the needs of optical telecommunications and the emergence of new fields. Today, semiconductor optical devices are used in fiberoptic systems and for satellite communication, for optical data communication, storage, reading and writing, for optical sensors and measurements, and as solidstate laser pumps. These devices are expected to be more extensively applied in emerging areas such as optical interconnects, optical signal processing and computing or optical memory. This development has been made possible by the greater maturity of material growth and device fabrication techniques, and by an increased knowledge of semiconductor materials and device structures. Ongoing research in this field is reported in the literature and enhanced fabrication tends to make high-yield and low-cost semiconductor devices available.
One of the more widely researched optoelectronic devices are the quantum well self-electro-optic effect devices (SEEDs). SEEDs rely on changes in the optical absorption that can be induced by changes in an electric field perpendicular to the thin semiconductor layers in quantum well material. This chapter discusses the concepts of electro-absorption, various configurations of SEEDs, resistor-biased SEEDs, diode-biased SEEDs, symmetric SEEDs, multistate SEEDs (M-SEEDs), logic SEEDs (L-SEED), several types of quantum well modulators and it describes the application of SEEDs to optical signal processing. The basic principle of a SEED is to use the current detected in a photodetector to change the electric field across the quantum well region of the modulators. These devices have optical inputs and optical outputs and are called optical logic devices, even though electrical currents flow within the devices. If the photodetector and modulator are integrated, the SEED can be quite efficient and is one of the lowest energy devices demonstrated for optical processing.
Free-space digital optics is a topic based on many disciplines: nonlinear optics, computer and switching network architectural design, semiconductor physics, mechanical design, and, of course, optical system design. Initial work in this area concentrated on the discovery and development of nonlinear optical effects with which to form optical switching devices or logic gates. Progress on the device front stimulated research on switching and computing architectures to capitalize on the potential advantages of free-space digital optics. However, without arrays of practical devices, realistic demonstrations of these architectures were not possible. With the development of batch-fabricated symmetric SEEDs, nonlinear interference filters, and liquid-crystal and magneto-optic spatial light modulators, more complex system experiments became possible.(1–5) The demonstration of these experiments required careful attention to the optical and opto-mechanical system design, in addition to significant device and architectural research.
We describe a technique for assembling fiber bundle arrays as needed in
optical computing and phonic switching systems. Two 4 X 4 arrays with
single-mode and multimode optical fibers were manufactured. Fiber ends
were located to within 3 micrometers of their ideal position and to a
pointing precision of 30 arcmin. A third 4 X 8 array was manufactured
with single-mode fibers, and fiber ends were located to within 1.5
micrometers of their ideal position.
A cellular logic image processor was designed, constructed and successfully operated by interconnecting two arrays of symmetric self electro-optic effect devices (S-SEED). This paper outlines some of the design issues associated with the implementation of a free-space digital optical system.
This chapter reviews the progress made in the area of digital free-space optics. Digital computing is a complex task. The chapter discusses all three areas of information technology: processing, communications, and storage. Optics is being considered for the various levels of interconnections in an electronic computing system. Depending on the transmission distance and interconnection density, different optics technologies are of interest. The chapter explains the hardware-related issues from a computational point of view. The potential of free-space digital optics is based on the parallelism of the interconnections and on the availability of suitable devices to implement logic operations. The physics of nonlinear devices and optical interconnections is described. The chapter focuses on semiconductor devices that have the potential for high speed. Some of the architectural and systems aspects relevant to free-space optical digital computing and switching are also discussed in the chapter.
The design, assembly, and testing details of an objective lens used to
image an array of 4096 beams are discussed. The main characteristics of
the lens are a 15-mm focal length, a speed of f/1.5, diffraction-limited
quality, telecentricity, f-sin ((theta) ) mapping, an external stop, and
a simplicity of fabrication.
Photonic switching nodes based on self electro-optic devices are described. These nodes are proposed for use in extended generalized shuffle networks with free space digital optical interconnections between nodes. Several experiments are described demonstrating both individual switching nodes and arrays of switching nodes operating concurrently. Node complexity, optical system complexity, and tolerance issues associated with different types of nodes are also discussed.
Details are presented of the design, fabrication, and use of a hybrid lens employed to interconnect two-dimensional arrays of optical transceivers. The hybrid lens consists of a custom-designed, 42-mm focal length, ƒ/5 compound lens followed by an array of afocal telescope compound microlenses.
The design, construction, and operational testing of a five-stage, fully interconnected 32 × 16 switching fabric by the use of smart-pixel (2, 1, 1) switching nodes are described. The arrays of switching nodes use monolithically integrated GaAs field-effect transistors, multiple-quantum-well p-i-n detectors, and self-electro-optic-device modulators. Each switching node incorporates 25 field-effect transistors and 17 p-i-n diodes to realize two differential optical receivers, the 2 × 1 node switching logic, a single-bit node control memory, and one differential optical transmitter. The five stages of node arrays are interconnected to form a two-dimensional banyan network by the use of Fourier-plane computer-generated holograms. System input and output are made by two-dimensional fiber-bundle matrices, and the system optical hardware design incorporates frequency-stabilized lasers, pupil-division beam combination, and a hybrid micro-macro lens for fiber-bundle imaging. Optomechanical packaging of the system ut lizes modular kinematic component positioning and active thermal control to enable simple rapid assembly. Two preliminary operational experiments are completed. In the first experiment, five stages are operated at 50 Mbits/s with 15 active inputs and outputs. The second experiment attempts to operate two stages of second-generation node arrays at 155 Mbits/s, with eight of the 15 active nodes functioning correctly along the straight switch-routing paths.
An optical circuit is successfully operated by interconnecting two arrays of 128 symmetric self-electro-opticeffect devices. The holographic interconnect used in this cellular-logic image processor is described. The design issues (noise orders, efficiency, and ease of alignment) associated with the interconnect and and extensions of it are discussed.
We describe a method of calculating the relationship between system bit rates and tolerances to variations in optical powers for self-electro-optic-effect devices (SEED's). We show that high-contrast-ratio devices have improved bit rates in the presence of optical-power variations even for differential devices. We also calculate the ratios of control-beam to signal-beam powers and transfer-beam to clock-beam powers for logic SEED switching nodes and shift registers. Last, we show that the bit rate of optoelectronically cascaded devices, such as the logic SEED shift register, is comparable with that of optically cascaded symmetric SEED's.
We describe the design and demonstration of an extended generalized shuffle interconnection network, centrally controlled by a personal computer. A banyan interconnection pattern is implemented by use of computer-generated Fourier holograms and custom metallization at each 32 × 32 switching node array. Each array of electrically controlled tristate symmetric self-electro-optic-effect devices has 10,240 optical pinouts and 32 electrical pinouts, and the six-stage system occupies a 9 in. × 12.5 in. (22.9 cm × 31.7 cm) area. Details of the architecture, optical and mechanical design, and system alignment and tolerancing are presented.
The effects of mask alignment and etch-depth errors in the array uniformity error U and diffraction efficiency eta of multilevel-grating array illuminators are evaluated numerically. Also demonstrated are 16-level fan-out elements with array size up to 32 x 16, with U = 5%-10% and eta = 83%-92%. These are fabricated with electron-beam-written binary masks, optical alignment and contact copying, and reactive ion etching. Good-agreement-between the predictions of the-error analysis and the performance of the fabricated components is observed.
Free-space photonic switching systems that optically interconnect large arrays of simple processing elements have already been demonstrated [IEEE Photon. Technol. Lett. 2, 438,600 (1990); Appl. Opt. 31, 5431 (1992); Electron. Lett. 27, 1869 (1991)]. In these system experiments, diffractive optical elements served as critical components that provided functionality not easily assumed by conventional optics. In the latest optical switching network, binary phase gratings were used to generate arrays of uniformintensity beams to illuminate modulators in the processor array. In addition, space-invariant binary phase grating designs were integral in forming the Banyan interconnection network used to link arrays in the system. Here we discuss the function, design, and performance of these diffractive elements.
A cellular-logic image processor was designed, constructed, and successfully operated by interconnecting two arrays of 128 symmetric self-electro-optic-effect devices. Design issues associated with the implementation of this free-space digital-optical system are discussed.
An optical fiber loop memory is proposed, using a photonic switch
device of a vertical to surface transmission electro-photonic device.
The photonic switch works as an optical pulse repeater. The operation
stability as the memory was analyzed, and more than 30 minutes storage
time has been realized. The maximum operational clock was as high as 20
MHz. This memory may be a part of the future optical computer
For part I see ibid., vol. 11, no. 10, pp. 1659-1669 (Oct. 1993).
In part I, the authors discussed the optoelectronic approach to the
implementation of smart pixels for optical interconnection and optical
computing systems. In this second paper, a similar analysis is done for
SEED-based technologies. The technologies investigated include the
symmetric SEED (S-SEED), asymmetric Fabry-Perot (ASFP) SEED, shallow
quantum well SEED, and FET-SEED. Of these technologies, it is found that
FET-SEED (whose structure is closely similar to optoelectronic logic
gates) has the highest sensitivity and operates at the highest
bandwidth. The advantages and limitations of the two approaches are
compared, considering such system performance issues as the maximum
information flux density, temperature sensitivity, and optical coupling
efficiency. It is concluded that the optoelectronic approach is useful
in applications which require high bandwidth (>1 GHz), complex logic
functions, and moderate pixel density, while the SEED-based approach is
more suitable to high-density interconnections used at moderate
bandwidths (<100 MHz). Furthermore, the maximum information flux
density of 2-D optoelectronic and FET-SEED logic gates is approximately
200 GHz/cm<sup>2</sup>, which is from 1 to 2 orders of magnitude larger
than for other SEED-based array technologies
The recent evolution of quantum-well self-electrooptic effect
devices (SEEDs) for application in free-space optical switching and
computing systems is reviewed. Requirements of these systems have
stimulated the development of devices usable in large systems of
cascaded devices (the symmetric SEED), large two-dimensional arrays of
these devices with improved physical performance, logically smarter
extensions of these devices (logic-SEEDs), and devices integrating
electronic transistors with quantum-well modulators and detectors for
both reducing the required optical energies and increasing
functionality. This progress and its implications for future
developments are summarized
Photonic technologies are reviewed that could become important
components of future telecommunication systems. Photonic devices and
systems are divided into two classes according to the function they
perform. The first class, relational, refers to devices, that map the
input channels to the output channels under external control. The second
class, logic, perform some type or combination of Boolean logic
functions. Some of the strengths and weaknesses of operating in the
photonic domain are presented. Relational devices and their applications
are discussed. Optical logic devices and their potential applications
are reviewed
We demonstrate 8 x 16 arrays of electrically addressed and 64 x 128 arrays and 128 x 256 arrays of optically addressed Symmetric SEEDs and discuss the performance of these devices. For optical processing to become a reality, large arrays of optical processing gates are required with low energies and fast switching speeds. Arrays of symmetric self electro-optic effect devices (S-SEEDs) with as many as 2048 devices (64 x 32) have been made using batch fabrication procedures that process an entire wafer of devices at once 1,2. In this paper we describe the extension of that work to arrays with 8192 devices (128 x 64) and 32768 elements (256 x 128). We also demonstrate 8 x 16 arrays of symmetric SEED modulators 3 with individual electrical access to the devices. The performance and uniformity of the arrays are more than acceptable to continue systems experiments with these types of devices.
An optical module designed to perform cascadable optical logic using arrays of symmetric self-electrooptic effect devices (S-SEEDs) is described. The operation of an array of 7 x 3 devices with optical windows spaced by 20 microm is demonstrated including both array preset and individual device switching. The issues leading to the design of this optical system are detailed. This work illustrates some of the issues which must be considered when designing systems using small reflecting electrooptic devices such as SEEDs and free-space optics in digital systems.
A prototype digital free-space photonic switching fabric
consisting of three cascaded 16×8 arrays of symmetric
self-electrooptic effect devices (S-SEEDs) is demonstrated. The three
stages implement the input interface and one 2×1 node stage of a
multistage switching network using crossover interconnections. The
devices in the arrays used in this experiment are configured to function
as logic gates to implement an array of 2×1 switching nodes. The
128 data inputs to the system are generated by a matrix of 64 fibers and
by a laser passing through 8×8 binary phase grating (BPG)
beamsplitter. The output power from each fiber is 94 μW. Vignetting
in the collection optics results in an output power of less than 1
μW, which limits the first stage switching speed to about 100 kHz
(33-kb/s system data rate). The minimum signal power cascaded from one
S-SEED array to the next is about 150 μW. If the system speed were
limited only by the signal powers between arrays, a data rate of 200
kb/s would be achievable
A 64*32 array of symmetric self-electrooptic effect devices, each of which can be operated as a memory element or logic gate, is discussed. The required optical switching energies of the devices were approximately 800 fJ and approximately 2.5 pJ at 6 and 15 V bias, respectively, and the fastest switching time measured was approximately 1 ns. Either state of the devices could be held with continuous or pulsed incident optical signals with an average optical incident power per input beam of approximately 200 nW or less than 1 mW for the entire array. Photocurrent and reflectivity were measured for all 2048 devices. Only one device failed to have the negative resistance required for bistability, and only nine of the devices fell outside a band of +or-20% of the mean. Additionally, over 200 devices in the array were operated in parallel using low-power semiconductor laser diodes.< >