Voltage setup problem for embedded systems with multiple voltages

Univ. of Maryland, College Park, MD, USA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Impact Factor: 1.36). 08/2005; 13(7):869 - 872. DOI: 10.1109/TVLSI.2005.850122
Source: IEEE Xplore


We formulate the following voltage setup problem: how many levels and at which values should voltages be implemented on the system to achieve the maximum energy saving by dynamic voltage scaling (DVS)? This problem challenges whether DVS technique's full potential in energy saving can be reached on multiple voltage systems. In this paper, 1) we derive analytical solutions for dual-voltage system; 2) we develop efficient numerical methods for the general case where analytical solutions do not exist; 3) we demonstrate how to apply our proposed algorithms in system design; and 4) our experimental results suggest that, interestingly, multiple voltage systems with proper voltage setup can be very close to DVS technique's full potential in energy saving.

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    • "However, this is not the case for modern processors: only a limited number of voltage levels are practically available. With these multiple-voltage processors, applying DVS algorithms that assume continuous voltage levels to embedded control systems cannot realize the full potential of energy reduction (Hua and Qu, 2005). To guarantee the system schedulability, a waste of computing resources may potentially result from the quantization of the voltage levels. "
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    ABSTRACT: The aim of this research is to minimize the energy dissipation of embedded controllers without jeopardizing the Quality of Control (QoC). Taking advantage of the Dynamic Voltage Scaling (DVS) technology, this study develops a performance-aware power management scheme for embedded controllers with processors that allow multiple voltage levels. The periods of control tasks are adapted online with respect to the current QoC, thus facilitating additional energy reduction over standard DVS. To avoid the waste of CPU resources as a result of the discrete voltage levels, a resource reclaiming mechanism is employed to maximize the CPU utilization and also to improve the QoC. Simulations are conducted to evaluate the performance of the proposed scheme. Compared with the optimal standard DVS scheme, the proposed scheme is shown to be able to save remarkably more energy while maintaining comparable QoC.
    Preview · Article · Jun 2008 · Information Technology Journal
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    • "Aydin et al. [3] proved that the optimal voltage for a one-processor single-level problem is equal to its utilization when the maximum speed is normalized to one. Hua et al. [8] proposed an analytical solution for a one-processor two-level problem and Seo et al. [13] proposed an optimal solution for a one-processor multi-level problem. To the best of our knowledge, our work is the first one that addresses the multi-processor voltage setup problem. "
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    ABSTRACT: Abstract A heterogeneous,multi-processor (HeMP) system con- sists of several heterogeneous processors, each of which is specially designed to deliver the best energy-saving perfor- mance,for a particular category of applications. A low- power real-time scheduling algorithm is required to sched- ule tasks on such a system to minimize its energy consump- tion and complete all tasks by their deadline. The prob- lem of determining the optimal speed for each processor to minimize the total energy consumption,is called the voltage setup problem. This paper provides a near-optimal solu- tion for the HeMP single-level voltage setup problem. To our best knowledge, we are the first work that addresses this problem. Initially, each task is assigned to a proces- sor in a local-optimal manner. We next propose a couple of solutions to reduce energy by migrating tasks between pro- cessors. Finally, we determine each processor’s speed by its final workload,and the deadline. We conducted a series of simulations to evaluate our algorithms. The results show that the local-optimal partition leads to a considerably bet- ter energy-saving schedule than a commonly-used,homoge- neous multi-processor scheduling algorithm. Furthermore, atallmeasurableconfigurations, our energy consumption is at most 3% more than the optimal value obtained by an ex- haustive iteration of all possible task-to-processor assign- ments. In summary, our work is shown to provide a near- optimal solution at its polynomial-time complexity.
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    ABSTRACT: This paper develops energy-driven completion ratio guaranteed scheduling techniques for the im- plementation of embedded software on multiprocessor systems with multiple supply voltages. We leverage application's performance requirements, uncertainties in execution time, and tolerance for reasonable execution failures to scale each processor's supply voltage at run-time to reduce the multiprocessor system's total energy consumption. Specifically, we study how to trade the difference between the system's highest achievable completion ratio Qmax and the required completion ratio Q0 for energy saving. First, we propose a best-effort energy minimization algorithm (BEEM1) that achieves Qmax with the provably minimum energy consumption. We then relax its unrealistic as- sumption on the application's real execution time and develop algorithm BEEM2 that only requires the application's best- and worst-case execution times. Finally, we propose a hybrid offline on-line completion ratio guaranteed energy minimization algorithm (QGEM) that provides the required Q0 with further energy reduction based on the probabilistic distribution of the application's execution time. We implement the proposed algorithms and verify their energy efficiency on real-life DSP applications and the TGFF random benchmark suite. BEEM1, BEEM2, and QGEM all provide the required completion ratio with average energy reduction of 28.7, 26.4, and 35.8%, respectively. Categories and Subject Descriptors: C.3 (Computer Systems Organization): Special-Purpose and Application-Based Systems—Real-time and embedded systems; D.2.2 (Software): Software Engineering—Design tools and techniques; J.6 (Computer Applications): Computer-Aided Engi- neering—Computer-aided design (CAD)
    Preview · Article · May 2006 · ACM Transactions on Embedded Computing Systems
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