Conference Paper

3.4 A 0.01mm 2 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor

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... A common-mode equivalent is shown in Fig. 6(b). Since the input and output currents from C RES must be equal (I AMP+ = I AMP− ), the common-mode current flowing into the integration capacitor I X,CM is forced to be 0, thus achieving a constant output common-mode voltage without a dedicated CMFB circuit [20], [21]. ...
... The simulated CLK-Q delay in the comparator versus C RES is shown in Fig. 11(a), and larger C RES leads to faster preamplification, which increases the comparator speed. Although the theoretical energy efficiency (FoM) is independent of C RES , as indicated by (21), in reality, they are still correlated, as shown in Fig. 11(b). If C RES is too small, the preamplification gain is not large enough to suppress the latch stage noise, causing the degradation of comparator precision. ...
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