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Current-limiting characteristics of saturated iron-core fault current limiters in VSC-HVDC systems based on electromagnetic energy conversion mechanism

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Abstract

A common method to examine the current-limiting performance of saturated iron-core fault current limiter (SI-FCL) in high-voltage direct-current transmission based on voltage source converter (VSC-HVDC) systems is to solve differential equations based on the system fault transient characteristics and the equivalent inductance calculation equation. This method analyzes the fault current of the VSC-HVDC system in the time domain. However, it is computationally complex and cannot directly reflect the relationship between parameters and the current-limiting effect of the SI-FCL. In this paper, the relationship between the magnetic flux density and magnetic field energy of the SI-FCL is analyzed. The energy exchange between the DC capacitor and the SI-FCL in the DC short circuit fault process is analyzed. From the perspective of electromagnetic energy conversion, the criterion for determining the current-limiting ability of the SI-FCL in the transient process is given based on the parameters of the SI-FCL and VSC-HVDC system. On this basis, the characteristics of the DC side fault current and the capacitor voltage when the SI-FCL has current-limiting ability are examined. Based on the parameters of the SI-FCL and VSC-HVDC system, a method for calculating the fault current peak value and capacitor voltage drop time is given. Finally, the accuracy of the analysis of the SI-FCL in the VSC-HVDC system based on the electromagnetic energy conversion mechanism is demonstrated through a case study and simulation results of the VSC-HVDC system with different SI-FCLs.
Current-limiting characteristics of saturated iron-core fault
current limiters in VSC-HVDC systems based on electromagnetic
energy conversion mechanism
Botong LI
1
, Hanqing CUI
1
, Fangjie JING
1
, Bin LI
1
, Yichao LIU
1
Abstract A common method to examine the current-lim-
iting performance of saturated iron-core fault current lim-
iter (SI-FCL) in high-voltage direct-current transmission
based on voltage source converter (VSC-HVDC) systems
is to solve differential equations based on the system fault
transient characteristics and the equivalent inductance
calculation equation. This method analyzes the fault cur-
rent of the VSC-HVDC system in the time domain. How-
ever, it is computationally complex and cannot directly
reflect the relationship between parameters and the current-
limiting effect of the SI-FCL. In this paper, the relationship
between the magnetic flux density and magnetic field
energy of the SI-FCL is analyzed. The energy exchange
between the DC capacitor and the SI-FCL in the DC short
circuit fault process is analyzed. From the perspective of
electromagnetic energy conversion, the criterion for
determining the current-limiting ability of the SI-FCL in
the transient process is given based on the parameters of
the SI-FCL and VSC-HVDC system. On this basis, the
characteristics of the DC side fault current and the capac-
itor voltage when the SI-FCL has current-limiting ability
are examined. Based on the parameters of the SI-FCL and
VSC-HVDC system, a method for calculating the fault
current peak value and capacitor voltage drop time is
given. Finally, the accuracy of the analysis of the SI-FCL
in the VSC-HVDC system based on the electromagnetic
energy conversion mechanism is demonstrated through a
case study and simulation results of the VSC-HVDC sys-
tem with different SI-FCLs.
Keywords Electromagnetic energy, Saturated iron-core
fault current limiter (SI-FCL), High-voltage direct-current
transmission based on voltage source converter (VSC-
HVDC) system, Fault analysis
1 Introduction
High-voltage direct-current transmission based on volt-
age source converter (VSC-HVDC) systems are a new type
of DC transmission technology with fully controllable
power electronic devices, which is one key technology in
the research and development of the smart grid [1]. The
characteristics of the converter structure and the control
strategy of the VSC-HVDC system result in high peak
value and fast rising speed of the DC side fault current. A
large fault current can easily damage converter components
and protective devices [2,3], yet is difficult to eliminate
immediately. Therefore, current-limiting technology is
introduced to suppress the DC side fault current, and slow
down the capacitor voltage drops. Meanwhile, this tech-
nology can effectively protect equipment [4], relax the
requirements on the DC breaker in terms of the speed and
CrossCheck date: 13 July 2018
Received: 10 November 2017 / Accepted: 13 July 2018
The Author(s) 2018
&Botong LI
libotong@tju.edu.cn
Hanqing CUI
cuihanqing12@163.com
Fangjie JING
jing_fangjie@126.com
Bin LI
binli@tju.edu.cn
Yichao LIU
liuyichao@tju.edu.cn
1
Key Laboratory of Smart Grid of Ministry of Education,
Tianjin University, Tianjin 300072, China
123
J. Mod. Power Syst. Clean Energy
https://doi.org/10.1007/s40565-018-0459-4
capacity, and reduce the difficulty of designing the pro-
tection scheme.
As current-limiting technology is critical to the VSC-
HVDC system, much related research has been performed
and results achieved. Reference [5] analyzed the influence
of the location of resistance-type superconductive fault
current limiters (SFCLs) on the DC side fault. They pointed
out that installing the resistance-type SFCL on the DC side
could successfully limit the DC fault current in the case of
a DC line fault. Reference [6] studied the current-limiting
effect of the resistance-type SFCL in the single-pole
ground fault and inter-pole fault at the DC side, and the
simulation results revealed that the resistance-type SFCL
has a significant effect on the DC side fault. Reference [7]
examined application cases of the resistance-type SFCL in
a three-terminal VSC-HVDC system, and proved the lim-
iting effect of this STCL on various types of DC side fault
current. Reference [8] analyzed the performance of the
resistance-type SFCL in a multi-terminal VSC-HVDC
system connected with an offshore wind farm, and their
transient analysis for different perturbations proved that the
resistance-type SFCL can reduce the fault current for both
DC and AC faults. Reference [9] analyzed the coordination
of fault current limitation in an electric power grid with
multiple SFCLs to further limit fault current rise. Refer-
ence [10] proposed a new resistance-type SFCL that can
reduce the fault current to 50% of the original value within
2 ms. To limit the fault current, the resistance of the fault
circuit is increased by installing a resistance-type SFCL in
the VSC-HVDC system.
Some literatures have also proposed limiting the fault
current by increasing the circuit inductance [11]. Reference
[12] designed an inductive SFCL and the simulation results
revealed that this SFCL has a significant effect on the DC
side fault. Reference [13] analyzed the impact of different
inductance values in the VSC-HVDC system on the DC
side fault current. Reference [14] offered an optimal design
scheme of installing the current-limiting inductor in a
multi-terminal VSC-HVDC system, and proved that this
scheme can effectively deaccelerate the rise in fault cur-
rent. Reference [15] designed a protective inductor for the
VSC-HVDC system of an offshore wind farm to limit the
current. The coordination relationships among converter,
DC circuit breaker and DC SFCL were studied and some
technical indicators were proposed to evaluate the perfor-
mance of the SFCL in [16].
Though inductors at the DC side can serve as current
limiters, large reactance will reduce the dynamic response
speed and can easily cause parallel resonance. In normal
operation, the equivalent inductance of saturated iron-core
fault current limiters (SI-FCL) is so small that it has no
effect on the VSC-HVDC system. When a DC side fault
occurs, the equivalent inductance increases rapidly to limit
the fault current. Thus, this approach is superior to instal-
ling inductors.
Some researches have also investigated the current-
limiting effect of the SI-FCL in the VSC-HVDC system.
Reference [11] proved the current-limiting effect of the SI-
FCL in the VSC-HVDC system. Reference [17] analyzed
the transient process of the DC side fault in the VSC-
HVDC system with the SI-FCL, and gave the relationship
between the peak value of the fault current and the SI-FCL
parameters. Reference [18] analyzed the leakage magnetic
flux of the SI-SFCL and proposed the equivalent magnetic
circuit model considering the effect of leakage magnetic
flux. Reference [19] introduced the application of the
active SI-SFCL in the VSC-HVDC system.
The analysis method in these papers solves the DC side
circuit differential equation with the equivalent inductance
of the SI-FCL in the DC side fault condition. However,
owing to the nonlinearity of the equivalent inductance, the
calculation involved is enormous and error prone. Other
researches mainly focused on the application of the SI-FCL
to the AC system, which is not applicable to the VSC-
HVDC system [2022].
To analyze the current-limiting effect of the SI-FCL in
the VSC-HVDC system, this paper analyzes the energy
exchange between the SI-FCL and the DC capacitor after
the DC side fault occurs. The relationship between the DC
side fault current and the parameters of the SI-FCL is
studied, and a rapid and effective analytical method of the
current-limiting performance of the SI-FCL is proposed in
this paper.
2 Analysis of energy variation process of SI-FCL
with changing magnetic flux density
The basic structure of the SI-FCL is shown in Fig. 1,
which includes one iron-core, one coil connected with the
DC side of the VSC-HVDC system, and one excitation coil
with a DC-biased source circuit. To reduce the run-time
Coil 2
Coil 1
DC source
N2N1
u2
i2
i1
Fig. 1 Structure of SI-FCL for VSC-HVDC system
Botong LI et al.
123
loss, the excitation coil can be made of superconductive
materials.
In Fig. 1, coil 1 is the excitation coil and coil 2 is the
coil connected with the DC side of the VSC-HVDC sys-
tem; N
1
is the turn number of coil 1 and N
2
is the turn
number of coil 2; i
1
is the current of coil 1 generally
excited by a constant current source; thus, i
1
is considered
as constant; i
2
is the current of the DC side of the VSC-
HVDC system.
The topology of the VSC-HVDC system with SI-FCLs
is shown in Fig. 2. To limit the DC side fault current, SI-
FCLs are installed in the converter station export. The
locations are also shown in Fig. 2.
As shown in Fig. 3, the magnetic flux density–magnetic
field intensity B–H curve of the iron core used in the SI-
SFCL is divided into the saturated region and the unsatu-
rated region signified by points K
1
and K
2
. When the VSC-
HVDC system works normally, the magnetic flux density
of the iron core is in the positive saturated region, the
permeability of the iron core is small, and the equivalent
inductance of the SI-FCL is extremely small; thus, its
influence on the VSC-HVDC system is slight. When a DC
side short-circuit fault occurs, the greatly increased fault
current forces the magnetic flux density of the core into the
non-saturated region. Subsequently, the equivalent induc-
tance of the SI-FCL rises rapidly with the increase in
permeability, and the fault current is limited by the SI-
FCL.
From the perspective of electromagnetic energy con-
servation, the electric energy is absorbed and converted
into magnetic field energy by the SI-FCL after a DC side
fault. Thereafter, the magnetic field energy draws the
magnetic flux density from the positive saturated region
into the unsaturated region. During this process, the mag-
netic permeability of the iron core increases, and so does
the equivalent inductance of the SI-FCL. The energy
conversion of the SI-FCL is analyzed at the stage when the
magnetic flux density moves from the positive saturated
region into the unsaturated region.
2.1 Theoretical analysis of energy change of SI-FCL
with varying magnetic flux density
For simplicity, it is assumed that the cross-section areas
of the iron core denoted by Sare identical. The magnetic
flux density is B. The relationship between the magnetic
flux density Band the current of the DC side of the VSC-
HVDC system i
2
can be expressed by the following
equation according to the relevant knowledge of magnetic
circuit analysis [23]:
i2¼N1i1Hl
N2
ð1Þ
where lis the overall length of the core; His the magnetic
field intensity. From the energy calculation formula, we
can see that the energy variation of the SI-FCL in the
period of t
1
t
2
is:
DWL¼Zt2
t1
u2i2dt¼Sl ZB2
B1
B
l
dBSN1i1B2þSN1i1B1
ð2Þ
where B
1
is the magnetic flux density at time t
1
;B
2
is the
magnetic flux density at time t
2
;Sis the cross-section of the
iron core.
According to the BHcurve in Fig. 3, the energy vari-
ation of the SI-FCL after the fault is:
DWL¼Sl ZBk
Bm
B
l
dBSN1i1BkþSN1i1Bm
þSl ZBt
Bk
B
l
dBSN1i1BtþSN1i1Bk
ð3Þ
where B
m
is the magnetic flux density before the fault and
in the saturated region; B
t
is the magnetic flux density at a
time point after the fault and in the non-saturated region; B
k
is the magnetic flux density of point K
1
.
Because the variation of the magnetic flux density in the
saturated region is negligible, B
m
&B
k
. Hence, (3) can be
simplified as follow:
idc
ic
usa
usb
usc
Ls
Rs
ua
ub
uc
D1
iabc
/2R/2L
D3 D5
D6D4 D2
Udc
SI-FCL
SI-FCL
Fig. 2 Topology of VSC-HVDC system with SI-FCLs
-3000 -2000 -1000 0 1000 2000 3000
Magnetic field intensity H (m/A)
-3
-2
-1
0
1
2
3
Magnetic flux density B (T)
K1
K2 Positive saturated
region
Negative saturated
region
Unsaturated region
Fig. 3 BHcurve of iron core
Current-limiting characteristics of saturated iron-core fault current limiters in VSC-HVDC
123
DWL¼Sl ZBt
Bk
B
l
dBSN1i1BtþSN1i1Bkð4Þ
According to the BHcurve of the iron core in Fig. 3,
we obtain the permeability–magnetic flux density l
1
Bcurve shown in Fig. 4that depicts the lBrelationship of
the core. It can be seen from the Fig. 4, that the lBcurve
is linear in the unsaturated region.
Therefore, the first-order polynomial can be used to fit
the relationship between the permeability land the mag-
netic flux density Bwith high accuracy. The fitting equa-
tion is:
l¼mB þn0BBk
mB þnBkB\0
ð5Þ
where the values of mand ndepend on the material of the
iron core.
The l
2
Bcurve in Fig. 4is obtained from (5). Com-
pared with the l
1
Bcurve, it can be seen that (5) can well
fit the non-saturated region of the l–B curve, but is not
consistent with the saturated region.
According to (3) and (5), when the magnetic flux density
Bchanges from the positive saturation region to the
unsaturated region, the relationship between the energy
variation DW
L
and the magnetic flux density B
t
is:
DWL¼
Slm
k2ln lBk
klBtþm

Sl
kBkBt
ðÞ
þSN1i1BkBt
ðÞ0BtBk
Slm
k2ln lBk
klBtþm

Sl
kBkþBt
ðÞ
þSN1i1BkBt
ðÞBkBt\0
8
>
>
>
>
>
>
>
>
<
>
>
>
>
>
>
>
>
:
ð6Þ
where l
Bk
is the permeability when the magnetic flux
density is B
k
.
When the magnetic flux density is in the unsaturated
region, the relationship between the energy variation and
the magnetic flux density can be reflected by (6). Thus, the
variation of magnetic field energy can be calculated by (6)
only when the magnetic flux density varies from the knee
point to the unsaturated region.
2.2 Simulation and verification of SI-FCL energy
change with varying magnetic flux density
To verify the correctness of (6), a simulation model of
the SI-FCL is established in PSpice. A single-phase
transformer model with saturated characteristics was built
to simulate the SI-FCL, and the parameters of the model
are listed in Table 1.
The excitation coil is connected to a ramp-type current
source that generates current to drive the magnetic flux
density of the SI-FCL from the positive saturated region
across the unsaturated region into the negative saturated
region. Current i
2
, voltage u
2
, and the magnetic flux density
are recorded constantly in the simulation. According to (2),
the energy variation of the SI-FCL from the simulation
start time to a certain time can be calculated, and then the
relationship between the energy variation and magnetic
flux density can be obtained, which is shown as the DW
L1
Bcurve in Fig. 5with cross marks.
Based on (6), the relationship between the energy vari-
ation and the magnetic flux density is calculated and shown
as the DW
L2
–B curve in Fig. 5with circle marks.
In Fig. 5, the two curves coincide well when the mag-
netic flux density varies from the positive saturated region
near the point K
1
to the unsaturated region. Equation (6)
proves to be accurate in calculating the energy variation of
the SI-FCL with the magnetic flux density ranging from the
positive saturated region to the unsaturated region.
3 Current-limiting performance analysis of SI-
FCL in VSC-HVDC system
The structure of the two-level VSC-HVDC system is
shown in Fig. 2. The DC side faults in the system can be
categorized as two-pole short-circuit fault, single-pole
short-circuit fault and disconnection fault, among which
-3 -2 -1 0 1 2 3
-0.005
0
0.005
0.010
0.015
0.020
μ
1B
μ
2B
Magnetic flux density B (T)
Permeability
Unsaturated
region
Positive
saturated region
Negative
saturated region
Fig. 4 lBcurve of iron core
Table 1 Parameters of SI-FCL simulation model
Parameter Value
Length of the core (l)6m
Cross-section areas (S) 1.1 m
2
Winding number of coil 1 (N
1
) 1500
Winding number of coil 2 (N
2
) 150
Current of the excitation coil (i
1
)30A
Magnetic flux density of point K(B
k
) 2.3 T
Botong LI et al.
123
the two-pole short-circuit fault is the most harmful.
Therefore, this paper analyzes the energy exchange process
of the DC side in the case of a two-pole short-circuit fault.
On this basis, the current-limiting performance of the SI-
FCL is studied.
When a DC side fault occurs, the insulated-gate bipolar
transistors of the inverter will be blocked under self-pro-
tection. At this time, the capacitor voltage U
dc
is greater
than the peak value of the inter-phase voltage of the AC
side. Additionally, the AC side system cannot supply
power to the DC side system through the free-wheel
diodes. The DC side system can be regarded as a circuit
structure in which the capacitor discharges to the short-
circuit point. After the capacitor voltage drops below the
peak value of the inter-phase voltage of the AC side, the
free-wheel diodes will turn on, and will most likely be
damaged by the fault current [3]. Therefore, the SI-FCL
that provides ample time for the breaker to clear the fault
should limit the fault current and delay the voltage drop
time of the capacitor before the free-wheel diodes turns
on.
In the most serious scenario, in which the resistance of
the SI-FCL ignored, and a short-circuit fault occurs at the
junction of the DC rail and the power cable, the DC side
system is equivalent to the simplified circuit as shown in
Fig. 6until the free-wheel diodes turn on.
For the circuit shown in Fig. 6, the capacitor voltage at
initial time t
1
is denoted as U
dc1
, a time point after the fault
is denoted as t
2
, and the voltage at time t
2
is denoted as
U
dc2
. The energy variation of the capacitor in the period t
1
t
2
is:
DWc¼1
2CU2
dc1 1
2CU2
dc2 ð7Þ
As observed from the equivalent circuit in Fig. 6, the
electric field energy variation of the capacitor is equal to
the magnetic field energy variation of the SI-FCL, DW
c
=
DW
L
. According to the relationship between DW
L
and the
magnetic flux density Bshown in Fig. 5, it can be seen that
the magnetic flux density Bwill gradually alter from the
positive saturated region to the negative saturated region as
the energy variation increases.
As can be seen from the B–H curve shown in Fig. 3, the
magnetic field intensity His reduced rapidly when the
magnetic flux density Bchanges from the positive saturated
region to the unsaturated region. Meanwhile, the current i
2
increases rapidly, which can be seen from (1). When the
magnetic flux density Bis in the unsaturated region, the
magnetic field intensity Hconverts slowly, and the current
i
2
is basically stable at a fixed value. When the magnetic
flux density Benters the negative saturated region, the
magnetic field intensity Hwill decrease rapidly again, the
current i
2
will dramatically increase, and the SI-FCL will
no longer limit the fault current of the DC side. Therefore,
to achieve the desired current-limiting effect, the energy
released by the capacitor should remain below what can
drive the magnetic flux density Bfrom the positive satu-
rated region across the unsaturated region into the negative
saturated region.
Combining (6) and (7), when the magnetic flux density
Bvaries from the positive saturated region into the unsat-
urated region, the relationship between the energy variation
of the SI-FCL and the energy variation of the capacitor is:
1
2CU2
dc1 1
2CU2
dc2
¼
Slm
k2ln lBk
klBtþm

Sl
kBkBt
ðÞ
þSN1i1BkBt
ðÞ0BtBk
Slm
k2ln lBk
klBtþm

Sl
kBkþBt
ðÞ
þSN1i1BkBt
ðÞBkBt\0
8
>
>
>
>
>
>
>
>
>
>
<
>
>
>
>
>
>
>
>
>
>
:
ð8Þ
It is noted that in (8) the magnetic flux density B
t
is in
the unsaturated region. Once the magnetic flux density
moves from the non-saturated region to the negative
saturated region, the lBcurve is no longer consistent with
(5), and (8) fails to reflect the relationship between the
energy variation of the SI-FCL and that of the capacitor.
The capacitor voltage that turns on the free-wheel diodes
is U
dc,min
. In the extreme case that the capacitor voltage
drops to U
dc,min
, the energy absorbed by the SI-FCL is not
-2 -1 0 1 2
Magnetic flux density B (T)
0
50
100
150
200
250
ΔWL2
Energy variation WL(kJ)
3-3
ΔWL1
Fig. 5 Relationship between energy variation and magnetic flux
density
SI-FCL
Udc
Coil 2
Coil 1
Fig. 6 Equivalent circuit of DC side system after a two-pole short-
circuit fault
Current-limiting characteristics of saturated iron-core fault current limiters in VSC-HVDC
123
sufficient to draw the magnetic flux density Binto the
negative saturated region, signified by point K
2
.
According to (2), for Bnot to reach the negative satu-
rated region, the condition is:
2SN1i1Bk1
2CU2
dc1 1
2CU2
dc;min ð9Þ
Let DWL;max ¼2SN1i1Bk, then DW
L,max
denotes the
maximum energy absorbed by the SI-FCL when the
magnetic flux density Bstays out of the negative
saturated region. Let DWc;max ¼1=2CU2
dc1 1=2CU2
dc;min,
then DW
c,max
represents the energy variation of the
capacitor when the voltage drops to U
dc,min
, and (9) can
be expressed as:
DWL;max DWc;max ð10Þ
Equation (10) is a criterion used to determine whether
the SI-FCL has current-limiting ability all the time before
the capacitor voltage drops to U
dc,min
.
When the capacitance and voltage level of the VSC-
HVDC system are given, if the criterion is met, the SI-FCL
will have current-limiting ability all the time before the
capacitor voltage drops to U
dc,min
and the fault current i
2
will not surge. Otherwise, the SI-FCL will not always have
current-limiting ability and thus cannot achieve the desired
performance.
The SI-FCL is designed to limit the fault current to an
acceptable level. In addition, the SI-FCL applied in the
VSC-HVDC system is also used to extend the time before
the voltage drops to U
dc,min
. Therefore, in addition to
analyzing whether the SI-FCL has current-limiting ability
in the process when the capacitor voltage drops from the
initial state U
dc1
to U
dc,min
, the maximum fault current
(i
2,max
) and the duration of this process (T) also needs to be
obtained.
When the magnetic flux density Bis in the unsaturated
region, the current i
2
can be calculated by (11) derived
from (1) and (5).
i2¼
N1i1Bl
kB þm
N2
0BBk
N1i1Bl
kB þm
N2
BkB\0
8
>
>
>
>
>
<
>
>
>
>
>
:
ð11Þ
Depending on whether (10) is met before the capacitor
voltage drops to U
dc,min
, the calculation of i
2,max
can be
divided into two cases:
Case 1: the SI-FCL has current-limiting ability con-
stantly during this voltage drop process. In this case, (8)is
used to calculate the magnetic flux density B
min
when the
capacitor voltage is U
dc,min
. With B
min
substituted into (11),
the maximum fault current i
2,max,I
is known.
Case 2: the SI-FCL does not always have current-lim-
iting ability during this process. In this case, the magnetic
flux density of the SI-FCL will enter the negative saturated
region, after which the fault current will surge before the
capacitor voltage drops to U
dc,min
. By substituting the
magnetic flux density at point K
2
into (11), the maximum
fault current i
2,max,II
can be obtained.
In normal operation, the iron core of the SI-FCL works
in the saturated state so that the equivalent inductance is
small. To ensure that the core is saturated, N
1
i
1
must be
very large. When a DC side fault occurs, the magnetic flux
density enters the unsaturated region. As shown in Fig. 3,
when the core is in the unsaturated state, the magnetic field
intensity is small and changes little. Meanwhile, the vari-
ation range of the current i
2
is small, and it can be assumed
that i
2
is approximately constant.
According to the capacitor discharge formula, it is
known that:
i2¼CdUdc
dtð12Þ
Setting Tis the time for the capacitor voltage to fall to
U
dc,min
. Depending on whether the condition (10) can be
satisfied during the process before the capacitor voltage
drops to U
dc,min
, the calculation of Tis divided into two
cases:
Case 1: the SI-FCL has current-limiting ability all the
time during this process. In this case, the maximum fault
current is i
2,max,I
. If the fault current is set to i
2,max,I
, the
shortest time T
min,I
for capacitor voltage to fall from U
dc1
to U
dc,min
is:
Tmin;I¼CU
dc1 Udc;min

i2;max;I
ð13Þ
Case 2: the SI-FCL does not always have current-
limiting ability during this process. In this case, by
substituting the magnetic flux density at point into (8),
the voltage U
dc,s
when the fault current begins to surge can
be obtained as:
Udcs ¼ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
U2
dc1 4SN1i1Bk=C
qð14Þ
As the variation range of the current i
2
is narrow, it is
assumed that the current i
2
is i
2,max,II
. In addition, the
shortest time for capacitor voltage to fall from U
dc1
to U
dc,s
is:
Tmin;s¼CU
dc1 Udc;s

i2;max;II
ð15Þ
Assuming that the fault current remains i
2,max,II
, the
shortest time for capacitor voltage to fall from U
dc1
to
U
dc,min
is:
Botong LI et al.
123
T0
min;s¼CU
dc1 Udc;min

i2;max;II
ð16Þ
The time for capacitor voltage to fall from U
dc1
to
U
dc,min
is T
min,II
, and T
min,II
is greater than T
min,s
. After
the capacitor voltage drops to U
dc,s
, the DC side fault
current surges, and T
min,II
must be less than T0
min;s. Thus,
T
min,II
satisfies the condition as follow:
Tmin;s\Tmin;II\T0
min;sð17Þ
Through the analysis of the SI-FCL in the VSC-HVDC
system, the criterion is found for determining whether the
SI-FCL has current-limiting ability all the time before the
capacitor voltage drops to U
dc,min
. By further analyzing the
process in which the capacitor voltage drops from the
initial state U
dc1
to U
dc,min
, the current level to which the
fault current is limited, and the time for the capacitor
voltage to drop from U
dc1
to U
dc,min
are obtained.
4 Case study and simulation verification
To verify the correctness of the theoretical analysis
above, a two-level VSC-HVDC system model of ±35 kV
(U
dc
= 70 kV) is built in PSpice. The model structure is
shown in Fig. 2, and the parameters of the model are listed
in Table 2.
The transmission capacity is 20 MW, and the rated
current i
2rated
is calculated as 0.3 kA. For the two-level
VSC-HVDC system, the free-wheel diodes turn on once
the capacitor voltage drops to the peak value of the inter-
phase voltage at the AC side, so U
dc,min
is calculated as
49.497 kV.
The capacitor voltage and fault current are shown in
Figs. 7and 8, when a two-pole short-circuit fault occurs 5
km away from the rectifier at 0.1 s. It can be seen that the
capacitor voltage drops rapidly to zero without the SI-FCL
while the fault current rises rapidly and reaches 17.69 kA,
approximately 60 times higher than the rated current.
To verify the correctness of the theoretical analysis of
the SI-FCL, the SI-FCLs A and B are separately connected
in the VSC-HVDC system. The parameters of SI-FCL A
are listed in Table 3.
The current-limiting performance of SI-FCL A and B
can be analyzed by the theory presented in Section 3.
Assuming that the two-pole short-circuit fault occurs at
the junction of the DC rail and the power cable, the energy
variation of the capacitor DW
c,max
is 2.45910
6
J, and the
energy variation of the SI-FCL A DW
L,max
is 2.48910
6
J. It
can be seen from (10) that the SI-FCL has current-limiting
Table 2 Parameters of the two-level VSC-HVDC system model
Parameter Value
DC side voltage ±35 kV
RMS inter-phase voltage of the AC side 35 kV
Length of the DC side cable 10 km
Transmission capacity 20 MW
Resistance of the DC cable 0.15 X/km
Inductance of the DC cable 2.5 mH/km
Inductance of the AC side 0.01 H
DC capacitor 2.0 mF
0.08 0.10 0.12 0.14 0.16
-20
0
20
40
60
80
Time (s)
Capacitor voltage U
dc
(kV)
Fig. 7 Capacitor voltage of the VSC-HVDC system without an SI-
FCL
0.08 0.10 0.12 0.14 0.16
0
5
10
15
20
Time (s)
Fault current i
2
(kA)
Fig. 8 DC side fault current of VSC-HVDC system without an SI-
FCL
Table 3 Parameters of SI-FCL A
Parameter Value
Length of the core (l)4m
Cross-section areas (S) 0.6 m
2
Winding number of coil 1 (N
1
) 6000
Winding number of coil 2 (N
2
) 900
Current of the excitation coil (i
1
) 150 A
Magnetic flux density of point K(B
k
) 2.3 T
Current-limiting characteristics of saturated iron-core fault current limiters in VSC-HVDC
123
ability before the capacitor voltage drops to U
dc,min
. The
SI-FCL A meets the condition of case 1. Therefore, the
magnetic flux density B
min
is about 2.238 T, the maximum
fault current i
2,max,I
is 1.017 kA, and T
min,I
is about 40.2
ms. The above theoretical calculations were made for the
most serious fault conditions (resistance of the DC side is
0). When a DC side fault occurs at other locations, the line
resistance is greater than 0, so the current-limiting effect of
the SI-FCL can be better.
When a two-pole short-circuit fault occurs at 5 km away
from the rectifier at 0.1 s, the capacitor voltage and fault
current of the VSC-HVDC system with SI-FCL A are
shown in Figs. 9and 10. It can be seen that the time Tfor
capacitor voltage to fall from U
dc1
to U
dc,min
is extended to
40.8 ms by the SI-FCL A. In addition, the maximum fault
current is about 1.04 kA. The results obtained by the
simulation and theoretical analysis of SI-FCL A are basi-
cally the same.
The parameters of SI-FCL B are listed in Table 4.
Assuming that the two-pole short-circuit fault occurs at
the junction of the DC rail and the power cable in the VSC-
HVDC system with SI-FCL B. The energy variation of the
capacitor DW
c,max
is 2.45910
6
J, and the energy variation
of the SI-FCL B is 1.49910
6
J. It can be seen from (10)
that the SI-FCL will lose current-limiting ability before the
capacitor voltage drops to U
dc,min
. The SI-FCL B meets the
condition of case 2, and the current surge occurs before the
capacitor voltage drops to U
dc,min
. The magnetic flux
density B
k
substituted into (11) and (14), the maximum
fault current before the current surges is about 1.389 kA,
and the voltage U
dc,s
is 57.271 kV. The shortest time T
min,s
for the capacitor voltage to fall from U
dc1
to U
dc,s
is 18.3
ms. Assuming that the fault current remains 1.389 kA, the
shortest time T0
min;sfor capacitor voltage to fall from U
dc1
to U
dc,min
is 29.5 ms. Therefore, the time for the capacitor
voltage to drop to U
dc,min
is longer than 18.3 ms and less
than 29.5 ms.
When a two-pole short-circuit fault occurs 5 km away
from the rectifier at 0.1 s, the capacitor voltage and fault
0.12
0.08 0.10 0.14 0.16
30
40
50
60
70
80
Capacitor voltage U
dc
(kV)
Time (s)
T
Fig. 9 Capacitor voltage of VSC-HVDC system with SI-FCL A
Fault current i
2
(kA)
0.08 0.10 0.12 0.14 0.16
Time (s)
0
2
4
6
T
Fig. 10 DC side fault current of VSC-HVDC system with SI-FCL A
Table 4 Parameters of SI-FCL B
Parameter Value
Length of the core (l)4m
Cross-section areas (S) 0.6 m
2
Winding number of coil 1 (N
1
) 4500
Winding number of coil 2 (N
2
) 400
Current of the excitation coil (i
1
) 120 A
Magnetic flux density of point K(B
k
) 2.3 T
0.08 0.10 0.12 0.14 0.16
-20
0
20
40
60
80
T
T
Capacitor voltage Udc (kV)
Time (s)
Fig. 11 Capacitor voltage of VSC-HVDC system with SI-FCL B
Fault current i2 (kA)
Time (s)
0.08 0.10 0.12 0.14 0.16
0
2
4
6
8
10
T
T
Fig. 12 DC side fault current of VSC-HVDC system with SI-FCL B
Botong LI et al.
123
current of the VSC-HVDC system with SI-FCL B are
shown in Figs. 11 and 12. It can be seen that the time Tfor
capacitor voltage to fall from U
dc1
to U
dc,min
is 23.8 ms,
and the maximum fault current is approximately 1.409 kA
before the current surges. When the fault current surges,
the capacitor voltage is 57.653 kV, and the time T0for
capacitor voltage to fall from U
dc1
to U
dc,s
is 18.7 ms. The
results obtained by the simulation and theoretical analysis
of SI-FCL B are basically the same.
The simulation of the VSC-HVDC system with different
SI-FCLs shows that the method analyzing the performance
of the SI-FCL based on the electromagnetic energy con-
version mechanism is correct. The method gives the cri-
terion for determining whether the SI-FCL has current-
limiting ability constantly before the capacitor voltage
drops to U
dc,min
. In addition, the maximum fault current
and the time for capacitor voltage to fall from U
dc1
to
U
dc,min
can also be calculated accurately by this method.
5 Conclusion
This paper has examined the performance of the SI-FCL
in a VSC-HVDC system. From the perspective of elec-
tromagnetic energy conversion, the relationship between
the electromagnetic energy and the magnetic flux density
of the SI-FCL has been analyzed. Based on the study of the
electromagnetic energy conversion process after the DC
side fault, the relationship between the fault current and the
magnetic flux density of the SI-FCL and that between the
time for the capacitor voltage dropping to U
dc,min
and the
DC side fault current have been given.
The method identifying the current-limiting character-
istic of the SI-FCL in the VSC-HVDC system is based on
the analysis of the energy conversion of the DC side fault.
On this basis, the time for capacitor voltage to drop to
U
dc,min
and the maximum fault current in the case of a
constantly current-limiting-capable SI-FCL can be
obtained if the parameters of the SI-FCL and the VSC-
HVDC system are given. This method avoids the complex
differential calculation of solving the DC side fault tran-
sient process in the time domain, and its accuracy has been
demonstrated through a case study and simulation.
Acknowledgements This research work was supported in part by the
National Key R&D Program of China (No. 2018YFB0904600), and
in part by the National Nature Science Foundation of China (NSFC)
under Grant 51677125.
Open Access This article is distributed under the terms of the
Creative Commons Attribution 4.0 International License (http://
creativecommons.org/licenses/by/4.0/), which permits unrestricted
use, distribution, and reproduction in any medium, provided you give
appropriate credit to the original author(s) and the source, provide a
link to the Creative Commons license, and indicate if changes were
made.
References
[1] Zeng D, Yao J, Yang S et al (2011) Economy comparison of
VSC-HVDC with different voltage levels. Autom Electr Power
Syst 35(20):98–102
[2] Elserougi AA, Abdel-Khalik AS, Massoud AM et al (2014) A
new protection scheme for HVDC converters against DC-side
faults with current suppression capability. IEEE Trans Power
Deliv 29(4):1569–1577
[3] Yang J, Fletcher JE, O’Reilly J (2012) Short-circuit and ground
fault analyses and location in VSC-based DC network cables.
IEEE Trans Ind Electron 59(10):3827–3837
[4] Liu J, Tai NL, Fang CJ et al (2016) Fault current limitation and
analysis of current limiting characteristic for multi-terminal
VSC-HVDC DC lines. Proc CSEE 36(19):5122–5133
[5] Lee JG, Khan UA, Hwang JS et al (2014) Assessment on the
influence of resistive superconducting fault current limiter in
VSC-HVDC system. Phys C Supercond 504(1):163–166
[6] Manohar P, Ahmed W (2012) Superconducting fault current
limiter to mitigate the effect of DC line fault in VSC-HVDC
system. In: Proceedings of the 2012 IEEE international con-
ference on power, signals, controls and computation, Thrissur,
India, 3–6 January 2012, 6 pp
[7] Liu X, Sheng J, Hong Z et al (2015) Research on application of
superconducting fault current limiter in VSC-MTDC power
system. Power Syst Technol 39(4):983–988
[8] Kumar MA, Babu SS, Srikanth NV et al (2015) Performance of
superconducting fault current limiter in offshore wind farm
connected VSC based MTDC transmission system. In: Pro-
ceedings of the IEEE power and energy conference, Champaign,
USA, 20–21 February 2015, 6 pp
[9] Hayakawa N, Maeno Y, Kojima H (2018) Fault current limi-
tation coordination in electric power grid with superconducting
fault current limiters. IEEE Trans Appl Supercond. https://doi.
org/10.1109/TASC.2018.2818279
[10] Chen Y, Liu X, Sheng J et al (2014) Design and application of a
superconducting fault current limiter in DC systems. IEEE
Trans Appl Supercond 24(3):1–5
[11] Li B, He J (2015) DC fault analysis and current limiting tech-
nique for VSC based DC distribution system. Proc Chin Soc
Electr Eng 35(12):3026–3036
[12] Wang C, Li B, He J et al (2017) Design and application of the
SFCL in the modular multilevel converter based DC system.
IEEE Trans Appl Supercond 27(4):1–4
[13] Descloux J, Raison B, Curis JB (2014) Protection algorithm
based on differential voltage measurement for MTDC grids. In:
Proceedings of the IET international conference on develop-
ments in power system protection, Copenhagen, Denmark, 31
March–3 April 2014, 5 pp
[14] Kontos E, Rodrigues S, Teixeira PR et al (2014) Optimization of
limiting reactors design for DC fault protection of multi-ter-
minal HVDC networks. In: Proceedings of energy conversion
congress and exposition, Pittsburgh, USA, 14–18 September
2014, 8 pp
[15] Deng F, Chen Z (2013) Design of protective inductors for
HVDC transmission line within DC grid offshore wind farms.
IEEE Trans Power Deliv 28(28):75–83
[16] Li B, Wang C, Wei Z et al (2018) Technical requirements of the
DC superconducting fault current limiter. IEEE Trans Appl
Supercond. https://doi.org/10.1109/TASC.2018.2811961
Current-limiting characteristics of saturated iron-core fault current limiters in VSC-HVDC
123
[17] Li B, Jing F, Jia F et al (2016) Research on saturated iron-core
superconductive fault current limiters applied in VSC-HVDC
systems. IEEE Trans Appl Supercond 26(7):1–4
[18] Zhang C, Tang Y, Xu Y et al (2017) Analysis of magnetic
circuit and leakage magnetic field of a saturated iron-core
superconducting fault current limiter. IEEE Trans Appl Super-
cond 27(4):1–5
[19] Li B, Jing F, Li B et al (2018) Study of the application of active
saturated iron-core superconductive fault current limiters in the
VSC-HVDC system. IEEE Trans Appl Supercond. https://doi.
org/10.1109/TASC.2018.2824840
[20] Aracil JC, Lopez-Roldan J, Coetzee JC et al (2012) Analysis of
electromagnetic forces in high voltage superconducting fault
current limiters with saturated core. Int J Electr Power Energy
Syst 43(1):1087–1093
[21] Jia Y, Shi Z, Zhu H et al (2015) Cognition on the current-
limiting effect of saturated-core superconducting fault current
limiter. IEEE Trans Magn 51(11):1–4
[22] Li B, Guo F, Wang J et al (2015) Electromagnetic transient
analysis of the saturated iron-core superconductor fault current
limiter. IEEE Trans Appl Supercond 25(3):1–5
[23] Feng CZ, Ma XK (2001) An introduction to engineering elec-
tromagnetic fields. Higher Education Press, Beijing
Botong LI received the Ph.D. degree in electrical engineering and
automation from Tianjin University, Tianjin, China in 2010. He is an
associate professor in the School of Electrical and Information
Engineering, Tianjin University, Tianjin, China. His research interests
include power system protection and control of VSC-HVDC trans-
mission system.
Hanqing CUI is currently pursuing the M.S. degree in electrical
engineering and automation at Tianjin University, Tianjin, China. His
research interests include protection of VSC-HVDC.
Fangjie JING is currently pursuing the M.S. degree in electrical
engineering and automation at Tianjin University, Tianjin, China. His
research interests include protection of VSC-HVDC.
Bin LI received the Ph.D. degree in electrical engineering and
automation from Tianjin University, Tianjin, China in 2005. He is
currently a professor in the School of Electrical and Information
Engineering, Tianjin University, Tianjin, China. His research interests
include power system protection and control.
Yichao LIU is currently pursuing the M.S. degree in electrical
engineering and automation at Tianjin University, Tianjin, China. His
research interests include protection of VSC-HVDC.
Botong LI et al.
123
... The result shows that the maximum fault current value and drop velocity of dc voltage can be reduced effectively in the VSC-HVDC system [69]. Moreover, the inductance calculation scheme was proposed and verified in [70] to guide the design of the parameters. Based on this topology, a coil and circuit optimized topology was proposed in [71], which is shown in Fig. 11. ...
... The overvoltage issue of the source and coil, in the meanwhile, can be relieved. Except for traditional single core structure with two windings [69][70][71][72][73], many other FCLs concerning the iron core structure and topological design are proposed in HVDC system. Z. Wei et al [35] proposed an FCL based on magnetic shielding of the SC rings, shown in Fig. 12(a). ...
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The fault current of DC line in multi-terminal HVDC system based on voltage source converters (VSC) increases quickly with large peak, while the DC circuit breaker with large capacity and fast breaking speed is still under development. Combined with the capacity level of DC circuit breaker breaking, a current limiting circuit was proposed to limit the peak and rising rate of fault current by connecting it to DC line ends. Theoretical calculation method for the circuit parameters was also given. The analysis results about the circuit and the comparison with other methods show that the proposed circuit is able to limit the fault current effectively and reduce the requirement for DC breaker capacity and speed. Based on the circuit, a fault-handling scheme for DC lines in multi-terminal VSC-HVDC was proposed. The simulation results show that the proposed scheme is capable of limiting fault current of DC lines and parallel diodes effectively, and non-fault system can maintain normal operation after fault clearance, indicating that the handling ability of multi-terminal VSC-HVDC system for DC fault is enhanced effectively.
Article
The high-voltage direct-current transmission based on voltage source converter (VSC-HVDC) system has pointed the way for the development of the smart grid, yet one challenge to be faced is that VSCs are vulnerable to dc short-circuit faults due to the huge discharge current of the dc-link capacitor. Therefore, the saturated iron-core superconductive fault current limiter (SI-SFCL) is introduced to limit the fault current to a relatively low level. The working principle and electrical properties of the SI-SFCL are discussed first. The relationship between the inductance and dc gird current of the SI-SFCL is deduced. The transient process of a short-circuit fault in the VSC-HVDC system with the SI-SFCL is studied. The maximum current and the drop velocity of dc rail voltage are presented according to the parameter of the SI-SFCL. The effectiveness of the SI-SFCL is proved by comparing fault currents and voltages of the VSC-HVDC system with and without it in PSPICE.
Article
The relationship between transmission capacity and voltage level of the voltage source converter (VSC)-HVDC is analyzed. The method for determining the scope of economical transportation is proposed. It emphatically analyzes such economic parameters as the total cost of the VSC-HVDC project, annual operation cost, maintenance cost, and the fund recovery period. A typical VSC-HVDC line is used as an example. The study shows that, by taking into account the factors such as the converter station, cable and environment for a project of a few hundred MW-level VSC-HVDC, the higher the voltage level is, the lower the operation and maintenance cost of the project will be. Furthermore, considering the loans, electricity sales, investment income, internal revenue, etc, the higher the voltage level is, the lower the total investment of project cost, and the shorter the investment recovery period. So the selection of a proper voltage level can improve the economy of the VSC-HVDC project.
Article
The isolation of the DC faults is the key technology for guaranteeing the supply reliability in the DC distribution system. This paper analyzed the transient characteristics of DC faults, and subdivided the transient process into three stages: the DC capacitor discharge stage, the diodes natural commutation conduct stage and the diodes synchronously conduct stage. The paper pointed out that the DC faults will affect the AC side, the converter and the DC side. According to the DC faults transient process, this paper analyzed the requirements and technology difficulties of the protection strategy and DC circuit breakers for the DC distribution system. Then this paper proposed a fault current limiting technique based on the resistive-type superconducting fault current limiter (R-SFCL) which can limit the overcurrent of the DC side, AC side and the anti-parallel diodes when the DC fault happens. Therefore, it can decrease the requirements of the action time and design difficulties for the protection strategy, and decrease the requirement of action speed and interrupting capacity for the DC circuit breaker. Finally, this paper carried out lots of simulation tests to verify the effectiveness of the theoretical analysis and proposed fault current limiting technique based on the Matlab/Simulink.
Article
Nowadays multi-terminal voltage source converter based high voltage direct current (VSC-HVDC) system stands as an interesting solution to efficiently connect a number of offshore wind farms. But the VSC based HVDC system is more vulnerable to DC line faults due to the high discharge current from the DC link capacitance. In view of this, a superconducting fault current limiter (SCFCL) is a possible device which can mitigate the consequences of DC line faults effectively. The main objective of this paper is to improve the dynamic performance of an offshore wind farm connected multi-terminal VSC-HVDC transmission system by incorporating SCFCL under various perturbations. Here, the MTDC system along with the SCFCL is modelled in MATLAB/Simulink and the results are presented for various AC/DC fault conditions.