Design and optimization of FINFET based schmitt trigger using dual sleep method

Abstract

In this paper, we designed Schmitt trigger using CMOS low power design technique at 180nm nm technology. With the advancement of technology, different parameters have been calculated Such as power-consumption, delay, power delay product (PDP), energy delay product (EDP) and noise. Different techniques are applied for the reduction in power consumption at the trade off with delay and area. In this paper we use novel FINFET based dual sleep technique is used to decrease the leakage power in the circuit. Schmitt trigger is a positive feedback amplifier that converts any continuous time varying signal to pulse wave. It forms the comparator of modern analog to digital convertor circuits, and it provides good noise immunity, thus it is used in communication. Parameters are calculated in both conventional CMOS based and FINFET based dual sleep technique and compared. The Average leakage power obtained using dual sleep method is 99.49PW which is very less as that of Conventional CMOS is 383.03uW Designing is done with variable voltage supply and the performance of the circuit is observed at different points. The circuit is simulated in Cadence virtuoso tool version 6.1 output of all is compared.