Article

Design of Tunneling Field-Effect Transistors Using Strained-Silicon/Strained-Germanium Type-II Staggered Heterojunctions

Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA
IEEE Electron Device Letters (Impact Factor: 2.75). 10/2008; 29(9):1074 - 1077. DOI: 10.1109/LED.2008.2000970
Source: IEEE Xplore

ABSTRACT

Heterojunction tunneling field-effect transistors (HTFETs) that use strained-silicon/strained-germanium type-II staggered band alignment for band-to-band tunneling (BBT) injection are simulated using a nonlocal quantum tunneling model. The tunneling model is first compared to measurements of gate- controlled BBT in previously fabricated strained SiGe diodes and is shown to produce good agreement with the measurements. The simulation of the gated diode structure is then extended to study HTFETs with an effective energy barrier of 0.25 eV at the strained-Si/strained-Ge heterointerface. As the band alignment, particularly the valence band offset, is critical to modeling HTFET operation, analysis of measured characteristics of MOS capacitors fabricated in strained-Si/strained-Ge/relaxed Si0.5Ge0.5 hetero- junctions is used to extract a valence band offset of 0.64 eV at the strained-Si/strained-Ge heterointerface. Simulations are used to compare HTFETs to MOSFETs with similar technology parameters. The simulations show that HTFETs have potential for low-operating-voltage (Vdd < 0.5 V) application and exhibit steep subthreshold swing over many decades while maintaining high ON-state currents.

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    • "In order to enhance the ON current (I ON ), various design improvements in terms of band gap engineering [5], hetero junction TFETs [6] strained silicon [7], novel architectures like carbon nanotube TFETs [8], double gate (DG) TFET [9], Dual material gate (DMG) TFET [10] and DMG DGTFETs [11] have been proposed. Sandow et al., [12] proposed experimental studies on the performance of ultrathin body SOI tunnel FETs depending on channel length, gate oxide thickness and source/drain doping concentrations. "
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    ABSTRACT: In this paper, a new two dimensional (2D) analytical modeling and simulation for a surrounding gate tunnel field effect transistor (TFET) is proposed. The Parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions and analytical expressions for surface potential and electric field are derived. This electric field distribution is further used to calculate the tunneling generation rate and thus we numerically extract the tunneling current. The results show a significant improvement in on-current characteristics while short channel effects are greatly reduced. Effectiveness of the proposed model has been confirmed by comparing the analytical results with the TCAD simulation results.
    Full-text · Article · Mar 2014 · Journal of Electrical Engineering and Technology
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    • "In order to enhance the ON current (I ON ), various design improvements in terms of band gap engineering [13], hetero junction TFETs [14] strained silicon [15], novel architectures like carbon nanotube TFETs [16] and Double Gate (DG) TFET [17] has been proposed. Boucart et al. [17] proposed a DG TFET structure that shows significant improvements compared with single-gate devices using a SiO 2 gate dielectric. "
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    ABSTRACT: In this paper, a new two dimensional (2D) analytical modeling and simulation for a Dual Material Double Gate tunnel field effect transistor (DMDG TFET) is proposed. The Parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions and analytical expressions for surface potential and electric field are derived. This electric field distribution is further used to calculate the tunnelling generation rate and thus we numerically extract the tunnelling current. The results show a significant improvement in on-current characteristics while short channel effects are greatly reduced. Effectiveness of the proposed model has been confirmed by comparing the analytical results with the TCAD simulation results.
    Full-text · Article · Jan 2014 · Journal of Electrical Engineering and Technology
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    • "Therefore various techniques to improve the I ON in the TFET have been suggested [5], [6]. In order to enhance the ON current (I ON ), various design improvements in terms of band gap engineering [6], hetero junction TFETs [7] strained silicon [8], novel architectures like carbon nanotube TFETs [9], DG TFET [10] and DMG DGTFETs [11] have been proposed. The above models deal only with simulation and only a few analytical models were proposed. "
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    ABSTRACT: In this paper, a new two dimensional (2D) analytical model of a Dual Material Gate tunnel field effect transistor (DMG TFET) is presented. The parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions. The simple and accurate analytical expressions for surface potential and electric field are derived. The electric field distribution can be used to calculate the tunneling generation rate and numerically extract tunneling current. The results show a significant improvement of on-current and reduction in short channel effects. Effectiveness of the proposed method has been confirmed by comparing the analytical results with the TCAD simulation results.
    Full-text · Article · Nov 2013 · Journal of Electrical Engineering and Technology
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