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Self-aligned ion implant masking for CMOS VLSI technology

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Abstract

Conventional self-aligned ion implantation masking is often inadequate in CMOS VLSI fabrication. We describe a method of increasing this ion implant masking with minimal additional processing. Scanning electron micrographs portray the enhanced ion implant masking.

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Impurity diffusion in SiO, and related effects on the MOS properties of the SiGate technology
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