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An Embedded Processing Design for 192-Channel
10-40 MS/s Aero-Engine Optical Tomography:
Progress and Continued DAQ Characterisation
E. Fisher, S-A. Tsekenis, Y. Yang, A. Chighine,
N. Polydorides and H. McCann
The School of Engineering, Edinburgh University
Edinburgh, UK
{E.Fisher@ed.ac.uk}
P. Wright and K. Ozanyan
School of Electrical and Electronic Engineering,
Manchester University
Manchester, UK
D. Wilson, M. Lengden and W. Johnstone
Department of Electronic and Electrical Engineering
The University of Strathclyde
Glasgow, UK
Abstract—We present ongoing work towards a 6-projection
126-beam tool for temporal and spatial diagnostic imaging of jet-
engine exhaust plume gas species. At present, the optics of the
system are customized for carbon dioxide (CO
2
), however the
design is intended to be scalable to other pollutant and green-house
gases produced by such engines. For measurement of per-beam
path concentration integrals (PCIs) of a gas species, tunable diode
absorption spectroscopy (TDLAS) and wavelength modulation
spectroscopy (WMS) are used. These techniques have been
demonstrated, however this paper reports progress on the
significant embedded, highly-distributed data acquisition (DAQ)
systems that are integral to the instrument. Much of the mechanics
and optics are finalized, tested and published, however we will
briefly discuss these. The DAQ is parallel due to the high gas-
speeds (100-200 m/s), and hierarchical to allow a multi-node
system capable of both in-situ signal processing and scalability to
higher numbers of projection angles, beams and exhaust gasses.
We briefly describe the hardware and gate-level firmware,
highlighting that TDLAS/WMS signals are demodulated using
dual-harmonic digital lock-in amplifiers (DLIAs) implemented
per-channel. Each distributed node can digitize up to sixteen
analog channels at 10 to 40 MS/s (14-bit) with an analog
bandwidth of 10 Hz to 3 MHz, which is tailored f or TDLAS. The
digital system, which uses regular interrupts to obtain and
transmit data, is suitable for 20 frame/sec tomography, although
the spectroscopy and image reconstruction is necessarily off-line.
This work demonstrates progress towards a scalable multi-
channel DAQ suitable for the harsh environment within jet-engine
testing facilities.
Keywords—Tunable Diode Laser Absorption Spectroscopy;
TDLAS; Data Acquisition, DAQ, Aero-Engines, Diagnostics
I.
I
NTRODUCTION
As the aviation sector continues to grow, and as climate
science indicates increased risk factors for the planet, methods
of reducing the green house and pollutant gases of aero-engines
are a key requirement of future sustainable air travel [1].
Aviation legislation continues to call for improvements in
Carbon Dioxide (CO
2
), Methane (CH
4
), Nitrous Oxides (NO
x
)
Sulphur Oxides (SO
x
) and Unburnt Hydrocarbon (UHC)
emissions. To deliver this, novel engine and fuel-mixture
designs are necessary, along with the efficient maintenance and
sign-off checks of existing engine stocks [1]. To enable such
development, diagnostic instrumentation is required which can
contribute to knowledge of the chemistry of the potentially non-
optimum combustion process, as well as assessing the temporal
and spatial dynamics of high-speed gas flows [2, 3, 4, 5]. A
critical requirement of such a diagnostic tool is that it be non-
intrusive, as in this context, turbulence in the air flow may
interfere with the performance of an engine (in a testing facility)
for which we require a robust measurement. Through
collaborative discussions with engine manufacturers, gas exit
speeds of 100-200 m/s may be present when engines such as the
Rolls-Royce Trent 1000 and Trent XWB are operated at high-
thrust. This therefore requires high-speed parallel measurement
in preference to time multiplexed or raster-scan measurements
for diagnostic imaging purposes [3, 4, 5]. As jet-engine testing
facilities represent a harsh-vibration, electrical-noise and dirty
environment (oil, fuel and dust particulate), instrumentation
requirements become more complex, where the design must
comply with local regulations, must not interfere with engine
operations, and must be small and mechanically robust [3, 4]. As
human operators are excluded from the cell when testing cycles
are underway, all instrumentation must be remotely operated,
and able to transmit data to a central control room (~ 60 m away)
without undue signal degradation [3, 4]. Tests may be lengthy
(≥ 2 hours) suggesting either real-time data transmission or the
local storage of data in easily removable media. The geometry
and human access (at height) of the test cell and tomographic
mounting ring (Fig. 1) precludes this last option [3, 5]. The
above constraints lead to the need for a truly parallel, distributed
and remote instrumentation and DAQ methodology, however
this must also be fit for purpose with respect to gas
spectrographic measurement techniques and optical
tomography. Data acquisition often requires a custom design for
such applications, as multiple, competing requirements may
preclude the use of commercial-off-the-shelf (COTS) solutions.
Real-time, high data throughput synchronized acquisition
presents a challenge, with several systems demonstrating
solutions to sub-sets of the issues faced [11, 12, 13, 14, 15].
Critical parameters include i) channel scalability, ii) suitability
for captured signals, including speed, accuracy and noise
performance, iii) suitability for environment and end-
application, iv) provision to implement custom signal processing
[16] and v) a figure of merit (FOM) based on speed, power-use,
size, cost and accuracy similar to established FOMs for ADCs.
While being custom to satisfy application requirements, longer
term, both compatibility with existing network infrastructure
(Ethernet and protocols such as UDP or TCP/IP) and extensions
to include self-test and signal diagnostics (null data, ADC
saturation and sub-block loopbacks or self-tests) are required to
increase the technology readiness level (TRL) for continuous
use within the testing environment.
Diagnostic imaging of aero-engine plumes has been
successful in previous studies. Harley et al [6] utilized a single
view-point thermal camera. The dynamics of the plume edge
mixing with the entrainment and by-pass air of the engine
became observable, however the internal structure of the plume
was not. To progress spectrally targeted imaging to high frame
rates and to view the internal concentration dynamics of the
plume, Ma et al [7] implemented a setup using a 30-beam (2-
projection) orthogonal array, for extremely projection angle
limited tomography. This was positioned to capture a planar
view normal to the direction of gas flow. Being ~46 cm in
diameter, this was suitable only for small engines, targeting
water-vapor (H
2
O) concentration and gas temperature. An open
question, is how to optimally measure multiple gas-species, gas-
parameters and multiple paths in a non-intrusive manner for
large high-thrust commercial engines [8, 9]. The FLITES project
aims to elucidate the fine details of such a proposal, while
pushing the tomographic boundaries for such measurement. In
this case, a 126-beam 6-projection tomographic array, utilizing
fiber-laser amplifiers as an enabling technology for single seed-
laser distribution to multiple infrared optical interrogation
beams [3]. We note, that even with 126-beams, tomographic
reconstruction is challenging due to the severe under-determined
nature of the inversion problem.
Chemical species tomography (CST) has been successfully
applied to internal combustion engine diagnostics [10],
becoming sensitive enough to show air-fuel mixing issues and
problematic injection. In [10], a direct-absorption (DA) dual-
wavelength approach was taken, one wavelength chosen to be
on-resonance with the bond-vibration of a target species (i.e.
absorbed), the other chosen to be off-resonance but subject to
the same optical path and non-species-specific attenuation. An
alternate technique known as tunable diode laser absorption
spectroscopy (TDLAS) scans a laser source over an absorption
feature using injection current modulation with temperature
control [8, 9]. This allows observation of the absorption cross-
section which can yield gas parameters such as the
concentration, pressure and temperature [2, 3, 5, 8, 9]. When
combined with a higher-frequency sinusoidal dither,
superimposed on the laser drive signal, wavelength modulation
spectroscopy (WMS) allows interfering noise sources to be
reduced and can be used to obtain absorption spectra normalized
for many non-linearities inherent in such optical interrogation
approaches [8].
In this paper, we discuss a system similar to [11] in that
digital lock-in amplification is implemented within the DAQ
itself [16 – 18]. This is extended here to include details of the
back-end architecture, i.e. the method in which ADC data is
obtained, the signal processing, block-data acquisition and
synchronization, each implemented within a field-
programmable gate-array (FPGA) at the center of Ethernet star-
networked distributed DAQ nodes.
II. S
YSTEM DESIGN
A. Tomographic System Overview
To image the exhaust plume of large commercial jet-engines,
a 6-projection angle, 21-beam/projection (126-beam)
tomographic array is formed using a custom 7 m diameter,
dodecagonal mechanical ring structure [3]. This is placed ~4 m
behind the engine within a test cell. To target CO
2
absorption
[9], a 1997 nm seed laser is amplified using a Thulium-doped
fiber amplifier (TDFA) and distributed to transmit modules
mounted on planar, parallel alignment plates [3, 5]. The laser
grid produces a 1.8 m diameter central imaging space (~1.4 m
exhaust plumes expected), shown in Fig. 1. Receiver modules
use extended InGaAs photodiodes with at-site transimpedance
amplification and voltage preamplification [4]. The diameter of
the ring prevents undue modification of entrainment and bypass
air currents within the cell, however its circumference (22 m)
and cabling distance to the test cell control room (50-60 m)
prevents the use of per-channel analog signaling. For scalability
towards >256 beams, centralized data acquisition within the
control room is discounted due to high cabling costs and the
potential for noise pickup [4]. Even with a centralized DAQ
placed within the test-cell, many 100s of matched, low-noise
analog cables would represent a significant cost. The
Fig 1. An overview of the imaging structure showing the central 126-beam
array, dodecagonal mounting, the 1.4 m exhaust plume, the distribution (red)
of 2 µm laser light using a TDFA and spliced fiber network, the 12-node
DAQ and the back-end data network to the control PC (blue).
Demodulation Hub board
Data
Acquisition
PC
7 m
Laser
Source
Control
Data Connections
Fiber Connections
Exhaust Area
tomographic array has been preliminarily tested using gaseous
phantoms [5], while tomographic image reconstruction
algorithms [19] and extension of the TDLAS/WMS
spectroscopy methodology [20] have also been investigated.
B. TDLAS/WMS Specifications for Data Acquisition
Aside from in-situ signal processing, which can be done
offline if needed [5], TDLAS and WMS impose several
specifications upon a data acquisition system [3]. TDLAS (Fig.
2) modulates the amplitude and wavelength of a seed laser using
a slow current ramp, in this case specified to be between 1 Hz
and 100 Hz [2, 5, 8, 9]. This scan-rate is directly equivalent to
the final processed tomographic imaging rate, i.e. 1 to 100
frames/second. WMS superimposes a higher frequency
sinusoidal dither onto this ramp [8, 9, 16, 20]. Here, this is
variable between 100 kHz and 500 kHz, although i) the use of
2
nd
harmonic normalization [8, 9, 20] necessitates DAQ
suitability for 1MHz signals [4] and ii) the laser system requires
further characterization above 400 kHz due to a decrease in
amplitude and wavelength modulation depth. Both the ramp and
dither are needed for system synchronization; therefore, these
are distributed as square waves using coaxial cables around the
ring. Synchronization methods such as the precision time
protocol (PTP), which is implemented on Ethernet networks
used for final data grabbing, would be preferable in this
situation, however laser synchronization is a function of the
timing signals the COTS laser driver is able to provide (in this
case 2.5 V CMOS). To ensure low-noise reference signals for
WMS demodulation, using digital lock-in amplification (DLIA),
local direct-digital synthesis (DDS) is utilized [4, 11, 16, 17, 18].
However, this must be synchronized (for deterministic phase
performance and adjustment) with the ramp and dither to ensure
minimal phase walk when obtaining the magnitude and phase of
the recovered TDLAS/WMS signal [16, 20]. As TDLAS/WMS
signals include many harmonics and vectorially-added
components, it is useful to have experimental control over the
frequency and phase of the DDS reference and the time-constant
of the in-situ DLIA. While TDLAS/WMS can be computed
from continuously sampled data, there is an innate discretization
into wavelength scans (ramps), DLIA time constants, and dither
periods per scan (Fig. 2). Sampling the absorption feature with
N=400 points, a simple state machine (Fig. 2. Right) allows
short start (S) and end (E) periods for laser settling and ramp fly-
back. Between DLIA measurements, a waiting period (W) is
included allowing inter-measurement operations such as data
grabbing, DLIA reset and Ethernet packet creation. To allow
deterministic behavior, we force the ramp period to be an integer
multiple of the dither period, thus DLIA measurements (A) and
waiting periods can be fixed at easily countable and easily
synchronized intervals [4]. For N=400, S=E=1, W=2 and A=11,
the periods within a ramp, and thus the dither frequency can be
calculated using Eqn. 1. This gives a total number of dither
periods/ramp of T=5200.
𝑇 = 𝑆 + 𝑁(𝐴 + 𝑊)− 𝑊 + 𝐸 (1)
For a 100 Hz ramp, the dither frequency is therefore 520 kHz.
As DDSs often have a fine frequency resolution (𝑓), calculated
using Eqn 2, many 1f and 2f WMS frequency values can be
accommodated, especially if S, A, W, E and N are semi-variable.
This allows significant scope for experimental parameter sweeps
and assessment of the engine 1/f noise spectra, with the aim of
placing WMS modulation at an optimum for a given engine. In
Eqn. 2, 𝑓
is the DDS core clocking frequency (e.g. 40 MHz to
match 40 MS/s ADC acquisition) and 𝐵 is the bit-depth of the
DDS phase accumulator. For 𝐵 values of 24 or 32 bits, the DDS
frequency resolution is 2.4 Hz or 0.01 Hz respectively.
𝑓 = 𝑓
2
(2)
C. Data Acquisition System Overview
To reduce noise, drive-strength, cost and routing issues with
multiple, lengthy analog cable runs, an on-ring distributed
hierarchical approach is taken (Fig. 1). A total of twelve
digitization nodes (hub boards) are located on the dodecagon
structure, one hub per vertex. This geometry allows a worst-case
cable-run of 2.5 m from photodiode pre-amplifier to the node
ADCs (Fig. 3). This significantly reduces cable costs as a
conventional, star-topology, (100 Mb/s/node 100BASE-T)
shielded Ethernet network can be used for transmission of
digitized data (Fig. 1). Further, the current budget per
photodiode preamplifier can be reduced to ~50 mA, allowing
smaller and simpler units at each optical receiver element, and
allows the digitization nodes to provide local regulation and
decoupling. The distributed scheme permits economies of scale
with respect to custom printed circuit boards (PCBs), and
promotes a parallel DAQ strategy. Unit-testing and redundancy
also become difficult with single board solutions. As scalability
is a central requirement, a multi-node design innately allows
Fig 2. Left. TDLAS timing of a wavelength sweep over the absorption line (top), showing WMS dither and N=400 wavelength measurements/ramp (bottom).
Right: Digital state machine control of DAQ measurement points and synchronization per TDLAS ramp, deriving timing from ramp and dither signals.
scalability, especially if the address structure of TCP/IP or UDP
are utilized per node. To complete the data acquisition system,
four networks are provided. Firstly, the 100 Mb/s star-topology
data network is connected to a Gb/s Ethernet switch positioned
in the test-cell (reducing cabling and providing both signal and
data buffering). Secondly, a star-topology power network is
connected to a bank of custom analog and digital supplies,
although we suspect that per-node mains (240 V
AC
) to 12 V
DC
conversion would increase scalability. Finally, coaxial networks
(matched lengths) provide square wave versions of the ramp and
dither signals from the commercial laser controller.
D. Hardware (PCB) Design
The custom DAQ PCB is pictured in Fig. 4. This
incorporates sixteen fully-differential analog channels, each
with a 1
st
order 10 Hz high-pass and 2
nd
order 3 MHz low-pass
response. When combined with the 3 MHz roll-off of the
photodiode pre-amplifiers (i.e. minimal pass-band attenuation at
1 MHz), this forms suitable anti-alias filtering for the 14-bit 10-
40 MS/s ADCs (Analog Devices - AD9257). The octal ADC
package allows significantly reduced system-level power and
cost when compared to single-ADC solutions. The (40 MS/s
maximum) clocking architecture for this PCB is shown in Fig.
5, where 560 Mb/s per ADC data is passed using a dual-data-
rate (DDR), serializer-deserializer (SerDes) protocol to a central
FPGA. Raw data rates of 8.9 Gb/s per node and system level
rates of 107.5 Gb/s necessitate the use of embedded signal
processing. The FPGA is a Xilinx Spartan 6 LX45, which can
support 1:7 deserialization, hence 7:14 bit deserialization is
handled using gate-level user-firmware within the FPGA fabric.
The PCB also contains a 16 Mbit PROM for FPGA
configuration and a simple bootloader (75% utilized), along with
256 Mbit SDRAM and FLASH for volatile and non-volatile
memories. The FLASH stores the embedded-C software before
boot, however this restricts the available non-volatile instruction
memory. A second-generation PCB would increase embedded
memory provision to allow use of the open-source lightweight-
IP (LwIP) TCP/IP library and implementation of the precision
time protocol (PTP). Extension of FLASH/SDRAM memory
interfaces and embedded code to utilize execute-in-place (XIP)
would decrease memory bottlenecks.
E. Signal Processing/Acquisition (Gate-Level) Firmware
The signal processing and memory architecture is shown in
Fig. 6, while the back-end soft microprocessor system is shown
in Fig. 7. We use direct-memory access (DMA) to periodically
transfer data from the DLIA multi-channel first-in-first-out
(FIFO) memory into the heap/stack memory. This is handled
using a hardware interrupt derived from the data ready flag of
the FIFO, i.e. full flag. The custom intellectual-property
interface (IPIF) allows user-switching between two FIFOs, the
second being for raw ADC data to aid in the spectrographic
signal calibration cycle. The interrupt rate achievable – while the
microprocessor performs DMA, ethernet packet creation and
Fig 5. Clocking and ADC SerDes data architecture for a single digitization
node. Each ADC provides 14-bit 10-40 MS/s data using source-synchronous
low-voltage differential signaling (LVDS) to the central FPGA.
Fig 3. Detail (top) of an alignment plate showing mechanically supported
fibers (yellow/black) to the transmit modules, and the preamplifier PCBs
with ribbon cables (blue). Custom optical kinematic mounts, the ‘ring’ (red)
during on-site build and fiber 1:21 splitter boxes are also shown (bottom).
Visible in the center of the ring (bottom) is a propane gas-burner to provide
deterministic placement and concentration CO
2
for phantom imaging tests.
Fig 4. A custom digitization node (hub) with a central FPGA (A), two octal
ADC packages (B), main clocking phase locked-loop (PLL) (C), Ethernet
communications (D) and initial analog filtering (E). Also included are i)
SDRAM and FLASH memories, ii) PROM for FPGA configuration and
bootloader, iii) a 3-axis accelerometer and iv) a 12-bit temperature sensor.
Below the main PCB is a secondary power regulation PCB delivering +/- 5
V 1
A for up to 16 pho
todiode preamplifiers.
A
B
B
C
D
E
control tasks – directly impacts the tomographic frame rate. A
2
nd
generation software stack will need to increase parallelism
(e.g. pipelining) to extend rates from 20 fps to 100 fps.
III. C
HARACTERISATION AND
R
ESULTS
To aid in characterization of the system SNR, inclusive of
the filtering action of the lock-in method, the performance of the
local DDS modules is presented in its synchronized mode (Fig.
8). Running at 40n MS/s and 14-bit to match the ADCs, the sine
and co-sine signals achieve 83 dB spurious free dynamic range
(SFDR). Checking the measurement-to-measurement phase
stability, they remain exactly 90 degrees out-of-phase ensuring
orthogonal multiplication. We have configured the DDSs for
two wavelength points (N=2), with four dither periods per
acquisition (A=4) and a wait time of W=1. Initial and final
values, as well as sample iteration, are deterministic. Corruption
of SerDes data from the ADCs has been found when the input
signal passes the 2^9=512 bit-level. This is not single 14-bit
sample glitches as often found during prototyping, and does not
appear to be closure of the SerDes data eye (leading to random
samples – checked by using data to clock delay resources). To
aid in diagnostics, a model is used which replicates the errors,
which may last for 30-50 samples and appears to be ADC code
dependent. In Fig. 9, a measured input ramp (blue) is corrupted
with a stuck at zero 9
th
bit (modeled in magenta). This fits the
magnitude and placement of the errors, however the random
behavior, and the care taken during logic synthesis
(deterministic once fixed) would indicate a probabilistic (i.e.
jitter) issue affecting sampling of serial or partially de-serialized
data. The inset zoom demonstrates that: a) that bit 9 is not always
incorrect and b) that a fine grained error, possibly a lower bit,
also has a probababilistic issue. Such data modelling is useful
when synthesis tools show no errors/warnings that would
otherwise aid debug of the issue. In Fig. 10, the fast-fourier-
transforms (FFTs) of three single-tone sinusoids are presented.
This shows that, when a digitized amplitude lower than ± 2
9
is
applied, the current version of the DAQ is able to acquire the
signal, albeit with high frequency noise that is outside of the
downstream DLIA pass-band. While some characterisation has
also been presented in [4, 5, 16], TDLAS/WMS requires
assessment of i) gain vs. amplitude linearity, noise
characteristics and frequency response characterisation with the
full photodiode, pre-amplifier, anti-alias filtering and ADC. This
will be performed once SerDes issues have been resolved, and
must be added to the spectrographic models [8, 9] to correctly
callibrate the system. For this DAQ, analogue-chain pass-band
ripple, gain non-linearity and noise aliased into the pass-band of
the DLIAs, represent the expected non-systematic uncertainties.
However, for the application, it is expected that uncertainty will
be dominated by the additive noise of the jet-engine plume.
Fig 8. 2f (500 kHz) DDS locked to the TDLAS synchronization state
machine settings of A=4 acquire dither periods, W=1 wait period. The DDSs
show correct initial values and are correctly iterated, stopped and reset. This
will prevent phase walk with respect to the reference for the
FPGA
DLIAs.
Fig 7. The structure of the back-end gate-level firmware. The IPIF streams
data from either a multi-channel DLIA FIFO or a single-channel raw data
FIFO to the Micro-Blaze heap/stack memory using the DMA engine.
Control registers are provided for fabric enables, resets, triggers and control
parameters (DDS frequency/phase, DLIA filter taps etc.).
Fig 6. The ADC data capture, digital lock-in signal processing providing
fundamental (1f) and 2
nd
harmonic (2f) in-phase (I) and quadrature (Q) 32-
bit data. A secondary signal chain allows capture of full-rate raw ADC data.
Fig 9. Analysis of a measured ramp signal (blue), as output by the ADC and
parsed at the FPGA SerDes inputs. A stuck at zero (bit 9) and bit-slip on bit
X model replicates this error. Stuck at or slip faults on other bits do not
replicate this error, giving larger e.g. 2^10=1024 departures from the ground
truth data fitting.
IV. C
ONCLUSIONS AND FUTURE WORK
This paper has discussed the design of the back-end
embedded sub-blocks for a large, parallel, distributed data
acquisition system. This is operated remotely from the user in a
non-ideal industrial environment. With the application being
optical tomography of gas concentration distributions within
aero-engine exhaust plumes, gas-sensing techniques such as
TDLAS and WMS [8, 9] are combined with in-situ, real-time
signal processing [4, 16] and real-time, synchronized
acquisition. The back-end – implementing ADC interfaces,
digital lock-in amplifiers, data memories and control software
running on an embedded processor – uses several standard
techniques. However, its customization to the task in-hand is
critical for scalability to higher beam and projection angle counts
and extension to other gas species. We believe that this system
– the electronics front-end, optical and mechanical sub-systems
being discussed within the references [3-5] – represents a critical
enabling technology for tomographic imaging and diagnostics
within the aviation engine and combustion fields. Our
immediate ongoing work, focusses upon the characterization of
the DLIAs in their multi-channel, FPGA-constrained and full
clock-speed final Verilog-code. We aim to measure the
frequency/phase response, complementing time-domain
measurements in [16] and ensure cycle-to-cycle accuracy.
A
CKNOWLEDGMENTS
The authors are indebted to Rolls-Royce and Shell, both
members of the Fiber Laser Imaging of Gas Turbine Exhaust
Species (FLITES) consortium, and funded by EPSRC grants
EP/J002151/2 and EP/J002178/1. We thank Dr. V. Archilla of
Instituto Nacional de Técnica Aeroespacial (INTA), the hosts of
the system, Dr. T. Ouypornkochagorn and Mr. Bruce Duncan.
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14-bit) and captured using a UART interface.