Laser fusing is a standard technique for improving yield with memory reconfiguration and repair, but implementing fusing in production can be challenging and costly. This article introduces an electrically programmable polysilicon fuse and shows how it can reduce fuse area and programming complexity.
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"Scale allowed by this method can give us feedback about what is the number of states (or which k-valued logic system) of the ideal molecular device that optimizes programmability. • On-chip self-repair " e-fusing " techniques such as in  are applicable to FPMRAs. The idea behind on-chip FPMRA self-repair e-fuse-like architectures is to have control over the level of NanoCell redundancy in order to improve programmability. "
[Show abstract][Hide abstract] ABSTRACT: An approach is presented to create molecular electronics systems by introducing a multi-valued programmable logic (MVPL) block to model the characteristics recently observed experimentally in certain molecular structures to achieve circuit robustness on a molecular substrate. We show that— given the experimentally observed characteristics of certain types of molecular electronics substrates—we can adopt a multi-valued logic system for the logic blocks, thereby partially avoiding the need to incorporate specialized fault detection or fault tolerant circuitry at the molecular level that would be required in binary logic circuits.
[Show abstract][Hide abstract] ABSTRACT: This work presents architectures and methods necessary for providing efficient and thorough test of high bandwidth embedded memories using low speed ATE. Details are also provided on the techniques used to minimize test related silicon area and test time requirements. This combination of flexible at-speed test with minimal circuitry and ATE requirements, and reduced time under test, leads to lower cost production of embedded memories
[Show abstract][Hide abstract] ABSTRACT: Demonstrating a >10X density increase over traditional VLSI fuse circuits, a compact eFUSE programmable array memory configured as a 4 Kb one-time programmable ROM (OTPROM) is presented using a 6.2 mum<sup>2</sup> NiSi<sub>x</sub> silicide electromigration ITIR cell in 65 nm SOI CMOS. A 20 mus programming time at 1.5 V is achieved by asymmetrical scaling of the fuse and a shared differential sensing scheme. Having zero process cost adder, eFUSE is fully compatible with standard VLSI manufacturing.