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... Por outro lado, na decodificação, ao dispor o código modulador antes do CCE, esse poderá propagar erros introduzidos no canal, com possível extrapolação da capacidade de correção do CCE [5]. A adoção de sistemas de codificação conjunta permitiram dirimir esses efeitos degeneradores [6]. A ideiaé codificar uma sequência sem restrição em uma com restrições finitas em que certas posições são reservadas para o CCE. ...
... Os códigos lineares abordados em [8], apesar de fidedignos ao proposto originalmente em [6], são casos particulares de restrições periódicas de memória finita (PFT, Periodic Finite Type Shift Space) [9]. Os PFTs permitem a descrição de sequências com restrições periódicas mais flexíveis que as tratadas em [8], permitindo a obtenção de códigos com maior taxa. ...
... Traditionally, arbitrary user information is encoded twice, first by the ECC encoder and then by the constrained system encoder, before it is written to the media. Immink and Wijngaarden [40] proposed a scheme to embed the ECC directly in the constrained system. In this scheme, the user information sequence is encoded into a binary sequence in which certain preset positions are left blank. ...
... In [40], [5], [38] and the references therein, several encoding schemes are proposed to overcome these disadvantages. Here, we focus on one of these schemes, in which the order of the two encodings mentioned above is reversed. ...
... Em [2], Wijngaarden e Immink propuseram um esquema de concatenação que codifica uma seqüência sem restrição em uma com restrição onde um conjunto definido de posições de bits na seqüência são reservados para bits de paridade do CCE. Os bits nessas posições podem ser modificados arbitrariamente sem violar a restrição, portanto são chamadas posições sem restrição. ...
... The first step is to augment the source word X be of use to make a code resilient against errors. Effective error control can be provided using techniques described in [3] and references therein. ...
Conference Paper
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Guided scrambling is a coding technique that generates for each possible source word a fixed set of candidate code words and subsequently selects the "best" word subject to given channel constraints. The resulting codes are often referred to as "weak" constraint codes because they do not strictly guarantee that the specified constraints will be fulfilled. In this paper , it will be shown that for the important class of maximum run-length constraints a proper selection of the set of guided scrambling sequences can actually guarantee that the code satisfies "strong" constraints. Sequence set selections and code constructions that result in "strong" maximum run-length constraints wilt be presented.
... Relativo a um codificador restritivo da paridade sistemático, Wijngoorden e Immink sugeriram o arranjo apresentado na Figura 3 [2]. A ideia propostaé o codificador restritivo gerar sequências com posições não restritas, ou seja, nessas posições o bit pode assumir arbitrariamente o valor 0 ou 1 sem violar a restrição, portanto os bits de paridade gerados pelo codificador CCE sistemático podem ser inseridos nestas posições (realizado pelo bloco Insere da Figura 3) sem violar a restrição. ...
Article
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Resumo—Sistemas dinâmicos simbólicos de memória finita com restri oes periódicas (PFT, do inglês periodic shift of finite type) formam a classe (na teoria de dinâmica simbólica) utilizada para modelar conjuntos de sequências com restri ao empregadas tanto para corre ao de erros quanto para codifica ao de linha. Nesse trabalho a teoria de dinâmica simbólicá e empregada como ferramenta matemática para abordar o problema da representa ao de sequências de símbolos que podem ser mode-ladas como PFTs. Palavras-chave—Dinâmica simbólica, grafos direcionados, códigos de linha, sistemas com restri ao. I. INTRODU AO E M sistemas de comunicação e gravação empregam-se os códigos corretores de erro (CCE) para correção de um número determinado de erros introduzidos pelo canal. Alguns desses sistemas também empregam os códigos de linhas (CL) ou códigos restritivos, que restringem as possíveis sequências de saída, adequando-a as características do ca-nal. Os códigos restritivos são comumente empregados em sistemas que utilizam equalização com resposta parcial. O seu emprego visa aumentar a distância mínima na saída do canal com interferência intersimbólica pela proibição de um número finito de sequências binárias. Exemplos de sistemas que apresentam restri oes são o MTR(j) -maximum transition run -que restringe o número máximo de 1's consecutivos a j e o RLL(d,k) -run-length limited -que restringe o número mínimo de 0's consecutivos a d e o máximo a k. Em sistemas que empregam codificação conjunta CL/CCE, pode-se propor um codificador que corrige um número determinado de erros e satisfaz as restri oes do canal. Na prática as propriedades de correção e restri ao de sequências são obtidas pela concatenação de um codificador CCE e um CL. A concatenação não pode ser realizada de forma arbitrária, pois as opera oes realizadas por um codi-ficador (na codificação ou decodificação) podem restringir o desempenho do outro. O estudo e projeto desses codificadores pode ser realizado aplicando-se a teoria de dinâmica simbólica. Para o caso em que o conjunto das sequências proibida e finito, os sistemas simbólicos fechados são sistemas simbólicos regulares de memória finita (SFT).
... A simple RC scheme employs an efficient data modulation encoder followed by a systematic ECC encoder and a parity modulation encoder for parity symbols. An alternative RC architecture is based on inserting ECC parity bits into a modulation-encoded data stream [31,32]. In addition to increased format efficiency, the other important benefit of such an approach is that the detector or the inner parity decoder can readily provide soft information on modulation-encoded data bits to the ECC decoder. ...
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2.5.1 Introduction This section outlines possible recording channel developments needed to meet the Roadmap specifications. Under the umbrella of "recording channel architecture," we will include any item in the signal path between the heads and the host interface. In this context, the greatest opportunities to advance transfer rate and capacity of future tape systems exist in the signal processing and coding algorithms that shape and decode the analog signal received from the tape. Linear tape recording technology has historically leveraged heavily from HDD development. The technology has benefited from advances in disk head technology, media technology, and signal processing algorithms [1]. However, as will be shown in Section 2.5.3, below, tape signals suffer from substantial impairments not present in disk signals. The remainder of this section is organized as follows. We begin with a brief discussion of a general recording architecture, Section 2.5.2, including data and servo channels. We then list a set of noise sources that impair the tape read signal in Section 2.5.3. The next section, 2.5.4, briefly presents a set of technologies that enable the data channel electronics to achieve the objectives outlined in the Roadmap. Finally, we list possible university research areas that could help advance the technology in Section 2.5.5.
Article
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Run-length limited (RLL) codes are a well-studied class of constrained codes having application in diverse areas, such as optical and magnetic data recording systems, DNA-based storage, and visible light communication. RLL codes have also been proposed for the emerging area of simultaneous energy and information transfer, where the receiver uses the received signal for decoding information as well as for harvesting energy to run its circuitry. In this paper, we show that RLL codes are not the best codes for simultaneous energy and information transfer, in terms of the maximum number of codewords which avoid energy outage, i.e., outage-constrained capacity. Specifically, we show that sliding window constrained (SWC) codes and sub-block energy constrained (SEC) codes have significantly higher outage-constrained capacities than RLL codes for moderate to large energy buffer sizes.
Preprint
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Run-length limited (RLL) codes are a well-studied class of constrained codes having application in diverse areas such as optical and magnetic data recording systems, DNA-based storage, and visible light communication. RLL codes have also been proposed for the emerging area of simultaneous energy and information transfer, where the receiver uses the received signal for decoding information as well as for harvesting energy to run its circuitry. In this paper, we show that RLL codes are not the best codes for simultaneous energy and information transfer, in terms of the maximum number of codewords which avoid energy outage, i.e., outage-constrained capacity. Specifically, we show that sliding window constrained (SWC) codes and subblock energy constrained (SEC) codes have significantly higher outage-constrained capacities than RLL codes.
Article
Constrained codes also known as modulation codes are a key component in the digital magnetic recording systems. The constrained codes forbid particular input data patterns which lead to some of the dominant error events or higher media noise. In data recording systems, a concatenated approach toward the constrained code and error-correcting code (ECC) is typically used and the decoding is done independently. In this paper, we show the improvement in combining the decoding of the constrained code and the ECC using generalized belief propagation (GBP) algorithm. We consider the performance of a combined modulation constraints and the ECC on a binary symmetric channel (BSC). We show that combining demodulation and decoding results in a superior performance compared to concatenated schemes. Furthermore, we compute the capacity of the joint ECC and modulation codes for 1-D and 2-D constraints.
Article
Coding schemes in data-storage systems use either conventional or reverse concatenation of a modulation code and an error-correction code. A new reverse concatenation scheme, called partial reverse concatenation, is introduced to reduce the coding overhead, improve the error-rate performance and simplify implementation. The proposed concatenation scheme uses an outer error-correction code, a high-rate modulation code and an inner error-correction code. The error-rate performance of partial reverse and conventional concatenation architectures are compared using measurements from tape drive channels. It is shown that, compared with a conventional concatenation scheme, an LDPC-code-based partial reverse concatenation scheme improves the signal-to-noise ratio that is required to achieve a bit-error rate of 1×10-20 by 1.8 dB.
Book
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Since the early 1980s we have witnessed the digital audio and video revolution: the Compact Disc (CD) has become a commodity audio system. CD-ROM and DVD-ROM have become the de facto standard for the storage of large computer programs and files. Growing fast in popularity are the digital audio and video recording systems called DVD and BluRay Disc. The above mass storage products, which form the backbone of modern electronic entertainment industry, would have been impossible without the usage of advanced coding systems. Pulse Code Modulation (PCM) is a process in which an analogue, audio or video, signal is encoded into a digital bit stream. The analogue signal is sampled, quantized and finally encoded into a bit stream. The origins of digital audio can be traced as far back as 1937, when Alec H. Reeves, a British scientist, invented pulse code modulation \cite{Ree}. The advantages of digital audio and video recording have been known and appreciated for a long time. The principal advantage that digital implementation confers over analog systems is that in a well-engineered digital recording system the sole significant degradation takes place at the initial digitization, and the quality lasts until the point of ultimate failure. In an analog system, quality is diminished at each stage of signal processing and the number of recording generations is limited. The quality of analog recordings, like the proverbial 'old soldier', just fades away. The advent of ever-cheaper and faster digital circuitry has made feasible the creation of high-end digital video and audio recorders, an impracticable possibility using previous generations of conventional analog hardware. The general subject of coding for digital recorders is very broad, with its roots deep set in history. In digital recording (and transmission) systems, channel encoding is employed to improve the efficiency and reliability of the channel. Channel coding is commonly accomplished in two successive steps: (a) error-correction code followed by (b) recording (or modulation) code. Error-correction control is realized by adding extra symbols to the conveyed message. These extra symbols make it possible for the receiver to correct errors that may occur in the received message. In the second coding step, the input data are translated into a sequence with special properties that comply with the given "physical nature" of the recorder. Of course, it is very difficult to define precisely the area of recording codes and it is even more difficult to be in any sense comprehensive. The special attributes that the recorded sequences should have to render it compatible with the physical characteristics of the available transmission channel are called channel constraints. For instance, in optical recording a '1' is recorded as pit and a '0' is recorded as land. For physical reasons, the pits or lands should neither be too long or too short. Thus, one records only those messages that satisfy a run-length-limited constraint. This requires the construction of a code which translates arbitrary source data into sequences that obey the given constraints. Many commercial recorder products, such as Compact Disc and DVD, use an RLL code. The main part of this book is concerned with the theoretical and practical aspects of coding techniques intended to improve the reliability and efficiency of mass recording systems as a whole. The successful operation of any recording code is crucially dependent upon specific properties of the various subsystems of the recorder. There are no techniques, other than experimental ones, available to assess the suitability of a specific coding technique. It is therefore not possible to provide a cookbook approach for the selection of the 'best' recording code. In this book, theory has been blended with practice to show how theoretical principles are applied to design encoders and decoders. The practitioner's view will predominate: we shall not be content with proving that a particular code exists and ignore the practical detail that the decoder complexity is only a billion times more complex than the largest existing computer. The ultimate goal of all work, application, is never once lost from sight. Much effort has been gone into the presentation of advanced topics such as in-depth treatments of code design techniques, hardware consequences, and applications. The list of references (including many US Patents) has been made as complete as possible and suggestions for 'further reading' have been included for those who wish to pursue specific topics in more detail. The decision to update Coding Techniques for Digital Recorders, published by Prentice-Hall (UK) in 1991, was made in Singapore during my stay in the winter of 1998. The principal reason for this decision was that during the last ten years or so, we have witnessed a success story of coding for constrained channels. The topic of this book, once the province of industrial research, has become an active research field in academia as well. During the IEEE International Symposia on Information Theory (ISIT and the IEEE International Conference on Communications (ICC), for example, there are now usually three sessions entirely devoted to aspects of constrained coding. As a result, very exciting new material, in the form of (conference) articles and theses, has become available, and an update became a necessity. The author is indebted to the Institute for Experimental Mathematics, University of Duisburg-Essen, Germany, the Data Storage Institute (DSI) and National University of Singapore (NUS), both in Singapore, and Princeton University, US, for the opportunity offered to write this book. Among the many people who helped me with this project, I like to thank Dr. Ludo Tolhuizen, Philips Research Eindhoven, for reading and providing useful comments and additions to the manuscript. Preface to the Second Edition About five years after the publication of the first edition, it was felt that an update of this text would be inescapable as so many relevant publications, including patents and survey papers, have been published. The author's principal aim in writing the second edition is to add the newly published coding methods, and discuss them in the context of the prior art. As a result about 150 new references, including many patents and patent applications, most of them younger than five years old, have been added to the former list of references. Fortunately, the US Patent Office now follows the European Patent Office in publishing a patent application after eighteen months of its first application, and this policy clearly adds to the rapid access to this important part of the technical literature. I am grateful to many readers who have helped me to correct (clerical) errors in the first edition and also to those who brought new and exciting material to my attention. I have tried to correct every error that I found or was brought to my attention by attentive readers, and seriously tried to avoid introducing new errors in the Second Edition. China is becoming a major player in the art of constructing, designing, and basic research of electronic storage systems. A Chinese translation of the first edition has been published early 2004. The author is indebted to prof. Xu, Tsinghua University, Beijing, for taking the initiative for this Chinese version, and also to Mr. Zhijun Lei, Tsinghua University, for undertaking the arduous task of translating this book from English to Chinese. Clearly, this translation makes it possible that a billion more people will now have access to it. Kees A. Schouhamer Immink, Rotterdam, November 2004
Article
An encoder and decoder for a (0,3) 8/9 code is described elsewhere. The present design for such encoders and decoders has two properties not found in the earlier embodiment of the code, while retaining all of the properties described previously. One new property is word parity. Each code word provides opposite parity relation with the corresponding data byte. Such relation can be used as a diagnostic check of encoder decoder and other related hardware. In magnetic tape application, a 9 multiplied by 9 encoded frame comprises 8 data and one parity byte in a set of 9 tracks. In every 9 multiplied by 9-byte encoded frame, the new code always produces an odd number of ones.
Article
Binary data is mapped into constrained sequences, called (d,k) sequences, where d represents the minimum and k represents the maximum number of 0's between any pair of consecutive 1's. A code with (0,3) d,k constraints can be constructed using various code-word lengths. This is illustrated for the desirable code-word length eight, where 8 binary bits are mapped into 9 bit cells; this mapping provides for a rate of 8/9. The encoder logic for the mapping is derived.
Conference Paper
We investigate the performance of error-control coding in the presence of a special type of errors induced by the bit-stuffing procedure in frame oriented transmission. Certain single substitution errors cause an additional insertion or deletion in the received data frame. We construct a class of systematic codes of variable length that correct single insertion/deletion errors and single substitution errors. The error detection capability of this class of codes is determined by simulation and compared with the traditional CRC-16 error detection code
Article
We present a systematic procedure for mapping data sequences into codewords of a prefix-synchronized code (PS-code), as well as for performing the inverse mapping. A PS-code, proposed by Gilbert (1960), belongs to a subclass of comma-free codes and is useful to recover word synchronization when errors have occurred in the stream of codewords. A PS-code is defined as a set of codewords with the property that each codeword has a known sequence as a prefix, followed by a coded data sequence in which this prefix is not allowed to occur. The largest PS-code among all PS-codes of the same code length is called a maximal prefix-synchronized code (MPS-code). We develop an encoding and decoding algorithm for Gilbert's MPS-code with a prefix of the form 11...10 and extend the algorithm to the class PS-codes of which the prefix is self-uncorrelated. The computational complexity of the entire mapping process is proportional to the length of the codewords