Toward Ideal On-Chip Communication Using Express Virtual Channels

Princeton Univ., Princeton
IEEE Micro (Impact Factor: 1.52). 02/2008; 28(1):80 - 90. DOI: 10.1109/MM.2008.18
Source: IEEE Xplore


Current on-chip networks use a packet-switched design with a complex router at every hop, which imposes significant communication energy, delay, and throughput overhead. we propose reducing energy and delay, and increasing throughput, using express virtual channels. packets traveling along these virtual express lanes, which connect distant nodes in the network, bypass intermediate routers, significantly reducing router overhead.

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Available from: Partha Kundu, Oct 16, 2015
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    • "To improve performance, express virtual channels are introduced in [20]. Beyond traditional wired interconnect solutions, different emerging approaches including 3D Network-on-Chip and Photonic Network-on-Chip were proposed [14] and [15]. "
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    • "The EVC flow control mechanism proposed in [17] enables packets to entirely bypass routers. Figure 3 shows the router architecture supporting EVCs. "
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    Full-text · Conference Paper · Aug 2011
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    • "This kind of network topology, commonly referred to as small-world, can be incorporated in NoCs by introducing long-range, high bandwidth and low power links between distant cores [1]. There have been efforts to improve NoC performance by introducing low-latency long-range links and low power express channels between highly separated nodes, where the performance gain is achieved by bypassing intermediate NoC switches/routers [1][2]. These communication channels are more efficient in terms of power and delay compared to their conventional counterparts, but they are still, basically, metal wires. "
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