According to the theory of swallow pulse PLL frequency synthesizer and the reality circuit of the LC72130 chip of SANYO, the formula of the frequency of dual-modulus prescaler method in programmable divider, the output frequency of swallow pulse PLL frequency synthesizer and refferrenced frequency are derived. So, a new broken number frequency division theory and a circuit diagram to realize the
... [Show full abstract] theory are proposed. It is a new technique with feature of making average frequency-radio of single phase-locked loop become decimal fraction. It has settled the contradiction between the high pulse detection frequency and the high frequency resolution of the single PLL frequency synthesizer.