Modeling and characterization of SiGe HBT low-frequency noise figures-of-merit for RFIC applications

Electr. & Comput. Eng. Dept., Auburn Univ., AL, USA
IEEE Transactions on Microwave Theory and Techniques (Impact Factor: 2.24). 12/2002; 50(11):2467 - 2473. DOI: 10.1109/TMTT.2002.804519
Source: IEEE Xplore


We present the first systematic experimental and modeling results of noise corner frequency (fC) and noise corner frequency to cutoff frequency ratio (fC/fT) for SiGe heterojunction bipolar transistors (HBTs) in a commercial SiGe RF technology. The fC and fC/fT ratio are investigated as a function of operating collector current density, SiGe profile, breakdown voltage, and transistor geometry. We demonstrate that both the fC and fC/fT ratio can be significantly reduced by careful SiGe profile optimization. A comparison of the fC and fC/fT ratio for high breakdown and standard breakdown voltage devices is made. Geometrical scaling data show that the SiGe HBT with AE=0.5×2.5 μm2 has the lowest fC and fC/fT ratio compared to other device geometries. An fC reduction of nearly 50% can be achieved by choosing this device as the unit cell in RF integrated-circuit design.

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    • "High frequency simulations in small signal and low frequency noise study must be done to verify the expected evolutions. These simulations have to be associated to the performances analysis of the oscillator [1]. In our work, the HBT used is the NN232A128 (from STMocroelectronics). "
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    ABSTRACT: This paper presents the impact of low-frequency substrate disturbances on a fully integrated voltage-controlled oscillator (VCO) spectrum. A 4.5GHz VCO test-chip is presented; two substrate taps are placed inside the VCO core to measure or to inject disturbances into the substrate. The VCO carrier frequency sensitivity function of the tuning voltage and the bias current are measured. Then, the VCO spurious side-bands caused by harmonic substrate noise disturbances are analyzed to find a relation between the substrate noise characteristics and spur magnitudes. Theoretically the impulse sensitivity function (ISF) approach is used to analyze device sensitivity to substrate noise. Finally, a significant link between device sensitivity functions, low-frequency substrate disturbances and the VCO side-band spectral power, is demonstrated. According to this study, we conclude that a global approach which only considers power supply bounces in mixed IC's is not sufficient to analyze the sensitivity of RF integrated oscillators to low frequency substrate noise.
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    • "Where area-related traps dominate, can be written empirically as (11) where is a coefficient dependent on areal trap density as well as on the strength of the carrier-trap interaction. Typical values for from the recent literature fall within the 2–4 10 range, independent of the Ge mole fraction in the base [91], [92]. This relationship can be used to predict a scaling trend as well as to guide device optimization specifically for low noise. "
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    ABSTRACT: Scaling has been the principal driving force behind the successful technology innovations of the past half-century. This paper investigates the impacts of scaling on SiGe heterojunction bipolar transistors (HBTs), which have recently emerged as a strong contender for RF and mixed-signal applications. The impacts of scaling on key performance metrics such as speed and noise are explored, and both theory and data show that scaling, both vertical and lateral, has mostly beneficial effects on these metrics. However, it is shown that the scaled devices are increasingly vulnerable to device reliability issues due to increased electric field and operation current density. Bipolar transistor scaling rules are reviewed and compared with accumulated reported data for verification. A review of scaling limits suggests that bipolar scaling has not reached the physical fundamental limit yet, promising a continued improvement of bipolar performance in the foreseeable future.
    Preview · Article · Oct 2005 · Proceedings of the IEEE
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