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In wireless sensor networks (WSNs), batteries are unlikely to be replaced or recharged once they get depleted, because of costs and feasibility. In a typical application, sensor nodes should be accessible and able to respond within a defined period of time, especially in real-time applications. However, the idle listening of the radio wastes most of the energy since the radio transceiver is constantly active. On the other hand, putting it into sleep state disconnects the node from the network. To cope with such a challenge, an ultra-low-power radio receiver referred to as a wake-up receiver (WuRx) handles the idle listening while keeping the main radio completely off. A WuRx consumes much less power than the main transceiver and triggers an interrupt only when a packet with a user-defined address is received. Embedding such a device enables better event-triggered applications where real-time behavior is required and a longer lifetime is mandatory. The proposed WuRx features practical sensitivity and includes the minimum number of active components in order to remain within the power budget. In this paper, an ultra-low-power WuRx with a power of 7.5ĝ W and a sensitivity of-60 dBm is developed. The decoding process of 16 bit of a wake-up packet (WuPt) takes less than 15 ms.
Content may be subject to copyright.
J. Sens. Sens. Syst., 5, 433–446, 2016
© Author(s) 2016. CC Attribution 3.0 License.
An 868 MHz 7.5 µW wake-up receiver with 60 dBm
Sadok Bdiri1, Faouzi Derbel1, and Olfa Kanoun2
1Faculty of Electrical Engineering and Information Technology, Leipzig University of Applied Sciences,
Wächter Str. 13, 04107 Leipzig, Germany
2Faculty of Electrical Engineering and Information Technology, Chemnitz University of Technology,
Reichenhainer Str. 70, 09126 Chemnitz, Germany
Correspondence to: Sadok Bdiri (
Received: 7 September 2016 – Revised: 13 November 2016 – Accepted: 21 November 2016 – Published: 22 December 2016
Abstract. In wireless sensor networks (WSNs), batteries are unlikely to be replaced or recharged once they get
depleted, because of costs and feasibility. In a typical application, sensor nodes should be accessible and able
to respond within a defined period of time, especially in real-time applications. However, the idle listening of
the radio wastes most of the energy since the radio transceiver is constantly active. On the other hand, putting
it into sleep state disconnects the node from the network. To cope with such a challenge, an ultra-low-power
radio receiver referred to as a wake-up receiver (WuRx) handles the idle listening while keeping the main radio
completely off. A WuRx consumes much less power than the main transceiver and triggers an interrupt only
when a packet with a user-defined address is received. Embedding such a device enables better event-triggered
applications where real-time behavior is required and a longer lifetime is mandatory. The proposed WuRx fea-
tures practical sensitivity and includes the minimum number of active components in order to remain within the
power budget. In this paper, an ultra-low-power WuRx with a power of 7.5 µW and a sensitivity of 60 dBm is
developed. The decoding process of 16 bit of a wake-up packet (WuPt) takes less than 15 ms.
1 Introduction
The purpose of controlling one’s surroundings in the physi-
cal world has become more relevant thanks to wireless sensor
networks (WSNs). These networks include devices equipped
with certain sensors in order to monitor the occurrence of
ambient data and transmit them in an untethered manner. De-
pending on the field of application, commonly, sensor nodes
should be able to be deployed with major independency of
wired power sources and using batteries instead. Presently,
without energy saving techniques, a small battery with a large
capacity together with the amount of demanded energy from
a single node presents a real challenge when the lifetime
of years is a requirement. Besides, to applications like haz-
ardous work environments, nodes are unreachable once de-
ployed; thus, maintenance becomes an even harder task. Fur-
thermore, as a WSN incorporates a large number of nodes,
which can go from tens to hundreds, the cost of a single
node from production to maintenance should be as minimal
as possible. A sensor node mainly includes a processing unit,
a radio chip, sensor(s), and a power source. The radio com-
ponent spends most of the energy among the other parts. Re-
searchers tend to reduce the power consumption by acting on
the radio part. Commonly in WSNs, fewer data are transmit-
ted in comparison to classical networks. Therefore, the radio
can be principally turned off to save energy. On the other
hand, this makes the sensor node unreachable and unable to
respond to incoming packets from adjacent peers. Such an as-
pect causes a trade-off between the power consumption and
the radio chip activity.
As a low-power constraint is severely challenging, the life-
time condition required for certain WSN applications must
be fulfilled. One common solution targets communication
protocols using a duty-cycled radio receiver scheme (illus-
trated in Fig. 1). Although the activity time of these radios is
reduced, a price of higher latency is paid when the radio is
in sleep state for a long period of time. Such a configuration
Published by Copernicus Publications on behalf of the AMA Association for Sensor Technology.
434 S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity
Figure 1. Communication scheme in a duty-cycled radio.
applies to several scenarios. However, severe real-time pref-
erences show that the overall system latency must be kept
as short as possible, for which a very low duty-cycle radio
scheme may be irrelevant. Conversely, an on-demand scheme
is more likely to have very low communication latency with
a reasonable energy consumption. Low-power radios known
as wake-up receivers (WuRx) are intended to replace the
main transceivers for idle listening tasks while consuming
much less power. For extremely low latency communication,
WuRx has to remain always on. If an ultra-low energy con-
sumption can be realized, the sender network saves more en-
ergy and can last longer than a network using a duty-cycle
scheme. The main feature of the WuRx is to induce an inter-
rupt mostly to a processing unit upon reception of a special
radio frequency (RF) or wake-up packet (WuPt). Afterwards,
the host node powers on the main transceiver to initiate the
conventional network communication.
A WuRx, with a unique identifier, should incorporate a
digital baseband (DBB) to identify WuPt and avoid false pos-
itives. Commonly, WuRx designs adopt the ON/OFF keying
(OOK) modulation technique due to its architectural sim-
plicity. As WuRx consumes much less than conventional re-
ceivers, performance parameters such as sensitivity are de-
graded. State-of-the-art WuRxs work on improving the en-
ergy consumption and sensitivity by either enhancing the re-
ceiver architecture or choosing a more suitable technology. A
passive radio receiver architecture was introduced by Gu and
Stankovic (2004). The device uses the RF signal to raise a
voltage level which will behave as an interrupt to the micro-
controller (MCU). As an addressing technique, each WuRx
receives a wake-up packet on a different frequency. Undoubt-
edly, such a hardware design increases complexity for both
a wake-up transmitter (WuTx) and WuRx. The WuRx has an
interesting power consumption, but with a poor sensitivity.
Improving the latter requires active elements. Nonetheless,
more recent WuRxs manage to carefully realize it to end up
with a balanced trade-off of energy/performance.
In this paper, we realize a low-power sensor node equipped
with an ultra-low-power WuRx with at least 56 dBm sen-
sitivity. The WuRx performs in sub-GHz bands, specifically
868 MHz. A discussion of recent WuRx designs is presented
in Sect. 2. In Sect. 3, the proposed WuRx’s system design
Matching Rectifier Lowpass
868 MHz
Switch Control
Figure 2. Proposed WuRx of Gamm et al. (2014).
is introduced. Hardware implementation details followed by
the measurement results and a comparison with other designs
are given in Sect. 4. Finally, conclusions and a summary of
the results will be given in Sect. 5.
2 Design space
2.1 Architecture considerations
Realizing that the possibility of lowering the power con-
sumption to an extreme low level is an idea which has been
suggested by many contributors through the years. It starts by
wondering how to detect an RF signal and how sensitive and
power-hungry an RF detector can be. We can find sophisti-
cated techniques which achieve excellent detection sensitiv-
ity, but they dissipate more energy. As a commonly pursued
strategy, the focus on designing wake-up radios using passive
detection to guarantee the low-power budget is followed by
attempts at enhancing sensitivity as well as other features.
Recent works (Pletcher et al., 2008; Marinkovic and
Popovici, 2011) have focused on improving a single fea-
ture at the cost of another, a trade-off of power consumption
and sensitivity. In the real world, most applications require a
practical balance of this trade-off in order to respond to the
desired performance. Publications like Gamm et al. (2014)
and Hambeck et al. (2011) considered coping with that chal-
lenge. The efforts can be seen in the introduced WuRxs with
53 and 71 dBm sensitivity levels and consuming 8.4 and
2.4 µW, respectively.
The WuRx as seen in Fig. 2 from Gamm et al. (2014)
mainly down-converts the RF signal from 868 MHz to
125 kHz using zero bias Schottky diodes, which are config-
ured as an AC–DC rectifier.
The incoming signal is OOK modulated where from the
transmitter side, a digital bit “1” is encoded by transmit-
ting the RF carrier, while a “0” is simply the absence of
the carrier. The rectified signal is a square-wave waveform
with a frequency equal to OOK signal bandwidth. The lat-
ter is, then, fed to a low-frequency WuRx AS3932. The de-
vice can correlate an up to 32 bit OOK modulated address
with a sensitivity of 100 µVRMS, and it represents the main
wanted feature (Austrian Mikro Systeme, 2009). In the end,
when the address pattern, encoded in the incoming signal,
matches the one configured in the AS3932’s registers, the
device generates an interrupt to the MCU. In Magno et al.
J. Sens. Sens. Syst., 5, 433–446, 2016
S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity 435
(2016), a 55 dBm WuRx is introduced. It utilizes a com-
parator to digitize the signal coming from the passive enve-
lope detector to further feed it to a MCU. The offset voltage
of the comparator sets the sensitivity of WuRx and dominates
the entire WuRx energy consumption (1.2µW) when MCU is
in deep sleep. As soon as the MCU starts decoding, the en-
ergy consumption increases to nearly 65 µW, which makes it
highly susceptible to interferences and unwanted packets. A
super-regenerative-based WuRx featuring a high sensitivity
of 97 dBm is introduced in Petäjäjärvi et al. (2016). The
WuRx has a power of 40 µW at a operational frequency of
28 MHz. As high-speed elements tend to consume more en-
ergy, the consumption for this WuRx is only reasonable.
2.2 Technology considerations
WuRxs have been designed using either CMOS or off-the-
shelf components. Concerning CMOS-based chips, publica-
tions have introduced prototypes with practically higher sen-
sitivity (Pletcher et al., 2008; Hambeck et al., 2011; Huang et
al., 2014) than that of other architectures. In spite of draining
a considerably high current, the overall power consumption
remains low since they can operate at a very low voltage.
In Pletcher et al. (2008) and Huang et al. (2014), the energy
consumption is over 50 µW, which is still considered high
for most event-triggered WSN applications. Passive enve-
lope detectors based on nonlinear passive components such
as Schottky diodes are often used to remain within the power
budget. Standard CMOS features nonlinear characteristics
and can be expressed by the exponential function of a diode’s
current IDin Eq. (1).
where VDand ISare the diode’s forward voltage and satu-
ration current, nis the ideality factor, and VTis the thermal
voltage (Hambeck et al., 2011). At a small signal, which rep-
resents the weak-inversion region of a MOS transistor, Schot-
tky diodes and MOS transistors perform in a very similar
manner when equally current biased. However, such detec-
tors have poor sensitivity. Therefore, pre-amplification is re-
quired to improve the radio sensitivity. Power-hungry com-
ponents can accomplish such a task. It is challenging to im-
plement them in a WuRx design.
A time-to-market factor has to be acknowledged when
choosing a technology to design a WuRx. Particularly, de-
signing CMOS integrated circuits (ICs) such as application-
specific integrated circuits (ASICs) is pricey in terms of de-
signing time and prototyping costs in spite of the potential
performance. However, the benefit occurs when mass pro-
duction is planned. Moreover, field programmable gate ar-
rays (FPGAs) have the benefit of reducing production and
non-recurring engineering (NRE). Some works incorporated
FPGA chips mainly to perform as a DBB for address corre-
lation with an energy consumption of a minimum of 5 µW
Figure 3. Wake-up receiver block diagram.
(Al-Uraiby et al., 2012; Pons et al., 2012; Jean-François et
al., 2013; Rosello et al., 2011). The proposed WuRx uses
off-the-shelf components with the purpose of accomplishing
expeditious prototyping.
3 System design
Simplicity, sensitivity and energy consumption represent the
main characteristics of an ultra-low-power WuRx. However,
trade-offs exist between all the mentioned features; thus,
finding an optimal point in between has been an interest-
ing challenge. All along the designing process of the WuRx,
power consumption remained the number one issue to be
controlled in every single step. Low-power active compo-
nents are incorporated for the purpose of enhancing the sen-
sitivity of the WuRx. In this section, the design analysis of all
blocks of WuRx are discussed. The different parts of a WuRx
circuit are illustrated in Fig. 3.
3.1 Envelope detector
The overall performance of WuRx severely depends on the
envelope detector characteristics. For such a reason, compo-
nents are carefully chosen in order to achieve the desired ob-
jectives of the introduced design. The envelope detector de-
tects the incoming signal by means of a passive receiver, no-
tably using Schottky diodes HSMS-2852. The latter are zero
biased and they provide fast switching. The diodes are opti-
mized to be used with an input power of less than 20 dBm
and below a frequency of 1.5 GHz (Avago Technologies,
The detector is configured as a Greinacher voltage doubler.
Such a configuration provides higher output voltage. The ad-
vantage of using such a configuration over a single diode is
the voltage doubling at the output and also the increase in the
signal-to-noise ratio (SNR).
The slopes of the output voltage of both configurations
are illustrated in Fig. 4. The voltage doubler also acts as a
half-wave rectifier in order to perform an RF-to-DC conver-
sion. Conversely, the envelope detector is able to interpret
an incoming OOK modulated signal. As mentioned earlier,
the output signal swings between two voltage levels with re-
spect to the input signal. Accordingly, the resulting output is J. Sens. Sens. Syst., 5, 433–446, 2016
436 S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity
-50 -40 -3 0 -20 -1 0 0 10 20
Voltage (V)
Input power (dBm)
Voltage doubler
Single diode
Figure 4. Envelope output variation at two different configurations.
a square signal with a frequency equal to the ON/OFF fre-
quency of an OOK signal.
3.2 Ripple filter
As the rectifier tends to convert a sinusoidal signal into a DC
signal, the output voltage will have AC components referred
to as ripples. The circuit is configured as a half-wave recti-
fier. A distorted DC output has an impact on the overall per-
formance of the complete circuit. Therefore, a ripple filter is
added to fade out the undesired AC component.
With a shunt capacitor C2connected to the rectifier
(Fig. 5a), the ripple voltage is decreased, thus having a
smoothed output. However, at very low RF input power
(<50 dBm), the reduced ripple voltage still severely af-
fects the output signal, which results in an alternating voltage
instead of a constant DC output. Fig. 6 illustrates a simulation
of rectified output voltage with an input power of 55 dBm
at 868 MHz.
A decrease in RLwill induce less output voltage with
larger ripples. Adding a series inductor Lforms an L-type
LC filter (Fig. 5b). The reactance of the inductor XLopposes
the AC components without reducing the DC output voltage.
A capacitor filter is connected across the load resistance RL.
The property of a capacitor is that it blocks the DC compo-
nent and lets the AC component through. When the rectifier
is fed with an AC signal, the capacitor charges rapidly to the
peak voltage of the initial pulse. Depending on the value of
RL, the capacitor will discharge until it is fed with the sec-
ond pulse. Thus, the ripple is shorted to the ground but DC
appears at the output. Considering the reactance XLand XC
of Land C, respectively, where
2ωC XL=2ωL ω =2πf, (2)
Figure 5. RF–DC rectifier with (a) capacitor filter, (b) L-type LC
filter, (c) π-type LC filter and (d) π-type and L-type LC filters.
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.50.0 5.0
Time (µs)
Voltage (µV)
Figure 6. Output voltage of the rectifier with an L-type LC filter
(Fig. 5b).
the ripple factor γin terms of XLand XCis calculated ac-
cording to the following expression.
An increase in Land Cnarrows the ripple factor. Never-
theless, Lhas to be large enough (>10 µH) to significantly
reduce the ripple which will result in a big inductor size
and manufacturing costs. Further improvement is made by
adding another capacitor C3configured according to Fig. 5c.
This setup is called a π-type LC filter and the new ripple
J. Sens. Sens. Syst., 5, 433–446, 2016
S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity 437
factor expression is as follows:
From Eqs. (3) and (4), a comparison between the perfor-
mance of a πfilter and an LC filter yields the expression
(Eq. 5)
Consequently, the DC output has less ripple, with the advan-
tage of an acceptable inductor value range. This configura-
tion depends additionally on RLand C3, which means the
lower the RLand C3, the higher the γ. A transient simula-
tion of the output voltage is shown in Fig. 7. Use of high-
impedance RLis acceptable since the circuit does not drive
high loads. Besides, by cascading stages of L-type LC filters
(Fig. 5d), γis much more reduced but requires additional
components. In the introduced design, one π-type LC filter
meets the required needs.
3.3 Intermediate-frequency amplifiers
Address decoder AS3933 (Austrian Mikro Systeme, 2010)
has a sensitivity of a minimum of 80 µVRMS, which is sim-
ilar to that of AS3932. Concerning HSMS-2852, tangen-
tial sensitivity TSS is 57 dBm for carrier frequency fc=
915 MHz and video bandwidth Bv=2 MHz (Avago Tech-
nologies, 2009). TSS stands for the lowest input signal power
level higher than the minimum detectable signal, which cor-
responds to an 8 dB SNR at the output (Avago Technologies,
2010). Several noise sources contribute to degrading TSS,
most notably, thermal noise, shot noise and flicker noise.
Lowering Bvmainly reduces thermal noise, thus improving
TSS (SkyWorks Inc., 2008). Other efforts can be made to
improve the noise quality. According to Gamm et al. (2014),
the decoder is able to decode a signal with a minimum in-
put power of 52 dBm. It can be seen that AS3932 limits
the overall WuRx sensitivity as it is directly connected to the
detector. An amplification needs to be performed in order to
shift a small-signal voltage level coming from the detector
above the minimum detectable voltage level of the AS3933.
Small-signal amplification within the micro-power budget
faces several challenges. As a matter of fact, available com-
mercial low-power amplifiers generally feature a high input
offset voltage VOS, a low slew rate and a low gain–bandwidth
product (GBP). To raise an 18 kHz signal voltage level from
µV to a detectable voltage, such amplifiers are not suitable
for accomplishing the task. Instead, higher-performance de-
vices are required. To preserve energy, amplifiers should
function only during the WuPt decoding and remain shut
down during channel monitoring of WuRx. In this work, the
ON/OFF switching is controlled by a different block named
an intermediate-frequency logic controller (IFLC). Now, the
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.50.0 5.0
Time (µs)
Voltage (µV)
Figure 7. Output voltage of the rectifier with a π-type LC filter
(Fig. 5c).
nature of on-demand applications of WSNs and WuRx shows
that, generally, nodes are in sleep state and power on only
when the necessary communication takes place. Despite the
amplifiers’ high power consumption, with such a communi-
cation scheme, the resulting low duty-cycled amplifiers of-
fer a very low overall energy consumption, which meets the
power efficiency requirements. The overall power consump-
tion of IF amplifiers PAmp is calculated in the following ex-
IAmp =DIAmp_Active +(1 D)IAmp_Sleep,(6)
where PAmp_Active is the power consumption of the amplifier
when active for tActive and PAmp_Sleep when sleep/shutdown
for tSleep and the applied duty cycle D=tActive
tActive+tSleep . Now,
according to the bandwidth expressed in Eq. (7) of an opera-
tional amplifier, the higher the gain, the lower the bandwidth.
Bandwidth =Gain–bandwidth product
Closed loop gain (7)
The proposed design requires high precision and efficiency
amplifiers with an optimal frequency / performance ratio.
Other than VOS, GBP, IAmp_Sleep, and IAmp_Active, other pa-
rameters should be taken into consideration to achieve the
desired precision. Characteristics like input offset current IOS
and input bias current IBaffects directly the VOS, which rep-
resents the DC error added to the desired voltage output.
With the increase in the stage gain, errors become more sig-
nificant and disturb the following circuit block. These er-
rors affect more the performance of opAmp when config-
ured as non-inverting, inverting or follower. However, in-
strumentation amplifiers overcome offset problems and are
compensated for a specific gain with high precision and in-
creased common-mode rejection (CMRR) performance. The
proposed WuRx adopts three stages of the MAX4461T in- J. Sens. Sens. Syst., 5, 433–446, 2016
438 S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity
Current (µA)
Figure 8. Overall IF amplifier power consumption deviation ac-
cording to the number of received WuPts per month.
strumentation amplifier where GBP =250 kHz at a closed-
loop gain of 20 dB, CMRR =120 dB, IAmp_Active =700 µA,
VOS =750 µV, and IAmp_Sleep =10 nA (Maxim Integrated,
2006). The MAX4461 has to last in active mode for a min-
imum amount of time (tWuPt tActive) to fully amplify the
WuPt signal. Activating the amplifier is done through a
SHDN pin.
The operation durations (tActive and tSleep) of the IF ampli-
fier are controlled by a different circuit block. The WuPt lasts
tWuPt =10.36 ms and the SHDN is guaranteed to be driven
for tActive =15 ms to meet the condition expressed earlier. To
simulate the overall power consumption of the IF amplifier,
the number of the received packets increases and the duty
cycle Dis set for a total period of 1 month. According to
Eq. (6), the total energy consumption changes proportionally
and the variation is plotted in Fig. 8.
Once a wake-up packet (WuPt) is received, the IF ampli-
fiers switch to active mode by means of an incoming signal
at the SHDN pin. The signal is a low-to-high pulse which has
to last slightly more than wake-up packet duration to avoid
additional power loss. A current drain of IAmp =0.13 µA for
a number of received packets of 104per month satisfies the
required energy budget of the WuRx. However, 10e4packets
per month is considered very high traffic based on the nature
of on-demand or real-time applications.
3.4 Intermediate-frequency logic controller
The IF amplifier activates only when SHDN is driven HIGH
by an IFLC. The idea is to generate a low-to-high pulse us-
1 2 3 4 5 6 7 8 9 100 11
Time (ms)
Voltage (mV)
1 2 3 4 5 6 7 8 9 100 11
Time (ms)
Voltage (mV)
1 2 3 4 5 6 7 8 9 100 11
Time (ms)
Voltage (V)
Figure 9. (a) 18 kHz WuPt simulation (carrier burst); (b) peak de-
tector waveform. (c) Final generated pulse by an IFLC.
ing the received WuPt signal. The AS3933 decodes a spe-
cific WuPt structure illustrated in Fig. 10. Unlike the data
in WuPt, the carrier burst length is set to be unchanged. Ac-
cordingly, the preamble and data pulses in WuPt are not taken
into consideration to generate the wanted SHDN signal. The
carrier burst lasts tC'1
2tWuPt '5 ms. The carrier burst has
a square-wave nature with a frequency of 18kHz, as can be
seen in the simulation (Fig. 9a). Extracting a pulse from an
AC signal is similar to signal frequency down-conversion. In
the current design, the IFLC is configured to perform a fre-
quency down-conversion from 18 kHz to 33 Hz. The rectifi-
cation process in the IFLC is done by means of two stages
of operational amplifiers (opAmp). Because of a GBP of
3.5 kHz, the opAmps rise and fall durations of the output
voltage are longer than that of the input signal. The circuit
is configured as a non-inverting configuration with a gain of
at least 30 dB per stage. An increase in gain results in an in-
crease in rise and fall time. Therefore, the obtained signal is
a rectified voltage of the carrier burst. A simulation is illus-
trated in Fig. 9b. The amplitude varies proportionally with
the input power of the WuRx. Moreover, the logic level of
J. Sens. Sens. Syst., 5, 433–446, 2016
S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity 439
18 kHz carrier burst
Sep. bits + preamble 16-Bit pattern
[0I 0I 0I 1I 0I 1I 0I 1]I [1I 1I 0I 1I 0I 1I 1I 0I 0I 1I 1I 0I 1I 0I 0I 1]
868 MHz RF carrier
18 kHz IF carrier
'1'Ibit '0'Ibit
Figure 10. AS3933 wake-up packet structure.
SHDN implies that a HIGH signal should have an amplitude
of minimum 0.7 VCC, and a LOW signal has to be maximum
of 0.3 VCC. A comparator is incorporated to guarantee such
logic control. The SHDN pulse is illustrated in Fig. 9c. The
opAmp has a typical input voltage offset VOS = −100 µV,
which proportionally increases with the gain and consumes
IOpAmp =330 nA. The comparator functions by comparing
the input signal voltage to a reference voltage, and then yields
a digital signal indicating which is greater. In this design,
a suitable reference voltage together with comparator hys-
teresis are used to overcome false positives induced by ei-
ther noise or DC offset. The chosen comparator TLV3691
consumes ICmp =75 nA with a maximum propagation de-
lay tPD =45 µs (Texas Instruments, 2013). The overall power
consumption of the IFLC is calculated in the following ex-
IIFCL =2IOpAmp +ICmp =735 nA (8)
3.5 Address decoder
AS3933 is a three-channel low-frequency WuRx which oper-
ates within the 15–150 kHz frequency range. In the proposed
design, the WuRx uses the ON/OFF low-power listening
mode for energy economy. The mode functions by activat-
ing all three channels simultaneously for a duration of 1 ms
and deactivating them for a specific duration tAS3933_Sleep
which reaches a maximum value of 8 ms. The decoder is
able to decode a 16/32 bit OOK modulated wake-up pat-
tern. The WuPt structure should comply with the decoder’s
as described by the manufacturer. The sequence contains a
carrier burst, separation bits, a preamble, and a user-defined
pattern. The AS3933 supports Manchester-encoded packets.
However, to avoid further complications in WuPt generation,
Manchester encoding is disabled. On the other hand, the de-
coder has a set of timing rules regarding carrier burst, pream-
ble, and pattern durations and that depends on carrier and
clock frequencies. For a carrier frequency fc=18 kHz, the
two following relations are mainly used to determine the ex-
act timings of the different parts of the WuPt in order to fulfill
the AS3933 protocol rules.
fRCClk =fc
fRCClk +8
< tC<155
where fRCClk is the clock frequency. From Eqs. (9) and (10),
tC=4.9 ms is chosen in the current design and fRCClk =
31.5 kHz. Moreover, the decoder incorporates a specific pro-
tocol with the purpose of recognizing preamble and pattern
bits. A “1” bit for the decoder is a successive number NC_Tof
ON/OFF periods of the carrier signal which has to last a user-
defined number NCLK_Tof clock periods. The same principle
applies for a “0” bit, but only with the complete absence of
the carrier (OFF periods). The internal RC oscillator is used
to generate the clock signal. The AS3933 supports a bit rate
within the range of [1,8]kbit s1. According to the design
requirements, AS3933 is programmed to perform an address
decoding at a bit rate of 4.57 kbit s1. The decoder uses a
clock signal to help frequency and bit detection. The number
of clock periods varies depending on the chosen bit rate and,
in this case, NCLK_T=7. Conversely, the carrier has to last a
number of ON/OFF periods NC_Tequal to seven clock peri- J. Sens. Sens. Syst., 5, 433–446, 2016
440 S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity
ods. The relation is calculated in the following expression.
A WuPt, which complies with the above settings, is illus-
trated in Fig. 10, where fc=18 kHz, NC_T=4 and the pat-
tern is 0xD669. The total WuPt duration is tWuPt =10.3 ms.
With a 16 bit address length it is possible to have 256 unique
patterns when Manchester encoding is disabled and 65 536
otherwise. AS3933 supports three modes of operation: stan-
dard listening, scanning mode and ON/OFF mode. For the
first, all channels are active simultaneously. For scanning
mode, the listening is done on the channels one by one with
the condition of having one active channel only at a time.
The last mode scans all three channels at once for 1 ms, then
switches them off to conserve energy for a configurable time
toff ranging from 1 to 8 ms. For toff =8 ms, the current con-
sumption of AS3933 is measured at 1.7 µA.
3.6 Wireless module
An open-source WSn platform referred to as PanStamp AVR
(PanStamp, 2014) is used as a host for the designed WuRx.
It features a low-power 8 bit 8 MHz MCU, the Atmega328P
from Atmel (Atmel, 2016). Additionally, the PanStamp in-
corporates the CC1101 radio chip (Texas Instruments, 2007),
which operates at 433 and 868–915 MHz. The total power
consumption of both chips in the lowest power-saving modes
is PPan.S_Sleep =159 nA, which represents the main reason
for choosing the wireless module. To wake up the mote, an
interrupt has to be induced through a user-defined pin. The
WuRx induces the corresponding interrupt once the correctly
addressed WuPt is received. The PanStamp is also used as
a wake-up transmitter (WuTx) since the radio chip is able
to handle amplitude-shift keying (ASK) and OOK modula-
tion schemes. With the chosen configuration of the AS3933
in this design, the WuPt has a total length of 48 bytes.
The CC1101 supports a 64 byte transmission FIFO queue,
enough to handle the transmission of the complete WuPt.
Unlike Gamm et al. (2014), the number of bytes of a WuPt
exceeds the FIFO size because of the higher carrier frequency
(125 kHz) and the use of Manchester encoding. A solution
they adopted is by re-filling the FIFO queue each time it
is saturated until the WuPt is completely transmitted. Such
a procedure elevates the complexity of the design. More-
over, the CC1101 contains a specific packet structure pro-
vided in Fig. 11. The packet is programmed in such a way
that it matches the desired WuPt. Therefore, preamble, syn-
chronization, length and address fields are set to the 0xAA
value to represent the carrier burst of WuPt. The data field
contains the rest of the carrier burst, separation bits, pream-
ble and pattern bytes. The code redundancy check (CRC) is
disabled and its corresponding field contains 0x0 bytes. The
CC1101 is able to transmit a packet with transmission power
up to +11 dBm.
Fully configurable data fields in both Tx and Rx
Confiugarable fields in Tx but non removable in Rx
Automatically inserted in Tx and removed in Rx
Preamble bits
Sync word
1 Byte1 Byte
2/4 Bytesn Bytes n Bytes 2 Bytes
Figure 11. CC1101 packet structure.
Figure 12. Assembled WuRx PCB and attached to a host node.
4 System evaluation
In this section, a proof of concept for the presented WuRx de-
sign is carried out for experimental evaluation. Performance
evaluation is expressed in terms of input impedance match-
ing, power consumption, sensitivity, range communication
and addressing capability. Different test beds are necessary
to fill in a complete survey of measurements. A developed
proof of concept can be seen in Fig. 12.
4.1 Hardware implementation
To concretize the explored design, prototypes are realized
in order to gather multiple measurements. The circuitry is
based on off-the-shelf commercially available components.
The manufactured printed circuit board (PCB) is a two-layer
1.55 mm FR4 substrate with 35µm copper width. The WuRx
is interfaced with the host nodes through 24 pins. The WuTx
node and the WuRx are programmed for the evaluation pur-
pose. The execution flow chart is provided in Fig. 13.
Table 1 shows the general PCB characteristics of both
devices. Various aspects like crosstalk, electromagnetic in-
terference (EMI), electromagnetic compatibility (EMC) and
impedance matching are represented under the umbrella term
of “signal integrity”. Most important for the proposed de-
sign interest is the impedance matching. It can affect the
circuit to a great extent when dealing with high-frequency
J. Sens. Sens. Syst., 5, 433–446, 2016
S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity 441
IRQ handling
SPI interface
SPI interrupt
CC1101 interrupt
SPI interface
Deep sleep
Wake-up packet
data generaon
wake-up packet
WuTx node
WuRx node
Figure 13. WuTx and WuRx node execution flow chart.
Table 1. PCB settings of PanStamp AVR and WuRx.
WuRx PanStamp AVR
PanStamp (2014)
Layers (mm) 2 4
Substrate FR4 FR4
Thickness (mm) 1.55 1
Width (mm) 22 17.7
Length (mm) 37 30.5
signals. To avoid problems caused by such aspects, PCB
traces and transmission lines are carefully designed and kept
as short as possible. The theoretical load impedance of the
WuRx using the available diode model in advanced design
system (ADS) from Agilent (Agilent Technologies, 2016) is
Zload =33.6j392 . An impedance matching network is
essential to match the circuit to a 50 system for maximum
power transfer between source and load. Manufacturing con-
ditions alter the impedance of diodes with every released
product, thus deriving from a theoretical load impedance.
For such reasons, practical Zload is measured by means of
a network analyzer to be able to determine the appropriate
impedance matching network. However, the parasitic resis-
tance of the Schottky diodes changes with the induced signal
power, which alters the Zload of the circuit. A quasi-optimal
matching network is designed with respect to an input signal
power of less than 40 dBm. Nonetheless, component trim-
ming is also necessary to overcome the matching errors. A
measurement of the reflection coefficient S11 at the WuRx
input on a log-magnitude plot and a Smith chart is provided
in Fig. 14.
Changing the operation frequency of the WuRx within
[867, 870] MHz does not alter the performance of the circuit,
although a benefit is found as the frequency can be changed
freely within a certain bandwidth. An example could be the
Frequency [820.0 MHz, 910.0 MHz]
Gamma=0.019 + j0.007
Impedance = 51.904 + j0.765
868.0 MHz
830 840 850 860 870 880 890 900820 910
Frequency (MHz)
S11 (dB)
S11=-33.893 dB
868.0 MHz
S11=-30.032 dB
870.0 MHz
S11=-40.135 dB
869.0 MHz
Figure 14. Measurement of the reflection coefficient (S11/ 0) at the
input of the WuRx.
use of one channel for WuRx and another channel for normal
communication between nodes to avoid collision or interfer-
To characterize the performance of the WuRx, a voltage
output measurement of each block is performed individually
during the WuPt decoding phase. A data capture from an os-
cilloscope is shown in Fig. 15.
The WuTx is programmed to send two WuPts successively
every 0.5 s. The oscilloscope is triggered upon a received
HIGH level signal from the decoder. As explained in the pre-
vious chapter, the IFLC has to generate an enable pulse in
order to enable the IF amplifiers during reception of a WuPt.
The waveform of the pulse can be observed in Fig. 15. J. Sens. Sens. Syst., 5, 433–446, 2016
442 S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity
0 5 10 15 20 25 30 35 40 45
Voltage (mV)
0 5 10 15 20 25 30 35 40 45
Voltage (V)
0 5 10 15 20 25 30 35 40 45
Voltage (V)
0 5 10 15 20 25 30 35 40 45
Voltage (V)
Time (ms)
Ripple filter
IFLC opAmps
Figure 15. Measurement of ripple filter, IFLC opAmps, IFLC and
AS3933 outputs while receiving a WuPt with an input power of
40 dBm.
However, a delay is noticeable between the first WuPt and
the pulse, thus making the IF amplifiers amplify an incom-
plete WuPt. The latter does not comply with the decoder’s
WuPt protocol. The rise time of the opAmps output signal
causes the delay. Moreover, the second WuPt is sent after
1.6 ms, which is shorter than the fall time of the opAmps and
prevents the generated pulse from going LOW. Accordingly,
the second WuPt is not compromised and fed to the AS3933
after amplification. Furthermore, as a practice, two WuPts
are sent each time to compensate for the delay problem or by
extending the carrier burst.
110 dB 1dB step attenuator
WuTx WuRx
Figure 16. Assembled WuRx PCB and attached to a host node.
0 15 30 45 60 75 95 105
Time (s)
Current (mA)
Interrupted MCU (proper WuPt pattern)
WuRx (channel monitoring)
MCU: Sleep, WuRx: WuPt pattern mismatch
Figure 17. System current consumption in different operation
4.2 Sensitivity
One of the main challenges of designing the WuRx is to
achieve at least 55 dBm of sensitivity while remaining
within the ultra-low-power budget in order to have practi-
cal network coverage. Sensitivity is defined by the minimum
received signal power at which the circuit is able to success-
fully interpret the received packets. Nonetheless, packet error
rate (PER) is also essential to characterize the performance
of a radio receiver. A value of 1 % of PER is the tolerated per-
formance for WuRx. In order to retrieve experimental mea-
surement of the WuRx’s sensitivity, a WuTx is connected
to the WuRx with an attenuator in between as described in
Fig. 16. The WuRx is configured to transmit 100 WuPts with
J. Sens. Sens. Syst., 5, 433–446, 2016
S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity 443
Table 2. Current consumption of WuRx and PanStamp in different
Components Channel monitoring WuPt decoding
(µA) (µA)
Envelope detector 0 0
Ripple filter 0 0
IFLC 0.73 0.735
IF amplifiers 0.03 2090
AS3933 1.7 8
PanStamp 0.159 0.159
Total 2.53 2099
2 3 4 5 6 7 8 9
1052 3 4 5 6 7 8 9
10 6
Current (µA)
Figure 18. Average WuRx current usage as a function of the num-
ber of received WuPts per month.
a transmission power of PTx=3 dBm. Upon reception of a
WuPt, the decoder interrupts the MCU, resulting in a blink-
ing blue LED. A step further using the attenuator, the trans-
mission power is attenuated until no interrupt is induced to
the MCU. A successful interrupt can be seen till an attenu-
ation level of 63 dB. Now, a spectrum analyzer is connected
to the attenuator instead of the WuRx. At 868.01 MHz, the
measured signal amplitude varies within [−60.5,60]dBm,
with the same attenuation level. Therefore, the WuRx’s min-
imum sensitivity is considered to be PS= −60 dBm.
4.3 Power consumption
Energy usage characterizes a WuRx design. With that in
mind, an energy usage profile analysis is performed on a host
node with an embedded WuRx. The measurement covers
possible system operational modes. As illustrated in Fig. 17,
the measurements last 110 s. At first, the WuTx is config-
Table 3. Range test at different WuTx transmission powers.
Transmission power Distance
(dBm) (m)
10 8.3
0 26.2
3 40.2
10 82.5
11 92.9
Table 4. Wake-up receiver specifications summary.
Specification Value Condition
Sensitivity 60 dBm 4.57 kbit s1, PER =1 %
10.3 ms latency
Input impedance 33.6j392Simulated
Wake-up pattern 16 bit No Manchester
Bit rate 1–8 kbit s1Decoder bit rate
Supply voltage 2.85–3.6 V
Current supply 2.53 µA Channel monitoring
2099 µA WuPt decoding
Power-on time 10 ms
ured to continuously send two WuPts every 0.5 ms. The pat-
tern included in the WuPts matches the one configured in the
WuRx’s decoder. By starting the measurement, the receiving
node is set to deep sleep mode, while the WuRx monitors the
channel for an incoming WuPt. On average, the system con-
sumes 2.5 µA of current. After an elapsed time of 35 s, the
WuTx starts transmitting WuPts, making the WuRx success-
fully interrupt the MCU. The consumption jumps to 4 mA;
the MCU remains active for certain time while performing
tasks, and then switches back to deep sleep mode. After a to-
tal duration of 70 s, the WuTx is programmed to send WuPts
with patterns different than that of the WuRx. After initiat-
ing the WuPts transmissions, the WuRx consumes 2.1 mA,
which is mostly caused by the IF amplifier stages.
Furthermore, Table 2 summarizes the current consumption
of WuRx parts for different operation modes including the
host node. The WuPt power consumption is crucial when de-
coding a WuPt.
Application of a WuRx implies that a WuPt is sent only at
event-triggering trends. For such reasons, the total duration
in which the WuRx decodes a WuPt is significantly less than
the duration of channel monitoring. For evaluation purposes,
the WuRx’s activity time is set at tActive =35 ms. The average
current consumption IWuRx is calculated in Eq. (12).
IWuRx =ICM +D(IDICM),(12)
where ICM and IDare the current consumptions of WuRx
in the channel monitoring and WuPt decoding states, respec-
tively. In this case, Dis the duty cycle of the WuRx’s activ-
ity over a total period ttotal =1 month, and it is expressed in J. Sens. Sens. Syst., 5, 433–446, 2016
444 S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity
Table 5. Wake-up receiver prototype comparison.
This work Hambeck et Marinkovic and Gamm et Pletcher et
al. (2011) Popovici (2011) al. (2014) al. (2008)
Frequency (GHz) 0.868 0.868 0.433 0.868 2
Current (µA) 2.5 2.4 0.270 2.78 104
Sensitivity (dBm) 60 71 51 53 72
Range (m) 82b304c10d37bN/A
Data rate (kbps) 4.5 20/200 5.5 NA 100
Addressing X X X X
Implementation OtSa130 nm OtSaOtSa90 nm
aOff-the-shelf. b10 dBm Tx power. c6.5 dBm Tx power. d0 dBm Tx power.
Eq. (13).
The resulting relation is plotted in Fig. 18.
For 104received WuPts packets in 1 month, the average
current consumption is IWuRx =2.76 µA.
4.4 Range
Improving a radio receiver’s sensitivity is mainly performed
to extend the wireless coverage of the network. Nevertheless,
other parameters like antenna gains and path losses also have
an impact on the communication distance R. The relations
between these parameters are expressed in the Friis equation
(Eq. 14).
4π R 2
where Prand Ptare, respectively, the received and transmit-
ted signal power. Grand Gtrepresent the antenna gains of the
receiver and the transmitter, respectively. However, such a re-
lation stands in an ideal condition where reflections, diffrac-
tions and atmospheric absorption are not present. Therefore,
the communication range is significantly different between
indoor and outdoor applications. A practical range test of
the network is realized in a free-space line-of-sight glance
to measure the maximum possible coverage. The WuTx is
set fixed on a pole at a height of 1.5 m and the WuRx is re-
allocated until no WuPt is received. The used antennas are
omnidirectional monopole antennas with a gain of 2 dBi. De-
pending on the WuTx transmission power, different obtained
ranges are listed in Table 3.
With a sensitivity of 60dBm, the resulting range be-
tween the WuRx and the WuTx is considered the widest
coverage achieved by a WuRx implemented with off-the-
shelf components whilst regarding the energy consumption.
At 10 dBm, a received WuPt is observed at a maximum dis-
tance of 82 m. As expected, this is lower than the equiva-
lent distance of 137.7 m, calculated from Eq. (14). Neverthe-
less, these results are still better than Gamm et al. (2014),
Marinkovic and Popovici (2011), and Magno et al. (2016).
Characteristic WuRx parameters are summarized in Table 4.
The present WuRx features are compared to those of re-
cently published ultra-low-power radios and are provided in
Table 5.
5 Conclusion
Ultra-low power for real-time constrained wireless WSNs is
introduced. The paper describes the rationale behind the sys-
tem design and the protocol details of a wake-up receiver.
A novel WuRx architecture is adopted by taking the benefit
from the communication scheme of an event-triggering ap-
plication. Such architecture makes it possible to enhance the
WuRx sensitivity while remaining within the micro-power
budget. The current design is able to achieve a sensitivity of
60 dBm while consuming 2.53 µA of a current in channel
monitoring mode and is able to decode a 16 bit wake-up pat-
tern. At 10 dBm of WuPt transmission power, a communica-
tion range of nearly 82 m in the line-of-sight scheme is ob-
served. Such coverage enables most of the on-demand WSNs
applications. The WuRx performance is affected by the inter-
ferences. Further revisions aim to resolve this issue as well
as incorporate an MCU and transceiver on the same board.
6 Data availability
The dataset of the envelope detector simulation can be ac-
cessed in an open repository by using the link below: http:
// (Bdiri, 2016).
J. Sens. Sens. Syst., 5, 433–446, 2016
S. Bdiri et al.: An 868 MHz 7.5 µW wake-up receiver with 60 dBm sensitivity 445
Sadok Bdiri received the engineering diploma in com-
puter and embedded systems from the National Engineering
School of Sousse (ENISo), Sousse, Tunisia, in 2011, an MS
degree in robotics from the National Engineering School of
Sfax (ENIS), Sfax, Tunisia, in 2013, and is currently pursu-
ing a PhD degree in information technology and electrical
engineering at the Leipzig University of Applied Sciences,
Germany. In addition to wake-up receivers, he is also con-
cerned with low-power radios and embedded systems.
Faouzi Derbel has been Professor for Smart Diagnostic and
Online Monitoring at the Leipzig University of Applied Sci-
ences, Germany, since 2013. His research activities are fo-
cused on wireless sensor networks and sensor systems with
intelligent signal processing. In 2001, he obtained his PhD
degree in electrical engineering from the University of the
Bundeswehr Munich. From 2000 to 2012 he held different
positions within Siemens and Qundis Advanced Measuring
Solutions, e.g., systems engineer, head of the product inno-
vation department and head of research and development.
In 2012, he was Professor for Electrical Measurement Tech-
nologies at the University of Applied Sciences Zwickau, Ger-
many. Faouzi Derbel is a member of many technical groups
dealing with short-range devices. He is Editor-in-Chief of the
ASSD (Advances in Systems, Signals and Devices, Issues on
Communication and Signal Processing, De Gruyter Verlag,
Germany) and holds many awards and patents.
Olfa Kanoun has been a university professor of measure-
ment and sensor technology at Chemnitz University of Tech-
nology, Germany, since 2007. Her research focus is on
the design of sensors and sensor systems. For more than
15 years, she has worked on power-aware wireless sensors
with a focus on energy harvesting and energy management.
Other research interests are in nanocomposite sensors and
impedance spectroscopy.
Acknowledgements. This work has been supported by the
Autarkic Intelligent Sensor Network For Production (AIS) project
within sub-project Energy-efficient and reliable wireless sensor
communication (EMT). The project is funded by the European
Science Foundation (ESF).
Edited by: R. Morello
Reviewed by: two anonymous referees
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... Conventional radios play a crucial role in WSN nodes' operation since they are frequently one of the most expensive components in terms of power consumption [1]. A common solution to obtain significant power savings consists in duty cycling the radio interface [2]; this is applied by turning it off and on again to save power using hibernation or sleep modes, or using it only when necessary, as defined by the unscheduled IEEE 802.11 communications protocol. The by turning it off and on again to save power using hibernation or sleep modes, or using it only when necessary, as defined by the unscheduled IEEE 802.11 communications protocol. ...
... To obtain high resistance, transistor M2 is a long-length, narrow device with a size of (80 nm/3 μm). Since it presents a feedback configuration, the input impedance of the circuit is given by (2), where Av represents the circuit AC gain. The AC gain increment ensures a high bandwidth, given as (3), since it relaxes the contribution of the parasitic Figure 9. RFED WuR with current-reuse amplifier [8]. ...
... To obtain high resistance, transistor M2 is a long-length, narrow device with a size of (80 nm/3 µm). Since it presents a feedback configuration, the input impedance of the circuit is given by (2), where A v represents the circuit AC gain. The AC gain increment ensures a high bandwidth, given as (3), since it relaxes the contribution of the parasitic capacitances due to M1 and P1. ...
Full-text available
Wireless sensor network (WSN) applications are under extensive research and development due to the need to interconnect devices with each other. To reduce latency while keeping very low power consumption, the implementation of a wake-up receiver (WuR) is of particular interest. In WuR implementations, meeting high performance metrics is a design challenge, and the obtention of high-sensitivity, high data rate, low-power-consumption WuRs is not a straightforward procedure. The focus of our proposals is centered on power consumption and area reduction to provide high integrability and maintain a low cost-per-node, while we simultaneously improve circuit sensitivity. Firstly, we present a two-stage design based on a feedback technique and improve the area use, power consumption and sensitivity of the circuit by adding a current-reuse approach. The first solution is composed of a feedback amplifier, two op-amps plus a low-pass filter. The circuit achieves a sensitivity of –63.2 dBm with a power consumption of 6.77 µA and an area as low as 398 × 266 µm2. With the current-reuse feedback amplifier, the power consumption is halved in the second circuit (resulting in 3.63 µA), and the resulting circuit area is as low as 262 × 262 µm2. Thanks to the nature of the circuit, the sensitivity is improved to –75 dBm. This latter proposal is particularly suitable in applications where a fully integrated WuR is desired, providing a reasonable sensitivity with a low power consumption and a very low die footprint, therefore facilitating integration with other components of the WSN node. A thorough discussion of the most relevant state-of-the-art solutions is presented, too, and the two developed solutions are compared to the most relevant contributions available in the literature.
... The LoRa shield is a single channel transceiver module that attains long distance communication in low data rates ranges. This module employs LoRa communication technology for data transfer [24]. The module is based on the Semtech SX1276/SX1278 chip and has been instrumental to the enormous growth in low-cost IoT applications [24]. ...
... This module employs LoRa communication technology for data transfer [24]. The module is based on the Semtech SX1276/SX1278 chip and has been instrumental to the enormous growth in low-cost IoT applications [24]. The Dragino shield as a sensitivity of over -148 dBm and +20 dBm power which has enabled achieve a very high link budget of 168 dBm [24]. ...
... The module is based on the Semtech SX1276/SX1278 chip and has been instrumental to the enormous growth in low-cost IoT applications [24]. The Dragino shield as a sensitivity of over -148 dBm and +20 dBm power which has enabled achieve a very high link budget of 168 dBm [24]. LoRa shields are generally very suitable for robust and long-range projects IoT projects [24]. ...
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SCADA provides real-time system monitoring by constant communication and data exchange between various system devices to achieve data visualization and logging. Presently, in industrial systems, commercial SCADA systems are being used for data monitoring and control. These systems can be expensive, and as such can only be afforded by select industries. Even at these costs, the commercial SCADA systems face some challenges, which include interoperability and scalability issues. Research has shown that these problems can be solved by the introduction of low-cost materials and open-source software to achieve data monitoring for all levels of processes. This paper proposes an open source, low-cost Internet of Things (IoT)-based SCADA system that employs the IoT architecture for SCADA functions. The proposed system is an improvement to the existing IoT solutions by eliminating cloud based IoT platforms and introducing a single machine system. This solution increases the robustness of the system while reducing costs. The proposed system prototype consists of voltage and current sensors, Arduino Uno microcontroller and Raspberry Pi. The sensors acquire data from the monitored unit. The Arduino Uno receives the data and processes them for transmission to the Raspberry Pi using the LoRa communication technology. At the Raspberry Pi, the local Chirpstack platform processes the data and displays the measured data using the Grafana dashboard for real-time data monitoring, and the data is stored in an InfluxDB database. For system validation purposes, the prototype is designed, developed, and set up to monitor the panel voltage, current and battery voltage of a solar photovoltaic system. The results obtained from the experimental set-up are compared with the test data from physical digital multimeters. The system presented in this paper is a low-cost, open source, scalable and interoperable system. This, therefore, makes the proposed SCADA system an alternative for commercial SCADA systems, especially for select applications. The system proposed in this paper can be deployed to large industrial systems with appropriate upgrades and customization. The main contribution of this research is the design and development of a SCADA system that performs all the functions of a proprietary SCADA system at a very low-cost with scalable and interoperability features which are the main limitations of the traditional SCADA systems.
... Battery capacity is developing at a very slow rate compared to other technologies, such as integrated circuits or software design. Therefore, energy efficiency has been the prime goal when designing and deploying WSNs [7,8]. Bachir et al. address the challenges related to the reliability of communication and the efficient use of the node's battery in WSN [9]. ...
... Therefore, in real-time communication, a wireless method with a very low duty cycle may be inadequate. Similarly, Bdiri et al. [8] introduced the wake-up receiver (WuRx), which handles idle listening while keeping the main radio completely off. The main function of WuRx is to send an interrupt signal to the processing unit when receiving a radio frequency (RF) or wake-up packet (WuPt). ...
... T Act,k contains the time parameters T W, T p and T D shown in Table 1, which depend on the node state. The consumed energy E Act,k is given in Equation (8). ...
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Wireless sensor nodes are heavily resource-constrained due to their edge form factor, which has motivated increasing battery life through low-power techniques. This paper proposes a power management method that leads to less energy consumption in an idle state than conventional power management systems used in wireless sensor nodes. We analyze and benchmark the power consumption between Sleep, Idle, and Run modes. To reduce sensor node power consumption, we develop fine-grained power modes (FGPM) with five states which modulate energy consumption according to the sensor node's communication status. We evaluate the proposed method on a test bench Mica2. As a result, the power consumed is 74.2% lower than that of conventional approaches. The proposed method targets the reduction of power consumption in IoT sensor modules with long sleep mode or short packet data in which most networks operate.
... The minimum input power needed for a successful detection is by −55 dBm. A more sensitive WuRx is introduced in [102,103], which consumes 7.5 µW at a voltage of 3 V with a sensitivity of −60 dBm. The achieved latency is in the range of 10 ms with a bit rate of 4.56 kbit/s. ...
... The achieved latency is in the range of 10 ms with a bit rate of 4.56 kbit/s. The performance of the mentioned designs is generally limited by the Schottky diode noise figure for detecting OOK-modulated (On-Off-Keying) signals [103]. Other concerned works enhance the transmission power efficiency of the WuPt. ...
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Nowadays, wireless sensor networks are becoming increasingly important in several sectors including industry, transportation, environment and medicine. This trend is reinforced by the spread of Internet of Things (IoT) technologies in almost all sectors. Autonomous energy supply is thereby an essential aspect as it decides the flexible positioning and easy maintenance, which are decisive for the acceptance of this technology, its wide use and sustainability. Significant improvements made in the last years have shown interesting possibilities for realizing energy-aware wireless sensor nodes (WSNs) by designing manifold and highly efficient energy converters and reducing energy consumption of hardware, software and communication protocols. Using only a few of these techniques or focusing on only one aspect is not sufficient to realize practicable and market relevant solutions. This paper therefore provides a comprehensive review on system design for battery-free and energy-aware WSN, making use of ambient energy or wireless energy transmission. It addresses energy supply strategies and gives a deep insight in energy management methods as well as possibilities for energy saving on node and network level. The aim therefore is to provide deep insight into system design and increase awareness of suitable techniques for realizing battery-free and energy-aware wireless sensor nodes.
... Nevertheless, recent developments have revealed exciting possibilities to enhan energy harvesting (EH) efficiency by designing suitable converters, combining converte in hybrid solutions, and adopting opportunities for wireless energy transmissio Developments in microelectronics enable significant energy savings, making an ener supply from ambient sources increasingly practicable. Wake-up receivers swit unnecessary system parts entirely off and reduce energy consumption during sleepi phases [4,5]. Data aggregation techniques [1], clustering, and intelligent routing realiz significant energy savings on the network level. ...
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Advanced sensors are becoming essential for modern factories, as they contribute by gathering comprehensive data about machines, processes, and human-machine interaction. They play an important role in improving manufacturing performance, in-factory logistics, predictive maintenance, supply chains, and digitalization in general. Wireless sensors and wireless sensor networks (WSNs) provide, in this context, significant advantages as they are flexible and easily deployable. They have reduced installation and maintenance costs and contributed by reducing cables and preinstalled infrastructure, leading to improved reliability. WSNs can be retrofitted in machines to provide direct information from inside the processes. Recent developments have revealed exciting possibilities to enhance energy harvesting (EH) and wireless energy transmission, enabling a reliable use of wireless sensors in smart factories. This review provides an overview of the potential of energy aware WSNs for industrial applications and shows relevant techniques for realizing a sustainable energy supply based on energy harvesting and energy transfer. The focus is on high-performance converter solutions and improvement of frequency, bandwidth, hybridization of the converters, and the newest trends towards flexible converters. We report on possibilities to reduce the energy consumption in wireless communication on the node level and on the network level, enabling boosting network efficiency and operability. Based on the existing technologies, energy aware WSNs can nowadays be realized for many applications in smart factories. It can be expected that they will play a great role in the future as an enabler for digitalization in this decisive economic sector.
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By modulating the electric field induced to a human body, it is possible to transfer data wirelessly using the body as a transmission medium. This method is referred to as human body communication (HBC), which has multiple advantages in comparison with the traditional radio frequency (RF) communication. First, it alleviates the traffic load from the radio channels, which are becoming more and more congested, as the number of connected wireless devices increases rapidly. Second, HBC can potentially provide higher security than traditional RF communication since the electric field stays in the vicinity of a human body, which makes eavesdropping more challenging. Third, the attenuation in the HBC frequency band is lower than in bands used by the other radio technologies for wireless body area networks. To improve energy efficiency in HBC, one approach is to utilize a wake-up receiver (WUR). The WUR is continuously listening for a pre-defined wake-up signal, which activates the other electric circuitry (e.g., sensing, processing, and communication). The use of WURs can significantly reduce the energy consumption and increase the lifetime of the sensing applications. In this work, we propose a superregenerative WUR solution which employs self-quenching and loose synchronization method and operating at sufficiently low (1.25 kbps) data rate in order to obtain high sensitivity while keeping the energy consumption low. This enables to achieve sensitivity of −97 dBm for 10−3 bit error rate while consuming only 40 μW. The details of the design and the performance evaluation results of the proposed solution are in the paper. Also, the paper reports the results of the practical measurements characterizing the impact of the electrode location on the path loss in an HBC channel. The presented results show that the proposed system can potentially enable communication between two any points on the body with low transmit power.
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Wireless sensor networks (WSNs) have received significant attention in recent years and have found a wide range of applications, including structural and environmental monitoring, mobile health, home automation, Internet of Things, and others. As these systems are generally battery operated, major research efforts focus on reducing power consumption, especially for communication, as the radio transceiver is one of the most power-hungry components of a WSN. Moreover, with the advent of energy-neutral systems, the emphasis has shifted toward research in microwatt (or even nanowatt) communication protocols or systems. A significant number of wake-up radio receiver (WUR) architectures have been proposed to reduce the communication power of WSN nodes. In this work, we present an optimized ultra-low power (nanowatt) wake-up receiver for use in WSNs, designed with low-cost off-the-shelf components. The wake-up receiver achieves power consumption of 152 nW (with-32 dBm sensitivity), sensitivity up to-55 dBm (with maximum power of 1,2 μW), latency from 8 μs, tunable frequency, and short commands communication. In addition, a low power solution, which includes addressing capability directly in the wake-up receiver, is proposed. Experimental results and simulations demonstrate low power consumption, functionality, and benefits of the design optimization compared with other solutions, as well as the benefits of addressing false positive (FP) outcomes reduction.
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Power consumption is a major concern for wireless sensor networks (WSNs) nodes, and it is often dominated by the power consumption of communication means. For such networks, devices are most of the time battery-powered and need to have very low power consumption. Moreover, for WSNs, limited amount of data are periodically sent and then the radio should be in idle or deep sleep mode most of the time. Thus using event-triggered radios is well suited and could lead to significant reduction of the overall power consumption of WSNs. Therefore this paper explores the design of an asynchronous module that can wake up the main receiver when another node is trying to send data. Furthermore, we implement the proposed solution in an FPGA to decrease the fabrication cost for low volume applications and make it easier to design, re-use and enhance. To decrease the static power consumption, we explore the possibility of reducing the supply voltage. The observed overall power consumption is under 5 μW at 250 kbps. Moreover, using a new asynchronous design technique, we observed that power consumption can be further reduced.
Conference Paper
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A wake-up receiver (WuRx) is used in wireless sensor networks (WSN) to detect wireless traffic directed to a node's receiver and activate it upon detection, improving network latency and energy dissipation by maximizing data transceiver sleep time. The always-on nature of the WuRx sets a power dissipation floor for the entire system. In realistic WSN scenarios, the adoption of a WuRx leads to energy savings only if it can be realized with about 50muW of power dissipation in Lin, E.Y., et al, (2004), testing the limits of low-power receiver design. While diode detectors provide for the simplest detector structure, such receivers are strongly gain-limited due to the thresholding effect of the nonlinear detector in Pletcher, N., et al, (2007) and adding gain at RF to improve sensitivity only increases power consumption. A more attractive approach is to adopt a heterodyne architecture, where the extra gain needed for robust energy detection can be obtained at an intermediate frequency (IF) with a much lower power cost. However, a survey of previous receiver designs for WSN reveals that the power requirements of the required local oscillator (LO) exceed the total power budget of the WuRx in Otis, B., et al, (2005).
Conference Paper
Sensor nodes often have to work for a long time with a single battery. A change of the power source is sometimes not possible or involves effort and costs. If the node needs to be accessible for communication at any point of time it must have a radio in permanent receive state. This depletes the battery in a few days. The contradiction between long lifetime and permanent accessibility can be solved by using a separate wake-up receiver on the node. In this work we present a sensor node with included wake-up receiver working in the 433MHz ISM band. Our solution consumes 2.8 μA of current in sleep state while still maintaining a realtime behaviour. The low current consumption is achieved by modulating a 125 kHz wake-up signal on the 433MHz carrier in the sender. In the receiving node a passive demodulation circuit extracts the wake-up signal and feeds it to an 125 kHz low frequency receiver IC. An additional 16 bit address coding is used for an selective wake-up of nodes.
An on/off keying receiver has been designed in 90 nm CMOS for low-power event-driven applications. Thanks to the synchronized-switching technique and power-efficient RF gain stages, this receiver achieves $-$86 dBm sensitivity (10 $^{-3}$ bit error rate) at 10 kbps while consuming 123 µW from a 1 V supply. The receiver is highly scalable in data rates from 1 kbps at 64 µW to 100 kbps at 146 µW power consumption. The center frequency of the receiver can be also programmed from 780 to 950 MHz, covering different sub-GHz bands worldwide. The receiver is fully integrated, although an external SAW filter can be added for better selectivity.
Conference Paper
This paper explores design methods applicable to Wireless Sensors Networks, where low power consumption and energy efficiency are a must. A key component that modulates the power consumption is the main radio. Controlling its use through suitable sleep modes and wake up mechanisms is a significant issue and can be done with a wake-up receiver. But many applications are associated with low fabrication volume where custom integrated circuits are not economical and where FPGAs are the best available solution. In this paper, we explore an asynchronous solution, which permits to decrease the internal activity, thus reducing the power consumption, including that required for clock distribution. We also propose an FPGA implementation of such a wake-up receiver using the NULL Convention Logic™. The overall power consumption of the reported implementation is as low as 5μW at 250 kbps.
Conference Paper
Achieving low power consumption, size reduction, increased efficiency, and space optimization are all challenges in Wireless Sensor Networks (WSNs). WSNs use duty cycle to improve its power efficiency, and wake-up radio (WUR) is used as a control channel to wake up WSN nodes. With its highly flexible features, a field-programmable gate array (FPGA) is one of the attractive candidates for implementing part of WSN devices, and previous works have demonstrated its suitability. In this work, we propose a low-profile WUR scheme and implemented its receiver components using FPGA. The low-profile WUR wakes up the rest of the WUR module of the recipient node only and eliminate unnecessary WUR-module activation of non-recipient nodes. Experimental results of implementing module show that the proposed solution can significantly eliminate unnecessary power consumption.
Conference Paper
In this paper the capabilities of ultra low power FPGAs to implement Wake-up Radios (WuR) for ultra low energy Wireless Sensor Networks (WSNs) are analysed. The main goal is to evaluate the utilization of very low power configurable devices to take advantage of their speed, flexibility and low power consumption instead of the more common approaches based on ASICs or microcontrollers. In this context, energy efficiency is a key aspect, considering that usually the instant power consumption is considered a figure of merit, more than the total energy consumed by the application.