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Effects of x-ray exposure on NOR and NAND flash memories during high-resolution 2D and 3D x-ray inspection
Abstract
In this paper, we present a detailed study on the effects of x-ray exposure on data corruption in commercially available NOR and NAND flash memory devices during x-ray inspection with a high-resolution Phoenix Nanomex system from GE. We investigated role of the x-ray tube voltage, tube current, device orientation, x-ray filters and photon energy. We explored the low exposure regime in detail when the first byte errors start occurring and also determined the absorbed dose for 100% byte errors. No data corruption was observed after the normal 2D x-ray inspection and CT scans of the NOR and NAND flash memory devices under study. However, increase in the tube voltage, tube current and/or the x-ray beam size resulted in byte errors which increased exponentially with the exposure time. The byte error rate was found to be much more sensitive to the tube voltage than the tube current. It was also affected by the device orientation with respect to the x-ray beam. The NAND flash memories were found to be more susceptible to data corruption from x-ray exposure than the NOR devices examined in this work. Some NOR devices were irradiated with the monochromatic x-rays from the CHESS synchrotron facility at Cornell University. Of all the photon energies used in this study, 12 keV x-ray irradiation resulted in the highest byte error rate. In this paper, we thus present a direct proof that it is the low-energy photon absorption that plays a major role in introducing bit errors in flash memories. Commonly available low-energy x-ray filters such as Cu and Al foils were found to be effective in preventing data corruption in such devices for long exposure time. Use of lower tube voltage, lower tube current, smaller x-ray spot size, short exposure time and low-energy x-ray filters, is recommended to prevent data corruption during 2D and 3D x-ray inspection of flash memory devices and other semiconductor devices in general.
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X-ray tomography is a promising technique that can provide micron level, internal structure, and three dimensional (3D) information of an integrated circuit (IC) component without the need for serial sectioning or decapsulation. This is especially useful for counterfeit IC detection as demonstrated by recent work. Although the components remain physically intact during tomography, the effect of radiation on the electrical functionality is not yet fully investigated. In this paper we analyze the impact of X-ray tomography on the reliability of ICs with different fabrication technologies. We perform a 3D imaging using an advanced X-ray machine on Intel flash memories, Macronix flash memories, Xilinx Spartan 3 and Spartan 6 FPGAs. Electrical functionalities are then tested in a systematic procedure after each round of tomography to estimate the impact of X-ray on Flash erase time, read margin, and program operation, and the frequencies of ring oscillators in the FPGAs. A major finding is that erase times for flash memories of older technology are significantly degraded when exposed to tomography, eventually resulting in failure. However, the flash and Xilinx FPGAs of newer technologies seem less sensitive to tomography, as only minor degradations are observed. Further, we did not identify permanent failures for any chips in the time needed to perform tomography for counterfeit detection (approximately 2 hours).
The ability to undertake non-destructive testing on semiconductor devices, during both their manufacture and their subsequent use in printed circuit boards (PCBs), has become ever more important for checking product quality without compromising productivity. The use of X-ray inspection not only provides a potentially non-destructive test but also allows investigation within optically hidden areas, such as the wire bonding within packages and the quality of post solder reflow of area array devices (e.g. BGAs, CSPs and flip chips). During X-ray inspection the sample is bathed in the ionizing radiation of high-energy photons, so the sample receives a radiation dose. Certain devices are susceptible to damage by ionizing radiation. Therefore, this susceptibility may require the user to consider the radiation dose being given to these items during the X-ray inspection process to ensure critical thresholds are not exceeded. This paper discusses the issues that a user of these radiation-sensitive components may wish to consider, together with practical suggestions as to how to measure and minimize the radiation dose for best practice during X-ray examination
A thin Zn filter (∼300 μm) and relatively low X-ray tube voltage (∼45 kV) is recommended for X-ray inspection of surface-mounted device solder joints on printed wiring boards (PWBs). An optimal filter minimizes the Si dose that could result in cumulative damage to sensitive integrated circuit (IC) nodes, yet provides good contrast for metals such as Cu traces on PWBs and device solder balls. While we expect orders of magnitude Si dose reductions when effective filters are inserted, a properly chosen filter should not attenuate the portion of the white X-ray spectrum required to image Cu, Sn, and Pb (solder balls). Some X-ray inspection suppliers can achieve a Si dose of as little as 0.060 rads, while other X-ray inspection suppliers, not yet optimized for minimum dose, may use as much as four orders of magnitude more dose. We used thermo luminescent detectors (TLDs) to measure the X-ray dose that IC product shipments would encounter during a shipping process, for example, as personal baggage or cargo, as ≤0.050 rads.
We have addressed the problem of threshold voltage
(V<sub>TH</sub>) variation in flash memory cells after heavy-ion
irradiation by using specially designed array structures and test
instruments. After irradiation, low V<sub>TH</sub> tails appear in
V<sub>TH</sub> distributions, growing with ion linear energy transfer
(LET) and fluence. In particular, high LET ions, such as iodine used in
this paper, can produce a bit flip. Since the existing models cannot
account for large charge losses from the floating gate, we propose a new
mechanism, based on the excess of positive charge produced by a single
ion, temporarily lowering the tunnel oxide barrier (positive charge
assisted leakage current) and enhancing the tunneling current. This
mechanism fully explains the experimental data we present
Radiation tests of advanced flash memories including, multi-level flash technology, are compared with results from previous generations. Total dose failure levels are comparable to or lower than those of older technologies, but are likely still caused by degradation of the internal charge pump. Small numbers of read errors were observed during single event tests of the multi-level devices that appear to be caused by shifts in the sense amplifier detection levels or cell threshold shifts rather than loss of electrons off the floating gate.
We investigate the effects of X-ray exposure in 41-nm single level NAND Flash memories at small doses, comparable to those used in printed circuit board inspections. We analyze both short-term effects, such as cell threshold voltage shifts during irradiation, and retention and endurance performance of devices exposed to x rays. For doses smaller than 1krad(Si), no effect is observed. At higher doses, charge loss is observed after the expo- sure and a modest read margin degradation is seen during high- temperature retention tests.
We have compared the endurance of irradiated commercial NAND flash memories with that of unirradiated controls. Radiation exposure has little or no effect on the endurance of flash memories. Results are discussed in light of the relevant models for electron and hole trapping.
This review paper discusses several key issues associated with deep submicron CMOS devices as well as advanced semiconductor materials in ionizing radiation environments. There are, as outlined in the ITRS roadmap, numerous challenges ahead for commercial industry in its effort to track Moore's Law down to the 45 nm node and beyond. While many of the classical threats posed by ionizing radiation exposure have diminished by aggressive semiconductor scaling, the question remains whether there may be unknown, potentially worse threats lurking in the deep submicron regime. This manuscript provides a basic overview of some of the materials, devices, and designs that are being explored or, in some cases, used today. An overview of radiation threats and how radiation effects can be characterized is also presented. Last, the paper provides a detailed discussion of what we know now about how modern devices and materials respond to radiation and how we may assess, through the use of advanced analysis and modeling techniques, the relative hardness of future technologies
- D N Nguyen
- S M Guertin
- G M Swift
- A H Johnston
D. N. Nguyen, S. M. Guertin, G. M. Swift and A. H. Johnston,
"Radiation Effects on Advanced Flash Memories, IEEE
Transactions on Nuclear Science, vol. 46(6), 1999, pp1744-1751
“Impact of x-ray inspection on Spansion flash memory”
- Blish
Richard Blish, "Impact of x-ray inspection on Spansion flash
memory", 2008, pp 1-6