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Abstract: An endeavor has made to develop an
application soware tool called “Logic Circuit Diagram
Designer”. Logic Circuit Diagram Designer is a
learning tool for Logical Circuit Designing and
simplifying Boolean expression. is paper explains
algorithm and methodology for transforming Boolean
Expression into Logic Circuit diagram and
transforming Logic circuit diagram into Boolean
Expression. e Karnaugh-map technique is used to
simplify the Boolean Expression. e versatile soware
Logic Circuit Diagram Designer has developed using
C# language in Microso Visual Studio.Net 2008.
Keywords: Logical circuit, Boolean expression,
Karnaugh-map
Introduction
Electronic Digital Design is playing a major role in
today’s world in every routine. Digital design is the
design of hardware for computers.
Problem Specication and Background
Transformation between Logic circuits and Boolean
expression is an essential for the secondary educational
students. Since the Logic circuit is a diagram it is
needed to transform it into Boolean Expression,
simplify it and transform it back to the Logic circuit
diagram is a good practice for secondary educational
students. is learning tool is developed to facilitate
user friendly interface to draw Logic circuit diagram
and to simplify the Boolean expression using the
Karnaugh map technique.
Logic Circuits
An electronic circuit that is designed for two-state
operation is called digital circuits. Logic circuits are
part of the digital circuits which is constructed by logic
gates. Logic gate is a combination of dierent
electronic components, which takes one or more logic
level inputs and produces a single logic level output.
e actual logic gates circuits are made with diodes
and Transistors. In logic gates, the output can have
only one of the two possible states, i.e., either a high
level 1 or low level 0.
Digital circuits are made up with three basic logic
gates: NOT gate, AND gate and OR gate.
Boolean Expression
e function of the individual gates or combinations
of gates may be expressed in a logical statement known
as Boolean Expression. Boolean Expression is
simplied by using many techniques some of them are:
Boolean algebra, Logical Adjacency, Karnaugh map,
Quine-McClusky algorithm.
ere are two methods for obtaining the Boolean
expression that perform the logic specic in the
Trut h tabl e.
[31]
S.Khedika(1), R.Rathnathevi(2), S.Sagirtha(3),
T.Mathialakan(4) and S.Kanaganathan(1)
Learning tool for converting Boolean
expression and Logic circuit diagram
(1), (2), (3),(4) Department of Physical Science, Faculty of Applied Science,
Vavuniya Campus of the University of Jaffna, Vauniya, Sri Lanka .
( email: kthysubra@yahoo.com)
Proceedings of the Third International Symposium,
SEUSL: 6-7 July 2013, Oluvil, Sri Lanka
[32]
1. Sum of Product Method
E.g.:X = (A.B.C)+(A.B.C)+(A.B.C).
2. Product of Sum Method
E.g.:X = (A+B+C).(A+B+C).(A+B+C).
Karnaugh map
Karnaugh map provides a pictorial method of
grouping together expressions with common factors
and therefore eliminating unwanted variables. e
Karnaugh map provides a simple and straight-forward
method of minimizing Boolean expressions.
e Karnaugh map uses the following rules for the
simplication of expressions by grouping together
adjacent cells containing ones.
1. No zeros allowed.
2. No diagonals.
3. Only power of 2 numbers of cells in each
group.
4. Groups should be as large as possible.
5. Everyone must be in at least one group.
6. Overlapping allowed.
7. Wrap around allowed.
8. Fewest numbers of groups are possible.
Methodology
Represent the Boolean expression in the Karnaugh-
map
An algorithm was developed to represent the input
Boolean expression in the Karnaugh-map. e ow of
the algorithm is shown below. e input string is
decomposed into sub strings by splitting using ‘+’.
en each sub string is recognized by each character
to identify the respective location for representing in
the Karnaugh-map.
Simplify the Boolean expression
Karnaugh–map technique was used to simplify the
Boolean expression. is technique is applied using a
simplication algorithm proposed by Terry A. Scott on
his paper. e following is the part of text of the paper
submitted by Terry A. Scott.
“ere are two possible approaches to solve a Boolean
expression. e approach that is usually used by
humans is to nd the largest number of cells that can
be joined and move down to smaller groupings. Aer
some consideration it was concluded that for the
computer algorithm, starting with the smallest
groupings (pairs) and moving up toward larger
groupings would be easier. Once an algorithm is
established for pairing minterms then higher order
terms can be obtained by joining terms of the previous
level grouping. Here these are the basics steps for the
algorithm.
One: Where possible, pair up all minterms or cells that
contain ones. You must obtain all legal pairs even
though this may lead to extra terms. All pairs are
required because it is not possible to tell at this stage
which pairs may join together to make groups of four.
Two: Remove those single cells that are incorporated
into the pairings. Without this, some terms would
unnecessarily be included as minterms and also in pair
terms.
Start
Input the Boolean expression
Identify the number of variables
Split the Boolean expression by using ‘+ ’
Recognize each sub Boolean expression by each character
to identify respective location of each sub expression
Karnaugh-map
S.Khedika, R.Rathnathevi, S.Sagirtha,
T.Mathialakan and S.Kanaganathan
Learning tool for converting Boolean expression
and Logic circuit diagram
ree: Group four pairs to obtain groups of four. Again
you must obtain all groups of four for the same reasons
as given above.
Four: Once all groups of four have been obtained,
drop out of the pair list those that have been included
in the groups of four. No need to include something in
the pairs list that has already been handled in the
groups of four.
Five: Continue to try to group together previous
groupings essentially repeating steps three and four
above until you reach 2 raised to the power of the
number of variables.
Six: Output results by displaying the terms for the
minterms that weren't joined into higher order
groupings, groupings of two cells, groupings of four
cells, . . . until all the terms are displayed.”
Fig. 5: Simplify the Boolean expression
e Karnaugh-map is represented in a 1- diamensional
array by retrieving the locations of 0s and 1s. en
number of 1s in the 1-diamensional array is counted
to loop distinct 1s.en all possible pairs of adjacent
1s are found and stored in a 2-dimensional array. en
possible quads are found using the pairs. en octets
are found using the quads. en pairs are extracted
which have not been looped for quads or octets.
Finally, the simplied Boolean expression is formed
using the looped 1s.
Boolean expression into circuit
An algorithm was developed to transform the Boolean
expression into Logic circuit. e ow of the algorithm
is shown below.
Logic circuit to Boolean expression
A user-friendly UI is designed with tools for drawing
circuit diagram. e end-user could draw a logic
circuit diagram by drag and drop the gate tools and
connectors from the tool box. Each gate tool and
connectors generate indexes when they drop into the
drawing space.
A program was coded to generate index and gather the
coordinates of those tools. is information is stored
in a data structure called “HaspMap”.
HaspMap is a data structure, where the data are stored
as key-value pair. An algorithm was developed to
generate Boolean expression using the data stored in
the HashMap.
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Karnaugh-map (representation of
the input Boolean expression)
Find and loop a possible pairs with 1s
Find and loop possible quads with 1s
Find and loop possible octets with 1s
Find and loop possible distinct 1s
Simplified Boolean expression
Stop
Start
Boolean Expression (Sum of
Product)
Determine/Find the number of AND gates by counting the
+.
(Determine the number of inputs for each AND gates and
draw the AND gate) Determine the number of inputs for
each AND gates by identifying number of variables in each
sub strings and draw the AND gate.
Determine the number of inputs for OR gate by counting
the
+
and draw the OR gate.
Connect the AND gate with OR gate by identifying the
location of each AND gate
Logic circuit
Proceedings of the Third International Symposium,
SEUSL: 6-7 July 2013, Oluvil, Sri Lanka
[34]
Results & Discussion
e Fig. 8 represents the user interface to input the
Boolean expression for transforming to Logic circuit
diagram. e Boolean expression should be a Sum of
Product and should have maximum of four variables.
Fig. 7: Transform Logic circuit diagram into Boolean
expression
e Fig. 9 represents the logic circuit diagram for
the above Boolean expression when click the “Draw
Circuit” button.
e Fig. 10 represents the user interface to input the
Boolean expression for the simplication. e Boolean
expression should be a Sum of Product and should
have maximum of four variables. e simplied
Boolean expression is displayed when click the button
“Simplify”.
Start
Logic circuit diagram, Number of
inputs
Gather the coordinates of each gates and connectors
Generate index for each gates and connectors
Store the index and coordinates into the data structure
called “HashMap” as key-value pair
Generate the Boolean expression according to the data
stored in the HashMap
Boolean expression
End
%!
Fig.10:ScreenshotoftheuserinterfaceforinputBoolean
expressionforthesimplification
Fig.11:Screenshotshowingthesimplifiedexpression
S.Khedika, R.Rathnathevi, S.Sagirtha,
T.Mathialakan and S.Kanaganathan
Learning tool for converting Boolean expression
and Logic circuit diagram
e results show that the Logic Circuit Diagram
Designer transformed the Boolean expression into
Logic circuit diagram and simplied the complex
Boolean expression (Sum of Product).
Conclusion
Logic Circuit Diagram Designer to transform the
logic circuit diagram into Boolean expression and
vice versa.
Logic Circuit Diagram Designer consists of 3 main
parts. ey are:
1. Transform the logic circuit diagram into Boolean
expression.
2. Transform the Boolean expression into logic
circuit diagram.
3. Simplify the Boolean expression.
e limits for Logic Circuit Diagram Designer:
• Boolean expression must be Sum of Product
• e maximum number of variables is four.
Future Plans:
1. Display the output signal to an input (Boolean
expression/Logic circuit diagram) through port.
2. Design an interface to input the Boolean
expression through the K-map as well as through
the Truth table rather than Boolean function.
References
Belton, D., 1998. Karnaugh Maps. [Online] Available
at:http://www.ee.surrey.ac.uk/Projects/Labview/
minimisation/karnaugh.html [Accessed 02
September 2011].
Chappell, D., n.d. In Understanding.NET-A tutorial &
analysis.
J.Oberg-Delhi, R., 2002. In Introduction to C#
using.NET. Pearson Education.
Rajendra, D.J.C.N., 2007/2008. In BASIC
ELECTRONICS AND DIGITAL LOGIC
DESIGN.
[35]
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