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Simulating wafer bow for integrated capacitors using a multiscale approach

A. Wright

1

, F. Krach

2

, N. Thielen

1

, S. Grünler

1

, T. Erlbacher

1,2

, P. Pichler

1,2

1

Fraunhofer Institute for Integrated Systems and Device Technology IISB, Erlangen, Germany

2

Chair of Electron Devices, University of Erlangen-Nuremberg, Erlangen, Germany

Abstract

To simulate the bow of wafers with integrated

capacitors in the form of pit arrays, various approaches

were pursued. After unfruitful attempts to reliably

obtain the wafer bow directly from simulating part of

the wafer, a multi-scale approach was used. In this

approach, the layer with the integrated capacitors was

replaced by a homogeneous material having the same

properties. Small-scale simulations of representative

parts of the layer were performed to determine its

effective stiffness tensor. Inclusion of the intrinsic

strains of the grown and deposited dielectric and

conductive layers enabled the volume change to be

calculated of the layer with the integrated capacitors

upon fabrication. Finally, the structure obtained was

used in a full-wafer-scale model to simulate the bow of

the wafers. Even for uncalibrated values for the

coefficients of thermal expansion, most simulations

agreed well with measurements.

1. Introduction

Silicon integrated capacitors offer advantages over

discrete state-of-the-art capacitors: higher switching

speeds, excellent temperature stability, highly precise

capacitor values (by specifying the exact geometry

through mask patterning), and increasing overall circuit

integration density by eliminating external

components. The manufacture of high-voltage

integrated capacitors involves process steps that result

in the bowing of the wafers. This then affects their

further processing since lithography steps in particular

cannot be performed if the wafers are too deformed.

Each of the integrated capacitors being investigated

consists of an array of pits etched into silicon, see

Figure 1. These pits are lined with dielectric layers,

silicon dioxide and silicon nitride, followed by layers

of polysilicon and aluminium. Since these layers are

deposited at different temperatures, they induce strain

at room temperature due to their coefficients of thermal

expansion differing from that of silicon (and changes in

molar volume e.g. during thermal growth of oxide).

The amount of wafer bow is further influenced by the

arrangement of the pits, their depth, diameter and pitch

along with the wafer thickness. Simulation using

ANSYS has been employed to investigate different

geometries towards uncovering configurations with

minimal wafer bow.

A wafer patterned with millions of pits is unsuitable

for simulation in its entirety; the computational

requirements would be too much for current systems.

Figure 1 Integrated capacitor consisting of an array of pits: a)

view from above wafer, b) cross-section.

Modelling a small portion of the wafer with a low

number of pits was also found to be unsuitable due to

numerical inaccuracy from such a small amount of

displacement for any one pit and problems defining

appropriate boundary conditions for the outer faces of

the simulated structures. A feasible method was found

in taking a multiscale approach. The complete wafer

was virtually separated into a layer with the pits and

into the remainder which has properties of crystalline

silicon (see Figure 2).

Figure 2 Virtual separation of a integrated capacitor wafer

into substrate and pit array layers for multi-scale simulation

a

b

This is the post-print version of the original article published in the proceedings of the

2016 17th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in

Microelectronics and Microsystems (EuroSimE)

which can be found at IEEEXplore (http://dx.doi.org/10.1109/EuroSimE.2016.7463348) © 2016 IEEE

The layer containing the pit array was changed to a

homogenous layer which has the same macroscopic

mechanical properties as the layer with the pits. These

macroscopic mechanical properties are obtained from

small-scale simulations through taking advantage of

the periodic symmetry of the pits. The effective

mechanical parameters for the pit array layer were

determined by considering a unit cell, see Figure 3, and

adopting its effective mechanical properties to the

entire layer.

Figure 3 a) extraction of a repeating unit from the periodic

symmetry of the pit capacitor array, b) enlargement of the

unit cell. Note the curved entrance and bottom of the pits

were not considered, as explained in section 2.

In this work, all materials were assumed to show

elastic behaviour. However, the method described in

this work could be extended to non-elastic models. The

cell’s effective elastic properties were obtained by

determining the coefficients of the elastic stiffness

tensor. This required a number of simulations to

calculate strains in component directions from forces

from different directions as well as shear strains acting

upon the unit cell.

Following this, the volume change during

manufacture of the pit capacitors was determined. This

is the overall strain of the unit cell in the ‘x’, ‘y’ and

‘z’ coordinate directions resulting from the deposition

of the pit liner layers. For this purpose, intrinsic strains

were applied to each deposited layer with the amount

of strain calculated from the deposition temperature

and the coefficient of thermal expansion (CTE). The

exception was the thermally grown silicon dioxide for

which values reported in the literature were used.

With parameters obtained for the unit cell, a larger-

scale simulation of the full wafer could then proceed.

The unit cell parameters (mechanical and volume

change) were applied to the upper layer representing

the pit array with the lower layer assigned as unstrained

silicon, see Figure 4.

Figure 4 Full wafer scale simulation. The pit array layer had

the parameters assigned from the small scale simualtions of a

unit cell of the pit array.

The depth of the pits could be taken into

consideration by changing the thickness of the effective

pit array layer. The following sections describe how the

mechanical properties and volume change of the unit

cell were obtained followed by results of the full wafer

simulations.

2. Obtaining equivalent mechanical material

parameters

The first step was to define the unit cell geometry,

see Figure 3. The tops and bottoms of the pits

containing curved features were not considered.

Considering them is well within scope of this

approach: this would involve two additional unit cells

and two corresponding additional layers in the full

scale model. The upper aluminium layer was not

considered as measurements made have shown that it

does not have a significant effect on wafer bow. The

unit cell contains the spaced holes with their linings of

different materials: SiO

2

, Si

3

N

4

and polysilicon. Each

material has unique mechanical parameters such as

Young’s modulus, Poisson’s ratio, and coefficient of

thermal expansion (CTE), see Table 1.

Table 1 Elastic material parameters and CTEs

Material Young’s

modulus

(GPa)

Poisson’s

ratio

CTE

(ppm/K)

SiO

2

69 [1] 0.14 [2] 0.5 [3]

Si

3

N

4

290 [4] 0.27 [5] 3.4 [6]

Polysilicon 169 [7] 0.22 [7] 2.8 [8]

What was then required were the effective

mechanical parameters for the unit cell. The unit cell

was subjected to multiple simulations to determine

these. The unit cell shown in Figure 5 has three

mutually perpendicular planes of symmetry.

Figure 5 three symmetry planes corresponding to the faces of

the unit cell.

The two symmetry planes ‘xy’ and ‘yz’ differ from

one another due to the hexagonally arrayed pits. There

is then no long-range isotropy in the material and the

three symmetry planes are independent. The array of

pits is thus an orthotropic material. As such, its

stiffness is dependent on the direction in which a force

is applied to the material. To determine the unit cell’s

stiffness, the coefficients of the elastic stiffness tensor

C were calculated, from Hook’s law in the form:

σ = Cε (1)

where σ and ε are the stress and strain tensors

respectively. For an orthotropic material the stiffness

tensor has nine independent components which then

gives Hook’s in the form:

(2)

Calculation began with determining coefficients for

longitudinal compression starting with C

11

from the

following equation:

σ

xx

= C

11

ε

xx

+ C

12

ε

yy

+ C

13

ε

zz

(3)

This was realised in a simulation as depicted in Figure

6. Zero displacement boundary conditions were applied

to the outer-faces parallel to the ‘x’ axis (along the

force direction) and the face of the unit cell opposite to

the force applied. Since the displacement was confined

to be along the ‘x’ coordinate axis, the strains ε

yy

and

ε

zz

were reduced to zero. Next, the plane upon which

the force was applied was set as a remote boundary

condition with ‘coupled’ behaviour in ANSYS.

Importantly, all boundary conditions ensured that the

nodes remained in their respective planes, thus

maintaining the periodic symmetry of the unit cell. If

this were not the case, as would be if a free boundary

condition was used, the deformation of the unit cell

would not behave as if it were part of a larger whole.

Figure 6 Longitudinal compression simulation undertaken to

determine coefficient C

11.

a) undeformed unit cell b) after

force applied. Deformation is exaggerated.

The resulting displacement along the ‘x’ coordinate

axis and stress upon action of the force were used to

calculate C

11

. Similar simulation setups were made for

the calculation of C

22

and C

33

with longitudinal

compression occurring instead along the ‘y’ and ‘z’

axes, respectively.

Calculation of the coefficients C

12

, C

13

, C

23

involved transverse expansion i.e. force being applied

along one component direction and observing

deformation along another component direction. This is

shown in Figure 7. Ensuring that nodes on the outer

faces stayed in-plane, whilst allowing the faces to

expand or contract required the use of special boundary

conditions. These needed to allow the outer face nodes

to slide against the walls whilst being able to move in

the direction of any expansion or contraction. A

solution for such a boundary condition was found in

including ‘wall’ bodies in the simulation. These had

their faces in contact with the unit cell set to rigid and

the contact condition set to ‘no-separation’ (or ‘sliding-

only’). The former ensures a rigid plane and the latter

that the nodes remain in this plane whilst being able to

slide within it.

Note the sliding-only contact ensures that the nodes

remain in contact with the wall whether the solid is

expanding or contracting. Figure 7 shows the walls

with hashed lines indicating the faces which have been

made rigid and red lines showing the ‘sliding-only’

contact. It can be seen that upon application of the

force along the ‘x’ coordinate axis the unit cell deforms

upwards along the ‘y’ coordinate axis and surface

nodes slide along both walls while staying in-plane.

Both walls move to accommodate deformation

perpendicular to their faces. In order to accommodate

for expansion upon deformation, the walls need to be

made larger than the unit cell. Therefore, walls must

travel within each other during the simulation. This is

facilitated by not defining any contact-conditions

between the walls. This boundary condition will be

referred to as the ‘sliding-wall’ boundary condition.

Figure 7 boundary condition using ‘walls’ with sliding-only

contact (red lines), enables deformation with preservation of

periodic symmetry (deformation not to scale).

The deformation of the unit cell with the sliding-wall

boundary conditions is shown in Figure 8.

Figure 8 Deformation of the unit cell upon application of

force along the ‘x’ coordinate axis, a) undeformed and b)

with deformation along the ‘x’ and ‘y’ coordinate axes.

Undeformed geometry is shown by the white outline.

Calculation of C

12

proceeded using equation 3 with C

11

already known from the previous calculation. Zero

displacement boundary conditions were added to

prevent displacement along the ‘z’ coordinate axis thus

reducing ε

zz

to zero. Similar simulation setups were

then used to calculate the coefficients C

13

and C

23

.

For the shear moduli C

44

, C

55

and C

66

, simulations

to shear the unit cell were carried out. Shear forces

were applied to the unit cell face, see Figure 9, and a

coupled boundary condition was applied to the same

face to ensure that the nodes in the face remained

together in the same configuration. In order to ensure

that nodes remain in plane on the faces ‘a’ and ‘b’

indicated in Figure 9, boundary conditions were

applied using remote points in ANSYS.

Figure 9 Shear force applied to the unit cell for calculation of

C

66

. Remote point boundary conditions are applied to faces

‘a’ and ‘b’.

The remote points were located at the pivot of the

respective faces (where the faces meet the ‘y’ axis) and

all degrees of freedom were restricted except for

rotation about the local ‘z’ coordinate axis. The faces

were further set to rigid to maintain that the nodes

remain in plane. These ensured that the internal

cylindrical features behaved as though they were still

part of the large pit array, see Figure 10 (b). Without

such boundary conditions, internal features deform

unrealistically as in Figure 10 (a).

Figure 10 Shear simulation of the unit cell: without (a) and

(b) with remote point boundary conditions applied. The

internal features behave as if part of a larger pit array in (b).

Similar boundary conditions were applied to the

remaining planes, with all degrees of freedom

restricted except for translation along the ‘y’ coordinate

axis. Calculation of C66 was then:

∙tan∅

(4)

where

and

are the shear stress and strain

respectively, F the shear force applied to the unit cell,

A the area of the face upon which the force is applied,

and ∅ the shear angle. Similar simulation setups were

made for the shear moduli C

44

and C

55

.

3. Determining overall strain from fabrication

To obtain the expected volume change during

fabrication, the unit cell was simulated with the

combined contraction of the various materials within.

Specifically, the strain upon each material was

calculated according to the difference from the

deposition temperature to room temperature and

corresponding CTE, see Table 2.

Table 2 Material deposition temperatures and CTEs

Material T deposition °C CTE

ppm/K

SiO

2

1000 0.5 [3]

Si

3

N

4

780 3.2 [6]

Polysilicon 570 2.8 [8]

The exception however was the thermally grown SiO2

known to expand upon growth due to the change in molar

volume. Thus, a value of 300 MPa of intrinsic stress at room

temperature as reported in [8] was applied to the SiO

2

. The

strains upon the materials were applied in ANSYS using the

‘inistate’ command. The simulation setup required the use of

three sliding-wall boundary conditions, see-Figure 11.

Figure 11 Simulating volume change from fabrication of the

unit cell. a) undeformed unit cell b) contracted unit cell. Note

three sliding-wall boundary conditions were used to maintain

periodic symmetry. All remaining planes were set to zero

displacement.

Upon simulation, the unit cell within the simulation

model contracted. The results of the simulation were

then the strains along the ‘x’, ‘y’ and ‘z’ coordinate

axes of the unit cell. These constituted the effective

volume change of the unit cell. Along with the

previously calculated elastic stiffness tensor, the small-

scale simulation results were transferred to a larger-

scale simulation model.

4. Wafer scale simulation

Full scale simulation of the pit-capacitor wafer

proceeded with the geometry as shown in Figure 4. For

the silicon substrate layer the mechanical parameters of

(100)–oriented silicon were applied. The effective

properties of the unit cell were applied to the pit-array

layer. The strains from the unit cell were applied using

again the ‘inistate’ command in ANSYS.

Results from simulations showed concave wafer

bow, with all forms having some asymmetry, see

Figure 12.

Figure 12 Simulated wafer bow

Simulations were carried out to investigate the effect of

the wafer thickness on wafer bow and compare results

with measured wafers. The details of the pit array

were: 5.9 µ m pit diameter, 7 µm pitch and 20 µm

depth. The liner layers and thicknesses were: SiO

2

0.33 µm, Si

3

N

4

1 µ m, and polysilicon 0.5 µ m. The

results shown in Figure 13 reveal that measurements of

675 µm wafers agree well to simulation results,

particularly when considering that the CTEs were taken

directly from literature. Measurements made of 675 µ m

thick wafers with different thicknesses of the dielectric

layers are shown in Figure 14. For these, wafer bow

was considered at a radius of 60 mm of the 150 mm

diameter wafers. The results from simulating 0.5 and

1.0 µm thick silicon nitride layers above a 0.33 µm

thick silicon dioxide layer agree with measurements.

However, the simulation of a 1.0 µm nitride layer

above a 20 nm silicon dioxide layer overestimates

measurements. The reason for which is subject to

further investigation.

Figure 13 Wafer bow simulated for different wafer

thicknesses compared with measurements. Measurements of

675 µ m wafers are similar to simulation results. Pits are

5.9 µm in diameter with 7 µm pitch and 20 µ m depth which

is noted as ‘5.9/7/20’. The liner layers and thicknesses were:

SiO

2

0.33 µm, Si

3

N

4

1 µm and polysilicon 0.5 µm.

Figure 14 Simulation of the wafer bow at a radius of 60 mm

for combinations of different liner layer thicknesses. Pits are

5.9 µm in diameter with 7 µm pitch and 20 µm depth.

Figure 15 Pit capacitance vs. wafer bow for various depths

and decreasing the feature size of the pits (whilst maintaining

a constant ratio of diameter to pitch). The liner layers and

thicknesses are the same as in Figure 13.

Additionally, simulations have been carried out to

indicate conditions for the lowest wafer bow whilst

maximising capacitance, see Figure 15. Here, various

pit depths were simulated along with changing the

feature size of the pits and their pitch (whilst

maintaining the same ratio of pit diameter to pitch).

Simulated results indicate that simultaneously

decreasing both the diameter and pitch yields lower

wafer bow.

5. Conclusion

In this work, a methodology for simulating the bow

of wafers with integrated capacitors in the form of pit

arrays was described. Simulation of the entire wafer

features was found to be computationally unfeasible.

The multi-scale methodology used instead works as

follows: The portion of the wafer containing the

integrated capacitors was replaced by a solid with the

same effective mechanical parameters and volume

change from fabrication. The effective stiffness tensor

was obtained by small-scale simulations on a portion of

the pit array through taking advantage of its periodic

symmetry. Calculation of the volume change of the pit

array upon fabrication additionally required

considering the different strains upon the various

constituent materials from their different deposition

temperatures and CTEs. The layer structure obtained

this way was finally applied to a full-wafer-scale model

to simulate the bow of the wafer. Even for uncalibrated

CTEs, most simulations agreed well with

measurements. Finally, simulation suggests that

decreasing both the feature sizes of pit diameter and

pitch results in decreased wafer bow.

Acknowledgments

The research leading to these results has received

funding from the European Union Seventh Framework

Programme (FP7/2007-2013) under grant agreement n°

619246 (ATHENIS_3D).

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