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Static Scheduling Generation for Multicore Partitioned Systems
Abstract
Multicore systems are present in many sectors and arriving others, as real-time systems, traditionally reluctant to them due to the difficulty to estimate worst case execution time in multicore platforms. However, partitioned systems integrated by a partitioning kernel and a set of partitions with different levels of criticality is one of the emerging software technologies in real-time systems to deal with multi-core platforms.
This paper presents a method to generate a static schedule for a multicore partitioned system. Several issues are considered: partitions with different levels of criticality, hierarchical schedule, allocation of partitions to cores and generation of the global schedule. The aim is to generate a cyclic static schedule for a multicore system which fulfils the temporal constraints of the partitions.
... In Xoncrete tool [15], most of these issues are modeled. In [16], a methodology to generate cyclic schedule plans for multi-core mixed-criticality systems is proposed. From a set of critical and non-critical partitions, it performs a partition to core allocation and generates a cyclic schedule for each core. ...
... In order to perform this allocation, bin packing techniques are used. Worst fit policies for bin packing partition to cores produces more uniform load distribution [16]. A final optimization of the allocation is performed using greedy techniques based on the discrepancy of the core loads. ...
One of the most promising approaches to mixed-criticality systems is the use of multi-core execution platforms based on a hypervisor. Several successful EU Projects are based on this approach and have overcome some of the difficulties that this approach introduces. However, interference in COTS systems due to the use of shared resources in a computer is one of the unsolved problems. In this paper, we attempt to provide realistic solutions to this problem. This paper proposes a feedback control scheme implemented at hypervisor level and transparent to partitions (critical and non-critical). The control scheme defines two controller types. One type of controller is oriented towards limiting the use of shared resources by limiting bus accesses for non-critical cores. A second type measures the activity of a critical core and acts on noncritical cores when performance decreases. The hypervisor uses a Performance Monitor Unit that provides event counters configured and handled by the hypervisor. This paper proposes two control strategies at hypervisor level that can guarantee the execution of critical partitions. Advantages and drawbacks of both strategies are discussed. Control theory requires to identify the process to be controlled. In consequence, the activities of the critical partitions must be identified in order to tune the controller. A methodology to deal with controller tuning is proposed. A set of experiments will show the impact of the controller parameters. OAPA
... An unbalanced load is defined as a load that tries to allocate the maximum number of tasks on the minimum number of cores is low. One approach to exactly measure how balanced a system is with respect to utilisation is by using the so-called utilisation discrepancy, that we define as follows [25]: ...
In hard real-time embedded systems, switching to multicores is a step that most application domains delay as much as possible. This is mainly due to the number of sources of indeterminism, which mainly involve shared hardware resources, such as buses, caches, and memories. In this paper, a new task model that considers the interference that task execution causes in other tasks running on other cores due to memory contention is proposed. We propose a scheduling algorithm that calculates the exact interference. We also analyse and compare existing partitioning algorithms and propose three strategies to allocate tasks to cores to schedule as many tasks as possible and minimise total interference.
... Meanwhile Lauzac et al., [17] had performed a comparative study of global RM and partitioned RM scheme. Their observation also showed that for soft real-time systems-global scheduling can perform better because overloaded processors can distribute tasks to under loaded processors dynamically, whereas in a partitioned scheme a task allocation was fixed. ...
p>As the functionality in real-time embedded systems becoming complex, there has been a demand for higher computation capability, exploitation of parallelism and effective usage of the resources. Further, technological limitations in uniprocessor in terms of power consumption, instruction level parallelism reaching saturation, delay in access of memory blocks; directed towards emergence of multicore. Multicore design has its challenges as well. Increase in number cores has raised the demand for proper load distribution, parallelizing existing sequential codes, enabling effective communication and synchronization between cores, memory and I/O devices. This paper brings out the demand for effective load distribution with analyzes and discussion about the various task allocation techniques and algorithms associated with decentralized task scheduling technique for multicore systems. This paper also addresses on the multithreaded architecture, where parallel tasks are formulated from sequential code blocks and finally on the techniques to parallelize the sequential code block.</p
... After partition and core allocation, the local cyclic static schedule for each core is generated based on restrictive EDF [11]. Cyclic static scheduler in Xtratum hypervisor [14] and prior knowledge of the behaviour of tasks in each mode makes cyclic static schedule appropriate for local scheduling. The analytical tool generates the XML based configuration file. ...
... Meanwhile Lauzac et al., [17] had performed a comparative study of global RM and partitioned RM scheme. Their observation also showed that for soft real-time systems-global scheduling can perform better because overloaded processors can distribute tasks to under loaded processors dynamically, whereas in a partitioned scheme a task allocation was fixed. ...
As the functionality in real-time embedded systems becoming complex, there has been a demand for higher computation capability, exploitation of parallelism and effective usage of the resources. Further, technological limitations in uniprocessor in terms of power consumption, saturation in instruction level parallelism, delay in access of memory blocks, etc. led to the emergence of multicore. Multicore design has its challenges as well. Increase in number of cores has raised the demand for proper load distribution, parallelizing existing sequential codes, enabling effective communication and synchronization between cores, memory and I/O devices. This paper had identified and compared the distribution schemes for task distribution in a multicore environment and also the algorithms suitable for decentralized task scheduling scheme. In addition, this paper had addressed the techniques of formulating parallel task blocks from sequential code. Copyright © 2016 Institute of Advanced Engineering and Science. All rights reserved.
Distribution of modules to processors is very critical step for acquiring excessive overall performance in distributed computing arrangement. Assignment scheduling algorithms plays a key function to acquire better yield and excessive float potential in heterogeneous allotted computing machine. To make the pleasant use of the computational strength to be had, it's far vital to apportion the modules to that processor whose features are most pertinent for execution of the modules in distributed processing units. In this paper we've got evolved a set of rules to congregate the immoderately communicating modules to lessen the response time with the aid of using fuzzy C-means clustering technique and right allocation of shaped clusters to the maximum appropriate processor. The proposed machine is mapped out and implemented to several parametric examples for demonstrating their potency. The clustering of modules is carried out by employing fuzzy C-means clustering approach and the usage of R Programming results are depicted with the help of plots.KeywordsDistributed computing systemModule allocationFuzzy C-meansResponse timeSystem cost
Memory bandwidth in modern multi-core platforms is highly variable for many reasons and is a big challenge in designing real-time systems as applications are increasingly becoming more memory intensive. In this work, we proposed, designed, and implemented an efficient memory bandwidth reservation system, that we call MemGuard. MemGuard distinguishes memory bandwidth as two parts: guaranteed and best effort. It provides bandwidth reservation for the guaranteed bandwidth for temporal isolation, with efficient reclaiming to maximally utilize the reserved bandwidth. It further improves performance by exploiting the best effort bandwidth after satisfying each core's reserved bandwidth. MemGuard is evaluated with SPEC2006 benchmarks on a real hardware platform, and the results demonstrate that it is able to provide memory performance isolation with minimal impact on overall throughput.
System virtualization, which enjoys immense popularity in the enterprise and personal computing spaces, is recently gaining significant interest in the embedded domain. Starting from a comparison of key characteristics of enterprise systems and embedded systems, we will examine the difference in motivation for the use of system virtual machines, and the resulting differences in the requirements for the technology. We find that these differences are quite substantial, and that virtualization is unable to meet the special requirements of embedded systems. Instead, more general operating-systems technologies are required, which support virtualization as a special case. We argue that high-performance microkernels, specifically L4, are a technology that provides a good match for the requirements of next-generation embedded systems.
ARINC 653 defines a partitioned frame-work where the partitions are scheduled according to a predefined cyclic plan and the processes of each partition are scheduled with a fixed priority policy. The timing characteristics defined in ARINC (period and duration) can hardly be used to precisely repre-sent the timing requirements of the applications. We extend the timing model of ARINC 653 to consider deadlines and the periodic behaviour of the individ-ual processes. A novel definition of how to model periodic activities and how this new model is spe-cially useful in an heterogeneous partitioned system is also presented. The new model and the set of scheduling algo-rithms have been implemented in a scheduling tool (called Xoncrete) to assist the designer to generate the cyclic plan table. Although founded on solid the-oretical results, Xoncrete is not a general purpose tool, it is a tool designed to provide real help to the system designer.
XtratuM is an hypervisor designed to meet safety critical requirements. Initially designed for x86 architectures (version 2.0), it has been strongly redesigned for SPARC v8 arquitecture and specially for the to the LEON2 processor. Current version 2.2, includes all the functionalities required to build safety critical systems based on ARINC 653, AUTOSTAR and other standards. Although XtratuMdoes not provides a compliant API with these standards, partitions can offer easily the appropriated API to the applications. XtratuM is being used by the aerospace sector to build software building blocks of future generic on board software dedicated to payloads management units in aerospace. XtratuM provides ARINC 653 scheduling policy, partition management, inter-partition communi-cations, health monitoring, logbooks, traces, and other services to easily been adapted to the ARINC standard. The configuration of the system is specified in a configuration file (XML format) and it is compiled to achieve a static configuration of the final container (XtratuM and the partition's code) to be deployed to the hardware board. As far as we know, XtratuM is the first hypervisor for the SPARC v8 arquitecture. In this paper, the main design aspects are discussed and the internal architecture described. An evaluation of the most significant metrics is also provided. This evaluation permits to affirm that the overhead of a hypervisor is lower than 3% if the slot duration is higher than 1 millisecond. .
Partitioned software architectures were conceived to fulfill security and avionics requirements where predictability is extremely important. Both, the availability of new processors and an increased necessity of security, have opened new possibilities to use efficiently this approach. Avionic industry has consolidated the Integrated Modular Avionics (IMA) as a solution to manage the software growth in functionality and in efficiency. Now, the aerospace sector is adapting these concepts on its developments. One of the solutions used to achieve partitioned systems is based on virtualisation techniques. In this paper we present XtratuM, a bare-metal hypervisor which implements para-virtualization and dedicated device techniques. XtratuM provides a virtual machine that is 'near' the native one. It permits to execute a set of partitions, containing each one an operating systems and its applications. Security is based on the temporal and spatial isolation properties provided by the hypervisor. This paper describes the main design criteria used to achieve temporal and spatial partition isolation and an approach to extend the trusted environment from the hardware level to the hypervisor level in order to verify the temporal and spatial isolation properties
Microprocessor roadmaps clearly show a trend towards multiple core CPUs. Modern operating systems already make use of these CPU architectures by distributing tasks between processing cores thereby increasing system performance. This review article highlights a brief introduction of what a multicore system is, the various methods adopted to program these systems and also the industrial application of these high speed systems. Comment: 6 pages, 4 Figures
This paper focuses on the hierarchical scheduling of systems where a number of separate applications reside on a single processor. It addresses the particular case where fixed priority pre-emptive scheduling is used at both global and local levels, with a server associated with each application. Using response time analysis, an exact schedulability test is derived for application tasks. This test improves on previously published work. The analysis is extended to the case of harmonic tasks that can be bound to the release of their server. These tasks exhibit improved schedulability indicating that it is advantageous to choose server periods that enable some tasks to be bound to the release of their server. The use of periodic, sporadic and deferrable servers is considered with the conclusion that the simple periodic server dominates both sporadic and deferrable servers when the metric is application task schedulability.
Memory bandwidth in modern multi-core platforms is highly variable for many reasons and it is a big challenge in designing real-time systems as applications are increasingly becoming more memory intensive. In this work, we proposed, designed, and implemented an efficient memory bandwidth reservation system, that we call MemGuard. MemGuard separates memory bandwidth in two parts: guaranteed and best effort. It provides bandwidth reservation for the guaranteed bandwidth for temporal isolation, with efficient reclaiming to maximally utilize the reserved bandwidth. It further improves performance by exploiting the best effort bandwidth after satisfying each core's reserved bandwidth. MemGuard is evaluated with SPEC2006 benchmarks on a real hardware platform, and the results demonstrate that it is able to provide memory performance isolation with minimal impact on overall throughput.
The consumer market is continuously pushing for smarter, faster, more durable and cheaper products with ever more complex and sophisticated functionality. Other fields such as safety-critical and dependable applications are not unaware of these requirements, and even impose others (e.g. certification). In the current multi-core era, industry and research entities are facing the important challenge of fulfilling all these requirements, which often impose the necessity for integrating components with different levels of dependability in a single hardware platform. In this scenario, new concerns appear with respect to safety certification of the resulting mixed-criticality systems (e.g. temporal and spatial isolation). This article describes the research effort that is being conducted within the FP7 MultiPARTES project, which is one of the initiatives launched by the European Commission to explore new solutions for developing certifiable mixed-criticality systems using heterogeneous multi-cores. The article explains the proposed development toolset for such systems, presents a proof-of-concept implementation and shows its applicability in a real-world application that needs to be certified, namely a wind-power turbine.
This position paper concerns itself with real-time safety critical distributed systems. It presents a computational model that is appropriate for this type of application and architecture. It then defines a resource allocations scheme based upon fixed priority scheduling. Such a scheme has the advantage (over purely static schedules) of supporting greater levels of flexibility and non-determinism, whilst still providing static guarantees of necessary timing behaviour (i.e. end-to-end deadlines through the systems). Priority based communication protocols are investigated, with possible future techniques reviewed.
This paper will describe the benefits of incorporating software Time and Space Partitioning (TSP), based upon the aeronautic IMA concept, into the spacecraft avionics architecture to manage the growth of mission functions implemented in the on-board software. The paper addresses how TSP can be used to safely integrate applications of different criticality and security classifications, and how incremental validation is supported to control the impact of software modifications to the system.
This paper focuses on the hierarchical scheduling of systems where a number of separate applications reside on a single processor. It addresses the particular case where fixed priority pre-emptive scheduling is used at both global and local levels, with a server associated with each application. Using response time analysis, an exact schedulability test is derived for application tasks. This test improves on previously published work. The analysis is extended to the case of harmonic tasks that can be bound to the release of their server. These tasks exhibit improved schedulability indicating that it is advantageous to choose server periods that enable some tasks to be bound to the release of their server. The use of Periodic, Sporadic and Deferrable Servers is considered with the conclusion that the simple Periodic Server dominates both Sporadic and Deferrable Servers when the metric is application task schedulability.
________________________________________________________________________ This survey covers hard real-time scheduling algorithms and schedulability analysis techniques for homogeneous multiprocessor systems. It reviews the key results in this field from its origins in the late 1960's to the latest research published in late 2009. The survey outlines fundamental results about multiprocessor real-time scheduling that hold independent of the scheduling algorithms employed. It provides a taxonomy of the different scheduling methods, and considers the various performance metrics that can be used for comparison purposes. A detailed review is provided covering partitioned, global, and hybrid scheduling algorithms, approaches to resource sharing, and the latest results from empirical investigations. The survey identifies open issues, key research challenges and likely productive research directions.
This paper focuses on resource sharing in hierarchical.fixedpriority pre-emptive systems where a number of separate applications, each with its own server, reside on a single processor. It defines the Hierarchical Stack Resource Policy, an appropriate global resource access policy that bounds priority inversion and also limits interference due to overruns during resource access.
The paper provides detailed response time analysis enabling the schedulability of application servers and tasks to be determined for systems with local and global resource access. This analysis is applicable to real-world systems where server-based applications need mutually exclusive access to shared resources such as communications buffers, peripheral devices, operating system calls and data structures shared with interrupt handlers.
Many real-time systems have strict safety requirements, and concurrent processes cannot be used in their development. Thus, these safety-critical systems are developed using synchronous architectures based on cyclic scheduling. This paper describes a reusable cyclic executive implementation in Ada 95, based on a generic architecture for synchronous real-time systems. This generic architecture is described by means of an object-oriented design notation. New Ada characteristics, as well as exceptions and generics, are used to build the component blocks of this generic architecture. In order to develop real-time systems, guidelines for using these reusable components are also provided. Copyright © 1997 Elsevier Science Ltd
Current hard real-time scheduling and analysis tech- niques are unable to efficiently utilize the computational bandwidth provided by multicore platforms. This is due to the large gap between worst-case execution time predic- tions used in schedulability analysis and actual execution times seen in practice. In this paper, we view this gap as "slack" that can be accounted for during schedulability analysis and reclaimed for less critical work. We use this technique to develop an architecture for scheduling mixed-criticality real-time workloads on multiprocessor platforms. Our architecture provides temporal isolation among tasks of different criticalities while allowing slack to be redistributed across criticality levels.
This position paper concerns itself with real-time safety critical distributed systems. It presents a computational model that is appropriate for this type of application and architecture. It then defines a resource allocations scheme based upon fixed priority scheduling. Such a scheme has the advantage (over purely static schedules) of supporting greater levels of flexibility and non-determinism, whilst still providing static guarantees of necessary timing behaviour (i.e. end-to-end deadlines through the systems). Priority based communication protocols are investigated, with possible future techniques reviewed
Periodic processes are major parts of many real-time embedded computer applications. The programming language Ada permits programming of simple periodic processes, but it has some serious limitations: producing Ada programs with real-time performance comparable to that of programs produced to date using traditional cyclic executives requires techniques that are specific to one machine or compiler. The authors present and evaluate the cyclic executive model for controlling periodic processes. The features and limitations of Ada for programming cyclic executive software are discussed and demonstrated, and some practical techniques for circumventing Ada problems are described
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