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A CMOS 65nm RF Front-End for L1/E1 GPS/Galileo/GLONASS/BeiDou2 Signals - 通吃各類衛星 65奈米CMOS射頻前端定位更準

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This paper presents a low-power RF front-end designed for GNSS signals in L1 band, implemented on 65nm CMOS technology. In GNSS mode, it draws about 19mA (14.5mA in GPS/Galileo mode) on external voltage supply at 1.2V, with power consumption of roughly 23mW. The device integrates a two-stage high performance low noise amplifier (LNA), an automatic gain control (AGC) that doesn't need any external capacitor, and the phase-locked loop (PLL) filter reducing the external components count; only few passives for matching and external TCXO for frequency reference are needed. A programmable synthesizer manages most of the commonly used TCXO frequencies. The device presents only one input for RF signal with two intermediate frequency (IF) chains one for GPS/Galileo signals and the other one configurable either for GLONASS or for BeiDou2 B1I or for GLONASS and BeiDou2 signals at the same time. Both IF filters are fully embedded. The data bit for base band are generated by 3-bits analog-to-digital converters (ADC). The whole die area comprising pads and ESD protections is 3.737mm 2. This RF front-end has been integrated on the same die with its companion base-band receiver with minor performance variation.
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Communications Computers Magazine 1st August 2015
Website: ttp://www.2cm.com.tw/technologyshow_content.asp?sn=1507310035
1
A CMOS 65nm RF Front-End for L1/E1
GPS/Galileo/GLONASS/BeiDou2 Signals
Gaetano Rivela, Pietro Scavini, Daniele Grasso, Maria Gabriella Castro, Antonino Calcagno, Giuseppe
Avellone, Amedeo Di Mauro, Nunzio Micalizzi, Salvatore Scaccianoce
Automotive Product Group Radio Frequency Competence Center /STMicroelectronics
Stradale Primosole 50, 95121, Catania, Italy
{gaetano.rivela, pietro.scavini, daniele.grasso, mariella.castro, nino-apg.calcagno, giuseppe.avellone, amedeo.dimauro,
nunzio.micalizzi, salvo.scacccianoce}@st.com
Abstract
This paper presents a low-power RF front-end designed for
GNSS signals in L1 band, implemented on 65nm CMOS
technology. In GNSS mode, it draws about 19mA (14.5mA in
GPS/Galileo mode) on external voltage supply at 1.2V, with
power consumption of roughly 23mW. The device integrates
a two-stage high performance low noise amplifier (LNA), an
automatic gain control (AGC) that doesn’t need any external
capacitor, and the phase-locked loop (PLL) filter reducing
the external components count; only few passives for
matching and external TCXO for frequency reference are
needed. A programmable synthesizer manages most of the
commonly used TCXO frequencies. The device presents only
one input for RF signal with two intermediate frequency (IF)
chains one for GPS/Galileo signals and the other one
configurable either for GLONASS or for BeiDou2 B1I or for
GLONASS and BeiDou2 signals at the same time. Both IF
filters are fully embedded. The data bit for base band are
generated by 3-bits analog-to-digital converters (ADC). The
whole die area comprising pads and ESD protections is
3.737mm2. This RF front-end has been integrated on the
same die with its companion base-band receiver with minor
performance variation.
Introduction
The deployment of new Global Navigation Satellite
Systems (GNSS) such as the European Galileo [1],
and the Chinese BeiDou2 (formerly Compass), with
the renewed GLONASS constellation, pushes the
development of new positioning receivers able to
process all the available signals at least in the L1 band
(roughly 1550÷1610 MHz); both the ones sharing the
same carrier frequency of the GPS C/A L1 namely the
Binary Offset Carrier (BOC) modulated such as the
Galileo E1 Open Service (OS) and the ones on different
carrier frequencies such as either the GLONASS
FDMA-based centered on slightly higher frequencies
(roughly 1596÷1606 MHz), [2], or the current Chinese
BeiDou2 Open Service B1I signal centered on
1561.098MHz, [3]. This to insure the benefit of
receiving signals from two, or more, different GNSS’s:
robustness, higher number of visible satellites, low
values for Dilution of Position, better performances in
urban canyon and better accuracy. This latter due
especially to BOC modulated signals that, if properly
processed, achieve finer tuning and better multipath
rejection capability than the GPS C/A code. To process
all these signals a GNSS receiver needs wider
bandwidth, improvement in linearity and better
interference rejection with respect to classical GPS
receiver for consumer market. All these improvements
pose some “new” requirement for RF front-end (FE)
design. Lastly, for integration in several platforms the
RF FE has to comply with a range of reference
frequencies, especially the ones commonly used in
communication and telematic applications.
In this contribution we present a CMOS 65nm, low-
power, RF FE for GPS/Galileo L1/E1 OS, GLONASS
and BeiDou2-B1I signals. It is an evolution of the RF
FE already presented in [4]. For Galileo, we have
chosen to support only the BOC(1,1) modulated part
of the OS Composite-BOC signal, considering slightly
more than 4 MHz as IF filter bandwidth, according to
performances requested for mass-market products
(e.g., consumer/automotive).
The RF FE can switch between different basic
functionalities: the GPS-only mode with narrow IF
bandwidth (roughly 2 MHz), the GPS/Galileo mode
with wider IF bandwidth (roughly 4MHz), the
GLONASS-only mode, the GPS/GLONASS mode, the
GPS/Galileo/GLONASS (G3) mode, the BeiDou2-only
mode, the GPS/BeiDou2 mode, the
GPS/Galileo/BeiDou2 mode and the GPS/Galileo
/GLONASS/BeiDou2 mode (with some degradation on
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GLONASS and BeiDou2 due to partial overlapping of
the two signals in the related IF filter). We have
defined 26 MHz as default external reference
frequency. But the chip has a programmable
synthesizer that can also accept as reference most of
the commonly used TCXO frequencies through proper
setting provided by serial peripheral interface, SPI.
RF Front-End Overview and Architecture
The target specifications for this L1/E1/G1/B1 RF FE
design are summarized in Table 1, while simplified
block scheme is in Fig.1. The chosen architecture for
GPS/Galileo signals is a single down-conversion low-
IF with IF frequency of 4f0 (f0=1.023 MHz).
TABLE 1 GPS/GALILEO/GLONASS L1/E1 FRONT-END SPECS
RF front-end parameter
Requirement
RF frequency (1st LO)
1.571 GHz
2nd LO frequency (for GLO)
21.824 MHz
Central IF for GPS/GAL
4.092 MHz
Central IF for GLONASS
8.566 MHz
Central IF for Bidou2 B1I
10.23 MHz
Gain range (dB)
50
-1dB IF filter Bandwidth GPS
mode (Galileo mode)
2MHz (4MHz)
-1dB GLONASS IF Bandwidth
8 MHz
-1dB BeiDou2 IF Bandwidth
4.092 MHz
IRR (Min.)
20 dB
Min Out-of-
band rejection
GPS
20 dB
(@12MHz)
Galileo
(@28MHz)
Min Out-of-band rejection (for
GLONASS and B1I)
20 dB (@51MHz)
Max current consumption
20 mA
Group delay
variation for IF
filter
±30 nsec
±10 nsec
NF with internal LNA
<3 dB
External Supply Voltage
1.2V
Output quantization bits
3
For GLONASS signals the architecture is a double
down-conversion low-IF, sharing with the GPS/Galileo
path the first down-conversion mixer, with final IF
frequency of roughly 8.566MHz. For the present
BeiDou2 B1I signal the architecture is again a single
down-conversion using the image at roughly 10f0
obtained after first mixer with LO at 1571.328MHz.
The frequency plan for down-conversion is reported in
Fig.2. All the needed frequencies are generated by a
fully embedded PLL. Sampling frequency for all the
processed signals will be 64f0.
A first difference between the architecture in Fig.1 and
the previous version in [4] is that LNA and RFA have
been directly connected obtaining the two-stages LNA
eliminating also two externals pins and avoiding the
matching network for their connection. This allows
current reduction in first LNA stage (roughly saving
3mA) while achieving almost the same gain and NF as
in [4]. The drawback is a loss of flexibility in channel
separation and out-of-band rejection because in [4] it is
possible to insert an external filter (e.g. a SAW) in
between LNA and RFA.
The GNSS signals coming from the antenna and
external pre-selection filter are amplified by the two-
stages LNA embedded in the chip. It needs external
input matching and dc decoupling to achieve the best
tradeoff between gain and noise figure (NF). Each
stage is based on cascode single-ended configuration
for its good isolation characteristics and low power
consumption [5]-[6]. The low value of degeneration
inductances, required for achieving target LNA
performances, is implemented through only the
bonding wires. LNA output, internally DC blocked,
goes to the first mixer which uses quadrature LO input
achieving image rejection ratio (IRR) better than 20dB
with the following IF filters. The linearity of LNA and
Mixer section ensures immunity to RF blockers close
to GNSS signals and allows using low quality external
pre-selection filter in front of the RF FE.
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FIG. 1 GPS/GALILEO/GLONASS/BEIDOU2 L1/E1/G1/B1I RF FE RECEIVER SIMPLIFIED BLOCK DIAGRAM.
FIG. 2 FREQUENCY PLAN: GPS/GAL, BEIDOU2 AND GLONASS BANDS
AFTER FIRST FREQUENCY CONVERSION (A); THE SAME BANDWIDTHS
AFTER POLYPHASE FILTERING AND SECOND FREQUENCY CONVERSION IN
THE SECOND IF CHAIN CONFIGURED FOR GLONASS SIGNALS (B).
FIG.3 FREQUENCY SYNTHESIZER BLOCK DIAGRAM.
TABLE 2 SOME SUPPORTED TCXO AND DIVIDER VALUES
Fref (MHz)
10.000
16.368
19.200
24.5535
26.000
Fin (MHz)
1.429
16.368
1.011
24.5535
1.625
N
1100
96
1555
64
967
R
7
1
19
1
16
The IF signal then is split in two IF chains as in Fig.1.
The first one for GPS/Galileo signals presents a band-
pass complex IF filter centered at 4f0 and 1dB-
bandwidth of 2MHz for GPS-only configuration and
4MHz for Galileo configuration. After IF filter there
are a variable gain amplifier (VGA) with AGC and
ADC blocks. The second IF chain can be configured for
either BeiDou2 B1I or GLONASS signal or for both
signals at the same time according to a selection bit.
For GLONASS the signal chain is the same as in Error!
Reference source not found., polyphase filter
followed by second mixer and GLONASS/BeiDou2
complex IF filter; that has been redesigned for low-
power consumption, size reduction and performance
optimization. For BeiDou2 B1 the signal pass through
a phase shifter bypassing the polyphase filter and the
second mixer and it is fed into the complex IF filter
(GLONASS/BeiDou2 filter). In both cases the
GLONASS/BeiDou2 IF filter output signal is passed to
the VGA and 3-bits-ADC and finally provided to the
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Base-Band.
The GLONASS/BeiDou2 IF filter is totally different
with respect to GLONASS one in [4], as will be
highlighted in related section.
Note that AGC and ADC blocks on both chains share
the same configuration with minor adjustments for the
wider bandwidth of GLONASS ensemble signal.
GPS/Galileo IF Chain
Complex IF filtering has been chosen for its
asymmetrical transferring function [7]-[11], ensuring
good rejection of out-of-band and image signals. It is
based on decoupled 1st order cells cascaded to get the
final band-pass filter order. It is characterized by two
operative modes: the first one for GPS/Galileo signals
based on a 4th order configuration; the second for GPS
signal-only based on a 3rd order configuration. It is
obtained switching off and by-passing the “extra”
stage for Galileo, and adjusting the response of the
three other stages, saving some current in GPS only
case. Each single stage band-pass filter response is a
frequency-shifted version of a low-pass Butterworth
filter type [10]-[13]. Its design uses operational trans-
conductor amplifiers and capacitors (gm-C or OTA-C).
Each filter stage shares the same bandwidth centered
on different frequencies symmetrically placed around
the IF at 4f0 in order to achieve wider bandwidth
maintaining a low-order IF filter with good rejection
for both out-of-band and image signals. A more
detailed description can be found in [14].
The IF filter is followed by a VGA driven by digital
AGC loop. It has a gain range of 50dB to amplify the
incoming signal and assure a proper level at ADC
input. The AGC controls signal amplitude to avoid (or
limit) ADC saturation ensuring an efficient use of its
dynamic range. It is based on indirect power
estimation through measurement of threshold-
crossing rate of the received signal, similar to [15]. This
method measures how many times the signal exceeds
the threshold and then deduces its power, tacking the
right action for driving the VGA. The threshold has
been defined assuming AWGN distribution of
received signal because GNSS signals are buried in the
noise at ADC input. The AGC adjusts the gain
integrating digitally Mag1 bit by a digital circuit. It
fixes the Mag1 bit duty cycle in a range (e.g. from 26%
to 40%) set by the base-band (BB) through SPI. To
minimize quantization losses a 3-bit ADC is used. It
converts the IF signal into Sign bit (MSB) and two
magnitude bits Mag1 and Mag0 (LSB).
The frequency synthesizer is an N/R programmable
integer PLL (Fig.3), accommodating the most
commonly used TCXO frequencies (from 10 to 52
MHz). In order to improve noise immunity of the VCO
control node and to reduce external components count,
an embedded programmable RC passive loop filter is
used. This latter can be adjusted by SPI for each input
crystal reference frequency optimizing the poles and
zero position for loop stability. By default one TCXO
frequency is set: 26MHz. In order to support other
reference frequencies the synthesizer parameters
(divider ratio, loop filter and charge pump current)
can be set through SPI. A few supported TCXO and
the relevant division factors “N” and “R” are shown in
Table 2. The synthesizer embeds a VCO working at
3.142GHz, a divider by 2 generates two LO signals (I
and Q) at the needed frequency for the first image
rejection mixer [4]. From this LO, through off loop
dividers, are also obtained the LO signals for the
second mixer, the sampling and the BB clocks, 64f0
and 192f0 respectively.
GLONASS/BeiDou2 IF Chain
For GLONASS signals the IF chain diverting from first
mixer (I and Q format) presents a poly-phase filter for
image frequency rejection with respect to the
GLONASS bandwidth now centered at roughly 30
MHz. After this filter a second mixer with LO signals
at 21.824 MHz provides the final down-conversion of
the GLONASS band in the range from 4.655 MHz to
12.4785 MHz. After the mixer, the signal enters in a
selector that allows either GLONASS signal or
BeiDou2 signal or both signals to pass to the next IF
filter.
For BeiDou2 signal (as image in the range from 8.184
MHz to 12.276 MHz) the IF chain diverting from the
first mixer presents a shifter block composed by a
phase inversion performed through an elementary net
interchange, overlapping down-converted BeiDou2
signal on the down-converted GLONASS bandwidth
with coherent phase, so that the same IF filter can be
shared. This block includes also an amplifier that
balances the gain with the GLONASS chain. The
shifter output enters in the selector and then the signal
is passed to the IF filter.
The Glonass/BeiDou IF filter has been designed
according to specification in Table 3 in order to obtain
a reduction both in current consumption, from 7.6mA
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as in [4] to roughly 2mA, and in silicon area,
maintaining roughly the same performances of the
previous version described in [4]. This has been
possible due also to the higher sampling frequency in
this RF FE, 64f0 vs 32f0 in [4], lessening the
specification of the IF filter especially for out-of-band
rejection and anti-alias function; on the other hand
image rejection requirement remained unchanged and
stringent. Then, for performance optimization, this IF
filter has been split in two parts: the first one performs
the image rejection trough a passive complex filter
(polyphase); the second part is an active real 3rd order
Chebychev-I filter that gives the required out-of-band
attenuation, acting also as anti-alias filter for the ADC
sampling process. A detailed description of the filter
may be done referring to Fig.4, in which the four
buffers just perform an impedance matching, with
unitary gain, to properly drive the poliphase filter that
immediately follows. The poliphase filter consists of
three stages, each one centered at a different frequency
to obtain a wider frequency range of image rejection.
In particular, the first stage is centered at 10.5MHz, the
second at 7.1MHz and the third at 4.5MHz, obtaining a
frequency range of roughly 11MHz with an image
rejection better than 30dB in post-layout simulations.
Buffer and poliphase determinates 3.5 dB of loss for in-
band signals.
FIG.4 COMPLEX GLONASS/B1I IF FILTER BLOCK DIAGRAM.
TABLE 3 GLONASS/B1I IF FILTER DESIGN PARAMETERS
Gain (dB)
1.2
1dB bandwidth (MHz)
14.1
Attenuation (dB)
@32MHz
17.6
@51.5 MHz
30.5
@112MHz
51
Image rejection (dB)
@8.56 MHz
25
Group delay variation in [4.65-12.48 MHz] (ns)
18.1
V1dB (mV)
179
After the poliphase filter, the adder combines in-phase
signal with the in-quadrature signal in order to obtain
a real signal with appropriate image rejection. It
provides 3.3dB of gain, at its input has a “zero” which
at 2.6MHz attenuates 1dB. The adder is the block that
limits the signal swing of the filter chain, because in
simulation presents V1dB similar to that of the whole
filter (roughly 179mV). The last block is the active low
pass real 3rd order Chebychev I filter with gain of
1.5dB, upper frequency corner at 15.1MHz
(considering -1dB point) and in-band ripple of 0.1dB.
As for GPS chain, the IF filter is followed by VGA with
its AGC loop and 3-bit ADC. The topology of these
blocks is the same as in GPS chain with slight
modification for the wider GLONASS bandwidth
centered on the different IF.
Measurements
The described RF FE has been implemented in CMOS
65nm with a die area of 3.737mm2 comprising pads
and ESD protection, while the core RF FE part
occupies an area of 2.55 mm2, and its layout is in Fig.5.
In this section we briefly summarize measurement
results on available samples coming from
development lots, verifying the matching of the
specification contained in Table 1. A current
consumption of about 19mA has been measured with
both chains enabled and voltage supply at 1.2V, while
when only the GPS/Galileo chain is enabled a
consumption of 14.5mA has been observed. A
maximum gain of 119dB and a NF of 2.0dB have been
measured in typical condition for GPS/GAL chain,
while for GLONASS/BeiDou chain a maximum gain of
116dB and a NF of roughly 2.2dB have been observed.
These results are aligned both with the specifications
in Table I and with the expected values from post-
layout simulations.
Thanks to test points placed at the VGA output, the
behavior of both IF chains (GPS/GAL and
GLONASS/B1I) have been measured and validated. In
particular, for both chains the P1dB compression
points (Table 4), the frequency response (Fig.6 and
Fig.7), image frequency and interference rejection,
minimum and maximum gain and the AGC
functionality have been taken into account and
validated. Almost all target specifications have been
achieved for GPS/Galileo chain, while few differences
are present for the GLONASS/B1I chain. Referring to
Fig.6 and Fig.7 the frequency response in both chains
is mainly defined by the IF filters. In GLONASS/B1I
chain we measured an image rejection (IR) of 25dB
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after second down-conversion in GLONASS mode and
of 27dB in BeiDou mode (second mixer bypassed),
while in GPS/Galileo the values are aligned with the
ones presented in [4] and [14]. In GPS mode it presents
a good symmetry with respect to the central IF while
in Galileo mode there is an asymmetry due to a better
cut-off in the low-frequency region; for GLONASS/B1I
there is a variation of roughly 2dB in the pass-band (it
was 3 dB with previous GLONASS IF filter in [4]). This
feature will be addressed in the next cut of the device,
even if not relevant degradation of Carrier-to-Noise
ratio (CN0) has been observed at system level
measurement with the companion base-band receiver.
In Fig.8 is shown the GPS/Galileo/Glonass/Beidou
mode, it has been obtained injecting three RF tones
respectively at 1561 MHz, 1575.42 MHz and 1602 MHz
and mixing on the same measurement tool both IF test
point outputs In this case a degradation of the gain in
the GLONASS/BeiDou IF filter has been measured
with a slightly higher noise floor.
The VCO phase noise measurement has been
performed injecting a RF signal at -30dBm (by a very
low noise signal generator) into the RF input and
monitoring the IF analog signal for both chains
measuring the down-converted phase noise; in Fig.9 is
shown the phase noise with the VGA at 20dB gain.
The -30dBm RF input level implies that RF/IF chain is
compressed and non-linearity effect are present on the
phase noise as spurious after 1MHz from the carrier.
We have chosen this high input level to bring out the
carrier from the divider noise contribution.
FIG.5 RF FRONT-END LAYOUT.
TABLE 4 P1DB COMPRESSION POINT
AGC gain = 0dB
AGC gain = 20dB
GPS
-70.5 dBm
-84.5 dBm
Galileo
-64.5 dBm
-80.5 dBm
GLONASS
-70.5 dBm
-84.5 dBm
BeiDou
-70.5 dBm
-90.5 dBm
FIG.6 GPS/GALILEO CHAIN MEASURED FREQUENCY RESPONSE: (BLUE
TRACE) GPS ONLY, (RED TRACE) GALILEO/GPS CONFIGURATION.
FIG. 7 GLONASS/BDS CHAIN MEASURED IF FREQUENCY RESPONSE (RF
INPUT POWER AT -90DBM, AGC GAIN SET MANUALLY AT 20DB).
FIG. 8 CONCURRENT GPS/BEIDOU/GLONASS OUTPUT
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FIG. 9 MEASURED IF PHASE NOISE AT 20DB OF VGA GAIN
Lastly, a comparison with our previous chip in [4] and
other commercial L1 GPS/Galileo/GLONASS RF Front
Ends using their available datasheets and application
notes ([16], [18], [19], and [20]) is provided in Table 5.
With respect to our previous chip, this RF presents
lower IR in GLONASS chain mainly due to different
approach of the IF filter; but it maintains constant
value over the GLONASS bandwidth and a greater
phase noise (but we are addressing this aspect for new
silicon cut) compensated by lower power and area
consumption.
With respect to [16] improvements in area and power
consumption are easily recognizable due to both
different technology and design. Phase noise (PN)
value in [16] is better than the one measured in our
chip. The lower NF in [16] is obtained using an
external LNA such as the MAX2659, while our value is
obtained without external LNA; in the same condition
a comparable (or lower) NF can be obtained by our
device. The device in [18] presents again a better
minimum NF but concurrent processing of all three
signals for this case seems not possible, it should be
possible to receive either GPS-only or GPS/Galileo or
GLONASS signals properly setting the LO frequency
through SPI. This latter device can achieve lower
power consumption (roughly 30mW) but with NF
degradation (it increases up to 3.8dB, [18]-[19]). The
device in [20] presents a totally different design (based
on CMOS 40nm technology) with respect our proposal
using only one chain for processing all the supported
GNSS achieving lower power and area consumption
(just considers the area saving using ring oscillator for
LO frequency generation), while NF is comparable
and phase noise is better for our design. This
architecture does not perform image rejection in the
RF part (it is performed in the base-band part).
TABLE 5 COMPARISON
This RF
[4]
[16]
[18]-[19]
[20]
Technology
CMOS 65nm
CMOS 65nm
CMOS 180nm
SiGE BiCMOS
CMOS 40nm
IF chains
2
2
1
1
1
Overal Gain
119 (GPS/GAL)
116 (GLO/B1I)
119 (GPS/GAL)
111 (GLO)
60
115
78
Gain range
50
50
57
59
26
Bandwidth (MHz)
2 or 4 (GPS/GAL)
8 or 4 (GLO/B1I)
2 or 4
(GPS/GAL) 8
(GLO)
2 or 4
(GPS/GAL)
9.56(GLO)
18.4141(BD2)
2.5; 4.5; 8; 18
2 or 4 (GPS/GAL)
16 (GPS/GAL/GLO)
9 (GPS/GAL/B1I)
NF (dB)
2.0 (GPS/GAL)
2.2 (GLO/B1I)
1.8 (GPS/GAL)
2.5 (GLO)
1.6(1)
1.4(2)
2.1
IR (dB)
21 (GPS/GAL)
25 (GLO)
27 (B1I)
20 (GPS/GAL)
33 (GLO)
35 GPS
33 GLO
25
33
PN @1MHz (dBc/Hz)
-104
-108
-115.79
NA
-94
ADC (bits)
3
3
2
2(3)
9 (I/Q SAR)
Area (mm2)
2.55
4.65
6.9
5.05
0.25
Power
~23mW @1.2V
36mW @1.2V
45.15mW @2.1V
63mW @3V(4)
~11.6mW @ 1.3V(5)
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Conclusions
We have presented a CMOS 65nm low-power
L1/E1/G1/B1 GPS/Galileo/GLONASS/BeiDou2 RF FE,
low-IF based, able to work with most of the common
used TCXO frequencies. It presents high integration
level reducing the bill of material while retaining
flexibility for customer applications (several FE
parameters can be set through SPI) and a power
consumption of roughly 23mW on 1.2V supply voltage
when the chip is fully operative, e.g. both GPS/Galileo
and GLONASS/BeiDou2 chains working (17.4mW in
GPS/Galileo mode). We have also briefly presented its
measurement results on development/
characterization lots, comparing them with data of
other similar commercial RF front-ends. This RF FE
has been also integrated (but scaled down to 55nm) in
a single die with its companion base-band receiver
with minor performance modification as
STA8089/STA8090 Teseo III.
ACKNOWLEDGMENT
This RF FE design has been developed in the context
of the HIMALAYA FP-7 project granted by European
Commission.
The authors are grateful to Philip Mattos for support,
discussions and helpful advices, to Giuseppe Di
Chiara, and the Catania APG application team for
their support in chip measurement/characterization.
REFERENCES
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