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Multi-mode encoding with binary-indexed flash code.
Abstract
A new flash code is proposed in this paper. This flash code has two modes of encoding: one extending the binary-indexed flash code which has been proposed by the authors, and the other using a simple mapping. It is shown that the proposed flash code has O(kq\log k + n) worst-case write deficiency, but competes very well with existing flash codes in the average write deficiency which is evaluated through computer simulations.
... One way to counteract the write-erase cycle limitation is to design efficient schemes used for encoding information to flash memory. Such coding schemes, more popularly known as floating codes [5], [7] or flash codes [6], [7], [8], [9], [10], [11], have recently attracted the attention of researchers, particularly computer scientists, because of the challenges involved in their development [6]. The Indexless Indexed Flash Code (ILIFC) [7] and Layered Indexless Indexed Flash Code (LILIFC) [6] are just two of the popular coding schemes discussed in this and numerous other papers. ...
... The Indexless Indexed Flash Code (ILIFC) [7] and Layered Indexless Indexed Flash Code (LILIFC) [6] are just two of the popular coding schemes discussed in this and numerous other papers. More advanced schemes including Phoenix Flash Code (PFC) [9], Binary-Indexed Flash Code (BIFC) [10], Bi-Modal Flash Code (BMFC) [8], and Multi-mode Flash Code (MMFC) [11] provide better performance but also require more complex algorithms to implement. ...
... The authors further intended to adhere as close as possible to the original LILIFC, so as to maintain its advantage in simplicity and, in many cases, speed. Hence, more complex coding schemes, such as hybrids used in [8], [9], [10], [11] were not considered. ...
Flash codes are used to encode and decode digital information in flash memory. One of the more
well-known flash codes in literature is the Layered Indexless Indexed Flash Code (LILIFC). This study explores
how to improve the performance of the LILIFC while staying true to its core. A new flash code is
proposed, called the Layered Indexless Indexed Flash Code with Absorption (LILIFCWA), which introduces
sub-block absorption to the LILIFC encoding function while retaining the original decoding function. Results
from computer simulation showed marked improvements gained by LILIFCWA, with lower write deficiency
ratios over variable flash memory sub-block sizes. An interesting correlation between the
(LILIFCWA versus LILIFC) performance difference and cases involving a dominant bit update was also uncovered.
These findings not only prove the superiority of the LILIFCWA over the LILIFC, but may also
provide ideas to other researchers on how to improve other existing flash codes.
... More recently, Tan, et al., proposed a Multi-mode Flash Code (MMFC) that combines BIFC with Simple Segmentation [8]. Segments refer to simple mapping of cells to data bits within a group of cells. ...
... The encoding function E(i,C) provides the rules on writing a new state to the block given the index i of the data bit d i that needs to be updated and the current state C of the block. The decoding function D(C) interprets the content C of the block into the corresponding k-bit data D [8]. ...
Flash codes are designed to write and read information from a flash memory device. The performance of a flash code is often described in terms of write deficiency. Flash codes with low write deficiencies help lengthen the lifespan of flash devices. This paper describes a technique for combining the Index-less Index Flash Code (ILIFC) and the Layered Index-less Index Flash Code (LILIFC) in order to decrease the write deficiency. Two resulting flash codes are proposed: the Bi-Modal Flash Code (BMFC) and the Two-Split Bi-Modal Flash Code (BMFC2). These proposed flash codes have an asymptotic worst case write deficiency of O(k^2q + n/k), and through computer simulation are shown to have significantly lower average write deficiency compared with the ILIFC and LILIFC.
... Though the process of adding electric charge to a cell is easy, erasing a charge is impossible without deleting the charge in the entire block. This is often referred to as write asymmetry and is one limitation of flash memory [4,7,10,8]. Everything stored inside the flash code can be accessed or programmed one bit at a time in a random fashion, but erasures are only done one block at a time. ...
Flash codes are used to decode and encode digital information in flash memory. The performance of a flash code is normally evaluated using the write deficiency metric which corresponds to the gap between the theoretical maximum writes in a flash device, against the actual number of writes in using the specific flash code. This study proposes a new flash code, named Pheonix Flash Code, where the techniques of absorption and revival are introduced. The decoding and encoding schemes for this flash code are formally described. Simulation experiments were conducted, and the results indicate that the Pheonix Flash Code has significantly lower write deficiency compared to several known flash codes and may therefore be expected to allow more write operations to flash memory devices.
... There are several other proposed flash codes in literature, including the Binary Index Flash Code (BIFC) [6], BIFC with Resizable Cluster Method (BIFC-RCM) [7], and Multi-mode Flash Code (MMFC) [8]. In this study, we focus on the ILIFC and LILIFC in order to come up with a scheme that takes advantage of the high similarity between these 2 flash codes, and develop a flash code with a lower average write deficiency. ...
Flash technology uses flash codes to efficiently manage the storage of data. Flash codes that have lower write deficiencies translate to better performance and leads to a longer lifespan of flash devices. One way to lower the write deficiency is to reduce the size of slices. This paper presents a flash code that extends the ILIFC and the LILIFC. By combining them into a bi-modal flash code, smaller slices can be used. The write deficiency is measured through numerical analysis as well as computer simulation. The flash code presented has an asymptotic worst case write deficiency of O(k^2q + n/k) and produces an improved average write deficiency to ILIFC and LILIFC
... The idea of introducing absorption stems from the fact the SSFC has a very high write deficiency in the worst case. SSFC has an asymptotic worst case write deficiency of O(nq) [17,18], while PFC has O(k 2 q + n) [19]. ...
Flash codes are used to handle decoding and encoding of digital information to flash memory devices. The performance of a flash code is usually evaluated using the write deficiency metric. This paper introduces the K-Partition Flash Code (KPFC) with BIFC-based sharing and explores some of its variants. KPFC is a coding scheme that involves a sharing mechanism within partitions of a flash memory block. The technique was designed to allow more cell writes to flash devices in order to improve its performance by lowering its write deficiency. Computer simulations were conducted to estimate the average case performances of the flash codes. Simulation results showed that its performance is generally better than the flash codes in literature.
The explosion of flash memory technology has dramatically increased storage capacity and decreased the cost of non-volatile semiconductor memory. The technology has fueled the proliferation of USB flash drives and is now poised to replace magnetic hard disks in some applications. A solid state drive (SSD) is a non-volatile memory system that emulates a magnetic hard disk drive (HDD). SSDs do not contain any moving parts, however, and depend on flash memory chips to store data. With proper design, an SSD is able to provide high data transfer rates, low access time, improved tolerance to shock and vibration, and reduced power consumption. For some applications, the improved performance and durability outweigh the higher cost of an SSD relative to an HDD. Using flash memory as a hard disk replacement is not without challenges. The nano-scale of the memory cell is pushing the limits of semiconductor physics. Extremely thin insulating glass layers are necessary for proper operation of the memory cells. These layers are subjected to stressful temperatures and voltages, and their insulating properties deteriorate over time. Quite simply, flash memory can wear out. Fortunately, the wear-out physics are well understood and data management strategies are used to compensate for the limited lifetime of flash memory.
Flash memory is a non-volatile computer memory comprised of blocks of cells, wherein each cell can take on q different values or levels. While increasing the cell level is easy, reducing the level of a cell can be accomplished only by erasing an entire block. Since block erasures are highly undesirable, coding schemes - known as floating codes or flash codes - have been designed in order to maximize the number of times that information stored in a flash memory can be written (and re-written) prior to incurring a block erasure. An (n, k, t)q flash code ¿ is a coding scheme for storing k information bits in n cells in such a way that any sequence of up to t writes (where a write is a transition 0 ¿ 1 or 1 ¿ 0 in any one of the k bits) can be accommodated without a block erasure. The total number of available level transitions in n cells is n(q-1), and the write deficiency of ¿, defined as ¿(¿) = n(q-1)-t, is a measure of how close the code comes to perfectly utilizing all these transitions. For k > 6 and large n, the best previously known construction of flash codes achieves a write defficiency of O(qk2). On the other hand, the best known lower bound on write deficiency is ¿(qk). In this paper, we present a new construction of flash codes that approaches this lower bound to within a factor logarithmic in k. To this end, we first improve upon the so-called ¿indexed¿ flash codes, due to Jiang and Bruck, by eliminating the need for index cells in the Jiang-Bruck construction. Next, we further increase the number of writes by introducing a new multi-stage (recursive) indexing scheme. We then show that the write defficiency of the resulting flash codes is O(qk log k) if q ¿ log2 k, and at most O(k log2 k) otherwise.
Flash memory is an electronic non-volatile memory with wide applications. Due to the substantial impact of block erasure operations on the speed, reliability and longevity of flash memories, writing schemes that enable data to be modified numerous times without incurring the block erasure is desirable. This requirement is addressed by floating codes, a coding scheme that jointly stores and rewrites data and maximizes the rewriting capability of flash memories. In this paper, we present several new floating code constructions. They include both codes with specific parameters and general code constructions that are asymptotically optimal. We also present bounds to the performance of floating codes.
Memories whose storage cells transit irreversibly between states have been common since the start of the data storage technology. In recent years, flash memories and other non-volatile memories based on floating-gate cells have become a very important family of such memories. We model them by the Write Asymmetric Memory (WAM), a memory where each cell is in one of q states – state 0, 1, ... , q-1 – and can only transit from a lower state to a higher state. Data stored in a WAM can be rewritten by shifting the cells to higher states. Since the state transition is irreversible, the number of times of rewriting is limited. When multiple variables are stored in a WAM, we study codes, which we call floating codes, that maximize the total number of times the variables can be written and rewritten.
In this paper, we present several families of floating codes
that either are optimal, or approach optimality as the codes get longer. We also present bounds to the performance of general floating codes. The results show that floating codes can integrate the rewriting capabilities of different variables to a surprisingly high degree.
In the present paper, a modification of the Index-less Indexed Flash Codes
(ILIFC) for flash memory storage system is presented. Although the ILIFC
proposed by Mahdavifar et al. has excellent worst case performance, the ILIFC
can be further improved in terms of the average case performance. The proposed
scheme, referred to as the {\em layered ILIFC}, is based on the ILIFC. However,
the primary focus of the present study is the average case performance. The
main feature of the proposed scheme is the use of the layer-based index coding
to represent indices of information bits. The layer index coding promotes the
uniform use of cell levels, which leads to better average case performance.
Based on experiments, the proposed scheme achieves a larger average number of
rewritings than the original ILIFC without loss of worst case performance.
Storage media such as digital optical disks, PROMS, or paper tape consist of a number of ”write-once” bit positions (wits); each wit initially contains a ”0” that may later be irreversibly overwritten with a ”1”. It is demonstrated that such ”write-once memories” (woms) can be ”rewritten” to a surprising degree. For example, only 3 wits suffice to represent any 2-bit value in a way that can later be updated to represent any other 2- bit value. For large k, 1·29····k wits suffice to represent a k- bit value in a way that can be similarly updated. Most surprising, allowing t writes of a k-bit value requires only t+o(t) wits, for any fixed k. For fixed t, approximately k·t/log(t) wits are required as k→∞. An n-wit WOM is shown to have a ”capacity” (i.e., k·t whenn writing a k-bit value t times) of up to n·log(n) bits.
The expected write deficiency of the index-less indexed flash codes (ILIFC) is studied, and a technique is developed to improve the write deficiency of ILIFC. ILIFC is a coding scheme for flash memory, and consists of two stages with different coding techniques. This study first clarify the average write deficiency of the first stage of ILIFC, and shows that omitting the second stage of ILIFC can be a practical option for realizing flash codes with good average performance. The study also investigates an improvement of the index-less coding which is used in the first stage of ILIFC. The improvement reduces the write deficiency of ILIFC, and relaxes the constraints on the rate of the code.
Flash memory is a non-volatile computer memory comprised of blocks of cells, wherein each cell can take on q different levels corresponding to the number of electrons it contains. Increasing the cell level is easy; however, reducing a cell level forces all the other cells in the same block to be erased. This erasing operation is undesirable and therefore has to be used as infrequently as possible. We consider the problem of designing codes for this purpose, where k bits are stored using a block of n cells with q levels each. The goal is to maximize the number of bit writes before an erase operation is required. We present an efficient construction of codes that can store an arbitrary number of bits. Our construction can be viewed as an extension to multiple dimensions of the earlier work of Jiang and Bruck, where single-dimensional codes that can store only 2 bits were proposed.
Floating codes are codes designed to store multiple values in a Write Asymmetric Memory, with applications to flash memory. In this model, a memory consists of a block of n cells, with each cell in one of q states {0,1,...,q -1}. The cells are used to represent k variable values from an ¿-ary alphabet. Cells can move from lower values to higher values easily, but moving any cell from a higher value to a lower value requires first resetting the entire block to an all 0 state. Reset operations are to be avoided; generally a block can only experience a large but finite number of resets before wearing out entirely. A code here corresponds to a mapping from cell states to variable values, and a transition function that gives how to rewrite cell states when a variable is changed. Previous work has focused on developing codes that maximize the worst-case number of variable changes, or equivalently cell rewrites, that can be experienced before resetting. In this paper, we introduce the problem of maximizing the expected number of variable changes before resetting, given an underlying Markov chain that models variable changes. We demonstrate that codes designed for expected performance can differ substantially from optimal worst-case codes, and suggest constructions for some simple cases. We then study the related question of the performance of random codes, again focusing on the issue of expected behavior.
Storage media such as digital optical discs, PROM's, or punched cards consist of a number of write-once bit positions (WIT's); each WIT initially contains a "0" that may later be irreversibly overwritten with a "r'. Rivest and Shamir have shown that such write-once memories (WOM's) can be reused very efficiently. Generalized WOM's are considered, in which the basic storage element has more than two possible states and the legal state transitions are described by an arbitrary directed acyclic graph. The capabilities of such memories depend on the depth of the graphs rather than on their size, and the decision problem associated with the generalized WOM's in NP-hard even for 3 -ary symbols rewritten several times or multiple values rewritten once.
Rank modulation for flash memories
- A Jiang
- R Mateescu
- M Schwartz
- J Bruck
A. Jiang, R. Mateescu, M. Schwartz and J. Bruck,"Rank modulation
for flash memories," Proc. IEEE Intern. Symposium on Information
Theory, pp. 1731-1735, Toronto, Canada, July 2008.
Uniform-Compartment Flash Code and Binary-Indexed Flash Code
- M J Tan
- Y Kaji
M.J. Tan and Y. Kaji,"Uniform-Compartment Flash Code and
Binary-Indexed Flash Code," IEICE Technical Report, IT2011-43,
pp. 25-30, January 2012.
Applying Resizable-Cluster Method in Binary-Indexed Flash Code
- M J Tan
- Y Kaji
M.J. Tan and Y. Kaji,"Applying Resizable-Cluster Method in Binary-Indexed Flash Code," to be presented in the 35th Symposium on Information Theory and its Applications (SITA 2012), Oita, Japan, December 2012.