Primary parallel secondary series flyback converter (PPSSFC) with multiple transformers for very high step-up ratio in capacitive load charging applications

Abstract

Flyback converters are widely used in several applications, however, with this topology it is very challenging to achieve high voltage operation especially with very high step-up ratio (>500) within limited space. This paper presents a new flyback-based topology which utilizes primary parallel and secondary series transformer connection in order to achieve very high step-up ratio (up to 650) as well as high voltage operation (~2 kV) in a small volume. The topology is presented and analyzed. The advantages and disadvantages of the proposed topology are discussed. A prototype used to verify the proposed topology has been implemented. Finally, experimental results are used to validate the performance of the proposed topology.

Full text

Primary Parallel Secondary Series Flyback Converter
(PPSSFC) with Multiple Transformers for Very High
Step-Up Ratio in Capacitive Load Charging
Applications
Riccardo Pittini, Lina Huang, Zhe Zhang and Michael A. E. Andersen
Department of Electrical Engineering
Technical University of Denmark
Oersteds Plads, Building 349, Kgs. Lyngby, Denmark
Email: ripit@elektro.dtu.dk, huang@elektro.dtu.dk, zz@elektro.dtu.dk, ma@elektro.dtu.dk
Abstract— Flyback converters are widely used in several
applications, however, with this topology it is very challenging to
achieve high voltage operation especially with very high step-up
ratio (>500) within limited space. This paper presents a new
flyback-based topology which utilizes primary parallel and
secondary series transformer connection in order to achieve
very high step-up ratio (up to 650) as well as high voltage
operation (~2 kV) in a small volume. The topology is presented
and analyzed. The advantages and disadvantages of the
proposed topology are discussed. A prototype used to verify the
proposed topology has been implemented. Finally, experimental
results are used to validate the performance of the proposed
topology.
I. INTRODUCTION
Power electronics converters are used in an increasing
number of fields and applications. The improvements in
power electronic devices and semiconductor materials have
significantly reduced the cost of power converters and
increased their efficiency. The research concerning the power
converters, however, is mostly focus on processing the power
for resistive or resistive-inductive load. In recent years,
capacitive load applications have been gradually brought into
the view of researchers as well as engineers. One successful
application is the photoflash capacitor inside the camera [1].
In addition, capacitive smart material, such as piezoelectric
material and Dielectric Electro Active Polymer (DEAP)
[2][3], have gained extensive attention from academia and
industry and they can be potentially used in a variety of
applications [4][5]. The major advantage given by these
materials is that it is possible to have non-magnetic actuator
which can be applied in some magnetic sensitive occasions,
e.g. in magnetic resonance imagining (MRI). These types of
actuators have a capacitor-like structure where the dielectric
material is confined between two electrodes. By applying a
voltage difference between the electrodes, charge is stored in
the device. Then the induced electrostatic force creates an
attraction between the two electrodes and causes a
displacement of the dielectric material. This movement can be
used to create a non-magnetic linear actuator that behaves as a
variable capacitor in electrical terms. One common issue for
above-mentioned capacitive loads is that they require
relatively high voltage to be operated [6]. In the case of
photoflash and piezoelectric material applications, this voltage
is in the range of hundred volts. However, in the case of
DEAP actuators, the voltage level is in the multi-kV range
(typically 2.5 kV) [7].
Flyback converters are widely used in a large variety of
industrial and consumer applications, such as laptop chargers,
mobile phone chargers, standby power supplies for computers
and other low power (<250 W) switch mode power supplies
(SMPSs). The success of the flyback topology is due to its
simplicity, low component count and cost. In fact, flyback
converters are also often used for achieving high step-up
ratios. However, in low power high voltage applications, the
converter design becomes challenging mostly due to parasitic
elements and component stresses. In high voltage applications
[8] one of the major factors that affects converter performance
is the flyback transformer. The transformer leakage inductance
causes significant stresses over the primary power
semiconductors. In addition, the transformer end-to-end
capacitance (or stray capacitance) becomes one of the main
concerns for high voltage applications (>1 kV) [4][9][10].
This is mostly due to the large amount of energy that is stored
in this stray capacitance at high voltages. Limiting the energy
stored in this interwinding stray capacitance can significantly
improve the converter performance in terms of efficiency as
well as increasing the working voltage. One solution to
achieve this is to have an optimized transformer winding
978-1-4799-2325-0/14/$31.00 ©2014 IEEE 1440

configuration which results in a higher manufacturing cost.
Besides, a small value of stray capacitance can be easily
achieved by using a large core volume which would provide
flexibility in the winding arrangement and in the selection of
the wire diameter.
In this paper, in order to have a high voltage converter
within a small converter volume, a new topology based on
primary parallel secondary series flyback converter (PPSSFC)
is presented. The new topology uses series and parallel
connection of multiple transformers to achieve very high step-
up ratio (up to 650) and low energy stored in the transformer
output stray capacitance. A low-power high-voltage converter
prototype has been designed for DEAP actuator (capacitive
load) in heating valve applications. The converter is
characterized by an input voltage of 3 V and an output voltage
of 2 kV with a size of ~3.5x2.5 cm. Experimental results
validate the proposed topology achieving a step-up ratio of
~650 times (from a 3 V battery up to 2 kV).
II. PROPOSED TOPOLOGY: PRIMARY PARALLEL
SECONDARY SERIES FLYBACK CONVERTER (PPSSFC)
It is challenging to achieve a low winding stray
capacitance for a high voltage flyback transformer without
applying complex winding configurations or without a highly
optimized transformer design. This is especially true in the
case of small transformers.
It is well known that capacitors series connection results in
a smaller equivalent total capacitance. Based on this basic
principle, the series connection of several transformer
secondary windings is beneficial for reducing the equivalent
secondary winding stray capacitance. In capacitive load
charging applications, the energy stored in flyback transformer
during each charging cycle can be used as criteria for
evaluating the capacitive load charging capability. That
means, the more energy the transformer can store, the higher
output voltage the converter can achieve in the case of same
winding stray capacitance. For this reason, the parallel
connection instead of series connection for primary windings
tends to be beneficial in increasing the transferable energy to
the secondary side.
The primary in parallel secondary in series based flyback
converter has been derived and depicted in Fig. 1. Assuming
 transformers, each transformer has a secondary winding
stray capacitance Cs, then the secondary equivalent stray
capacitance (Cseq) can be obtained through (1), which results
in a capacitance is reduced by a factor of N.
 
 (1)
Similarly, the total primary equivalent inductance (Lprieq)
can be calculated through the following equation
 ∙_ _ (2)
where Lp_m and Lp_l are the primary magnetizing inductance
and the leakage inductance, respectively. Considering the
same peak current as in the single transformer case, the energy
stored in the PPSSFC configuration will be N times larger than
the energy stored in only one transformer.
Minimizing the energy stored in the windings stray
capacitance is extremely beneficial for high voltage
applications. However, this advantage is reduced by the
increased secondary series resistance. In fact, the windings
series connection at the transformers secondary sides results in
higher winding losses since the total secondary winding
Fi
g
1. Circuit scheme of the
p
ro
p
osed
p
rimar
y
p
arallel secondar
y
series fl
y
back converter
(
PPSSFC
)
to
p
olo
gy
.
1441

resistance (Rw_s_eq) is  times the single transformer secondary
winding resistance (Rw_s), as in (3). Therefore, there will
always be a trade-off between the energy stored in the output
capacitance and the total secondary winding resistance.
__ ∙_ (3)
III. OPERATING PRINCIPLES AND ANALYSIS
A. Assumption and General Information
In this investigation, the N-transformers are supposed to be
identical. Possible mismatches of primary inductances due to
parameters variation in the transformer production will cause
different peak current in each transformer but, the secondary
series connection forces the current in the transformers to be
equal. Therefore, to simplify the analysis, the current in each
transformer stage can be considered to be equal. Similarly, the
mismatches of secondary stray capacitances will result in the
unbalanced voltage sharing. The primary parallel connection
forces the voltage over winding to be equal. For this reason, it
is reasonable to assume that the voltage is balanced for the
secondary windings.
Commonly, converters used in charging capacitive load
applications stops working when the pre-set output voltage is
reached and do not regulate the output voltage like in regular
converters operating in steady state. In fact, the entire charging
process consists of a series of consecutive charging cycles. In
order to improve the charging efficiency, reduce the overall
duration of the charging process and effectively limit the
maximum flux density, the boundary mode control as well as
primary peak current control methodology are the most
suitable candidates and they have been widely employed in
ongoing capacitive load charging applications [11-13].
Another advantage of these control modes is that it is possible
to operate the converter in closed loop by using feedback from
the converter primary side. This does not require a feedback
loop that crosses the converter galvanic insulation barrier.
It is possible to analyze the working principle based on one
charging cycle with the initial output voltage VoutInitial due to
the similarity in behavior for all charging cycles during the
entire charging period. The behavior under high voltage
condition represents the general case for the analysis. To some
extent, the low voltage operation can be considered as a
special case of high voltage operation. For these reasons, the
high output voltage operation will be investigated in detail and
the difference between high voltage and low voltage operation
will be discussed briefly later.
B. Operation Modes Under High Output Voltage
The operation modes in one charging cycle under high
output voltage condition can be expressed in four time
intervals, presented on Fig. 2. And the corresponding critical
operating waveforms are shown in the right side of Fig. 3.
Mode 1 [t0’ ≤ t ≤ t1’: Fig. 2(a)]: At the beginning of this
time interval, primary MOSFET S1 is switched on. Due to the
resonance between the secondary winding inductance and
stray capacitance during the last operation mode [t3’ t4’] of
previous charging cycle, a negative minimum primary
winding current is induced at time instant t0’, which can be
roughly estimated through the following equation
_ 
__ ∙
 (4)
where VoutInitial not only represents the initial output voltage for
the current charging cycle, but also stands for the final output
voltage of previous cycle. Cs, Lp_m and Lp_l are the secondary
winding stray capacitance, primary magnetizing inductance
and primary leakage inductance for one transformer. N
represent the total transformer number in the PPSSFC
configuration.
In this operation mode the primary winding current
increases from Ipri_min until it reaches the pre-set peak current
Ipri_p. Considering the influence of the on-resistance of S1
(Rdson), this current for each transformer Ipri_T can be expressed
as
_
∙_

∙∙∙
__∙
(5)
where Vin is the input voltage for the proposed converter.
Correspondingly, the on-time of S1 can be calculated
through the following equation
ln_∙∙
_∙∙∙__
∙ (6)
For this interval, neglecting the impact of winding
resistances, the secondary winding voltage for each
transformer can be expressed as
∙_∙∙ (7)
where nratio stands for the turns ratio for one transformer and it
is equal to the secondary winding turns divided by the primary
winding turns.
Mode 2 [t1’ ≤ t ≤ t2’: Fig. 2(b)]: When S1 is switched off at
time t1’, the stored energy in the transformers cannot be
transferred instantaneously to the capacitive load due to the
influence of Cs. The voltage over Cs needs to build up until it
reaches VoutInitial/N before the current freewheeling period can
start; this assumes that the voltage drop of freewheeling diode
D2 is negligible. The energy used for charging Cs comes from
the energy stored in the transformers. This also means that the
secondary peak current Isec_p cannot be obtained through the
direct reflection from Ipri_p, and can be approximately
estimated by
_ _
∙
∙_ ∙
∙∙_ (8)
where Vcs(t1’) is the voltage over Cs at the time instant t1’. In
this time interval, the circuit is driven by the resonance
between the secondary magnetizing inductance and Cs. The
initial energy comes from the secondary peak current.
1442

Fig 3. Converter critical operating waveforms at low voltage (left side) and at high voltage (right side).
(a) [t0’- t1’] (b) [t1’- t2’]
(c) [t2’- t3’] (d) [t3’- t4’]
Fig. 2. Equivalent circuit schemes of the operation modes in PPSSFC under high output voltage condition.
1443

Assuming negligible the influence of resistance and core
losses, the voltage over Cs can be roughly estimated as in (9).

∙cos∙_∙_
∙
sin∙ (9)
where ωf is the resonant angular frequency of secondary
magnetizing inductance and Cs and can be calculated as

∙_∙ (10)
Mode 3 [t2’ ≤ t ≤ t
3’: Fig. 2(c)]: When Vcs reaches
VoutInitial/N at the time instant t2’, the secondary current
freewheeling starts. If neglecting the impact of resistances in
the secondary side and the voltage drop of D2, the
freewheeling current can be expressed as
_∙cos∙∙
∙
sin∙ (11)
where CL is the capacitance of the capacitive load and ωf is the
resonant angular frequency of secondary magnetizing
inductance and CL, which can be calculate by (12).

∙_∙ (12)
Correspondingly, output voltage for this time interval can
be calculated as in (13).
∙cos∙_∙
∙_
∙sin∙ (13)
This time interval ends when Isec(t) reaches 0, then the
duration time for this period can be calculated through

∙arctan _∙
∙ (14)
Mode 4 [t3’ ≤ t ≤ t
4’: Fig. 2(d)]: After the secondary
freewheeling current reaches 0 at the time t3’, due to the stored
energy in Cs, the drain voltage of S1 is still larger than Vin,
based on the basic principle of boundary mode control, S1
cannot be switched on at this time instant. In fact, similar to
Mode 2, at this time interval the circuit is driven by the
resonance between secondary magnetizing inductance and Cs
however in this case, with the initial energy from Cs.
The voltage over Cs in this period can be calculated
through 
∙cos∙ (15)
where Vout(t3’) is the voltage over Cs at the time t3’.
Neglecting the impact of the body diode in S1, this time
interval ends when Vcs reaches -nratio·Vin, then the duration
time can be calculated as

∙arccos∙∙
 (16)
The presented analysis is simplified, a more detailed
analysis of the time intervals is presented on [14].
C. Low Output Voltage Operation Discussion
At low output voltages, the key operating waveforms are
presented in the left side of Fig. 3.
In Mode 1, the current starts from 0 and not from negative.
This happens because of the small amount of energy stored in
Cs at low output voltage, this is not sufficient to force the
energy be transferred back to the primary creating a negative
peak current.
In the case of low output voltage, the time used to charge
Cs tends to be really short, therefore, the Mode 2 does not need
to be considered and the secondary peak current is the primary
peak current divided by the transformer turns ratio, as
illustrated in (17). _ _
 (17)
Furthermore, in Mode 4, at low output voltage, Vcs cannot
reach -nratio·Vin, the time interval can be estimated by half of
the resonance period of secondary magnetizing inductance and
Cs, shown in (18).  
 (18)
IV. PPSSFC TOPOLOGY DISCUSSION
A. Topology Advantages
Conventional flyback converters for high voltage
capacitive charging applications require an optimized
transformer design or large volume core in order to limit the
secondary winding stray capacitance (). As the converter
output voltage () increases, the energy stored in the
secondary stray capacitance (,.) increases with the
quadratic of the converter output voltage, shown in (19). This
will limit the maximum achievable output voltage for the
converter. ,. 
∙∙ (19)
The proposed topology is derived from a flyback topology
by replacing the flyback transformer with two or more
primary parallel secondary series connected transformers. In
this case the converter output voltage is shared between the
series connection of  secondary windings. This results that
the energy stored in the winding stray capacitance is halved in
case of 2, it is 1/3 in case of 3 and so on, as in
equation
,., ∙
∙∙
 (20)
where ,., stands for the total energy stored in
the winding stray capacitances of  transformers. This
characteristic greatly improves the charging ability of the
converter.
Assuming an ideal flyback converter topology loss-less
and without any parasitic elements, using peak current and
boundary mode control schemes, the energy transferred by the
flyback transformer in every charging cycle is constant, shown
in (21).  
∙_∙_ (21)
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Assuming a complete charging process for output voltage
from 0 V up to Vout, the total energy required to charge the
capacitive load is expressed as
 
∙∙ (22)
Therefore, for a conventional flyback topology, the
number of successive charging cycles, Ncharging cycles, required
to complete the entire charging process can be calculated as
 ∙
_∙_ (23)
In the presented PPSSFC topology, assuming the primary
current is maintained constant for each transformer, then in
each charging cycle, the energy transferred by the flyback
transformers increases by N times, as shown in (24).
 
∙∙_∙_ (24)
This eventually results that the PPSSFC topology requires
N times less cycles for charging the capacitive load under
same conditions, illustrated in (25).
 ∙
∙_∙_ (25)
Moreover, with PPSSFC configuration, the major
advantages are that it is possible to achieve a high voltage
converter within limited space and with a low price by
employing small size off-the-shelf transformers. A large
transformer with optimized for low stray capacitance can also
be used to obtain high output voltage. This can normally be
achieved by separating the windings in different sectors in a
coil former or applying complex winding configurations,
which will result in high transformer manufacturing cost.
Small off-the-shelf transformers are not required to be highly
optimized and therefore, they can be manufactured with very
low cost. Besides, the PPSSFC with small transformers can
provide higher flexibility in the PCB layout compared to the
flyback configuration based on a single large transformer.
This tends to be especially useful when converter power
density optimization is required or large transformer cores are
not available in the desired size.
B. Topology Disadvantages
Compared to one single transformer operated at the same
peak current, like the transferrable energy stored in the
transformer magnetizing inductance increases by N times, the
non-transferrable energy stored in the leakage inductance will
increase by N as well, illustrated in (26) and (27).
 
∙_ ∙_ (26)
 
∙∙_ ∙_ (27)
where Eleak is the energy stored in the leakage inductance for
one transformer, and Eleak represents the total leakage
inductance energy in the PPSSFC configuration. The N times
larger leakage inductance energy will bring much more
pressure for the voltage stress of S1. Fortunately, a variety of
low-voltage power MOSFETs are available on the market.
The impact of this disadvantage can be minimized by
carefully calculating the voltage stress caused by the energy
stored in the leakage inductance and selecting the power
semiconductors with suitable voltage rating.
Assuming identical current sharing between all the
transformers primary stages, the current through S1 can be
expressed as ∙_ (28)
This means the power MOSFET S1 has higher current
stress compared with one transformer case. However, low
voltage MOSFETs are available with very low on-resistances
and for these reasons, this disadvantage has very limited
impact.
The series connection of the transformers on the high
voltage side provides increased loss due to the series
connection of the secondary winding resistances, which will,
to some extent, limit the benefit from reducing stray
capacitance. The increased number of components
(transformers) is another disadvantage of the PPSSFC
configuration.
V. PROTOTYPE IMPLEMENTATION
In order to validate the proposed topology, a small size
prototype with the ability to charge the capacitive load to a
high voltage has been implemented, as shown in Fig. 4 (a) and
(b). An off-the-shelf flyback transformer CJ5143-AL from
Coilcraft is employed in this prototype [15]. The critical
parameters for the converter, capacitive load as well as the
flyback transformer are summarized in Table I. Peak current
as well as boundary mode control schemes are implemented
by the capacitor charger controller LT3750 from Linear
Technology [13]. An optimized design and layout can
furthermore reduce the converter volume.
VI. EXPERIMENTAL RESULTS
The experiments have been carried out to verify the
proposed topology as well as the implementation of the
prototype. The overall charging process for a 220 nF
capacitive load is shown in Fig. 5. The maximum output
voltage (2 kV) is achieved through a 3 V input voltage within
400 ms continuous charging time.
TABLE I.
PARAMETERS OF PPSSFC PROTOTYPE, DEAP ACTUATOR AND
FLYBACK TRANSFORMER
Parameters Values
Vin 3 V
Maximum Vout 2 kV
Transfomer number 6
Converter size 3.5x2.5 cm
CL 220 nF
nratio 15
Lp_m 15 µH
Lp_l 250 nH
Cs 18.5 pF
Rw_p 1 Ω
Rw_s 25 Ω
Ipri_p 1.2 A
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The detailed operating waveforms for three successive
charging cycles at low voltage are shown in Fig. 6 (a) and (b),
including both current and voltage waveforms. From the
primary winding currents in transformer T
1
and T
6
, it can be
seen that good current sharing between transformers is
achieved. Moreover, it also can be observed that the peak
current and the boundary mode control are achieved. At low
output voltage, the resonance current at the beginning of each
switching cycle is caused by the primary leakage inductance
and secondary winding stray capacitance. Due to the impact of
parasitic capacitors in the secondary side, it is difficult to
measure the real voltage waveform over C
s
for one of the
transformers. Instead, the overall transformers secondary
voltage is measured. These voltage waveforms are presented
on Fig. 6 (b), where the three operation modes at low output
voltage can be observed.
In a similar way, the experimental waveforms for three
charging cycles at high voltage operation are shown on Fig. 7.
The realization of current sharing between transformers can be
confirmed through the winding current waveforms in Fig. 7
(a). Moreover, at the beginning of each charging cycle a
negative current spike can be observed. This was mentioned in
the analysis and it is also verified in the current waveforms. At
high output voltage, a resonance is observed at the beginning
of every switching cycle due to the secondary winding leakage
inductance and secondary winding stray capacitance. In the
voltage waveforms on Fig. 7 (b), the charging of the intra
winding capacitance C
s
can be observed.
The experimental results verify that the converter
prototype operates accordingly to the analysis performed in
the previous section.
Fig. 5. Overall experimental waveform for the entire charging process.
(a) Top view (b) Bottom view
Fig. 4. Converter prototype (reference scale in cm).
(a) Current waveforms
(b) Voltage waveforms
Fig. 6. Detailed experimental waveforms for charging cycles at low
output voltage.
V
in
500 mV/div
Charge control signal 1 V/div
V
out
500 V/div
I
pri_T1
500 mA/div
I
s
ec
50 mA/div
S
1
V
g
s
2 V/div
I
p
ri_T6
500 mA/div
S
1
V
g
s
2 V/div
V
out
5 V/div
∑




50 V/div
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VII. C
ONCLUSIONS
The paper presents a primary parallel secondary series
flyback converter (PPSSFC). The new topology is derived
from the conventional flyback converter and uses multiple
transformers to mitigate the effects of the secondary stray
capacitance. The topology is very suitable for applications
which require very large step-up ratios, low end-to-end
capacitance and high output voltage within limited space.
The operating principles and switching cycle based
analysis are presented for both high and low voltage operation.
The advantages and disadvantages for the proposed topology
are discussed in terms of energy stored in the secondary stray
capacitance, transferrable and non-transferrable energy stored
in the flyback transformers as well as the voltage and current
stress for semiconductor components. Compared to a single
large transformer case, the proposed topology can be
beneficial for reducing the transformer winding complexity
and for providing high flexibility in PCB layout.
The proposed PPSSFC topology has been verified on a
converter for a DEAP actuator (capacitive load). The PPSSFC
achieved very high step-up ratio (650x) and high voltage
operation (2 kV) and it is based on six off-the-shelf
transformers. It is observed that the switching cycle based
operating analysis of the proposed converter is exactly
validated by the experimental results.
R
EFERENCES
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[14] L. Huang, Z. Zhang, and M. A. E. Andersen, " Detailed Behavior
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USA.
(a) Current waveforms
(b) Voltage waveforms
Fig. 7. Detailed experimental waveforms for charging cycles at high
output voltage.
I
pri_T1
500 mA/div
S
1
V
g
s
2 V/div
I
p
ri
_
T6
500 mA/div
∑




200 V/div
V
out
200 V/div
S
1
V
gs
2 V/div
I
s
ec
50 mA/div
1447