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Cover Picture: Identification and Structure of Small-Molecule Stabilizers of 14–3–3 Protein–Protein Interactions (Angew. Chem. Int. Ed. 24/2010)

Chemical Genomics Centre of the Max Planck Society, Otto-Hahn-Strasse 15, 44227 Dortmund (Germany), Fax: (+49) 231-133-2499 http://www.cgc.mpg.de.
Angewandte Chemie International Edition (Impact Factor: 11.26). 06/2010; 49(24). DOI: 10.1002/anie.201002255
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    ABSTRACT: First Page of the Article
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    ABSTRACT: Active Matrix Flat Panel Displays (AMFPD), using liquid crystal involve mainly thin film transistors to drive the pixels. The first industrial applications involved amorphous silicon based thin film transistors (a-SiTFT). But due to the need of increased sizes and of video treatment capabilities, the a-SiTFT technology shows presently its limitations mainly due to the low mobility of the amorphous silicon. A promising way which is wordly studied, is the polysilicon TFT's technology for which the active zone is made of polycrystalline silicon. The main goal is to obtain in the same time, low threshold voltage, low subthreshold slope, high mobility of the free carriers, low current in reverse bias, Ioff, and high Ion/1off ratio. These conditions must be obtained in a technology compatible with very large area glass substrates which impose a process temperature lower than or equal to 6000(;. At higher temperatures, the substrate can fuse or can be mechanically affected. A first part is devoted to the presentation of the AM-FPD principle and of the techniques used to drive the pixels. The limitations being given and the need of polysilicon TFT's being presented, a special attention is paid on the improvement of the electrical characteristics of polysilicon TFT's and constitutes the second part. Several approaches are proposed: the first consists in modification of the process flow chart in order to suppress or improve the inteifaces, the second, in an excimer laser crystallization step which is known to enhance the grain size, and the last one, in a hydrogen treatment as final fabrication process step in order to decrease the density of states at the gate oxide/polysilicon interface and at grain boundaries in the channel region. Each of these points are analyzed and discussed.
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