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502 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 28, NO. 3, SEPTEMBER 2013
Asymmetrical Low-Voltage Ride Through of
Brushless Doubly Fed Induction Generators
for the Wind Power Generation
Teng Long, Member, IEEE, Shiyi Shao, Member, IEEE, Ehsan Abdi, Member, IEEE,
Richard A. McMahon, and Shi Liu
Abstract—Compared with the Doubly fed induction generators
(DFIG), the brushless doubly fed induction generator (BDFIG)
has a commercial potential for wind power generation due to its
lower cost and higher reliability. In the most recent grid codes, wind
generators are required to be capable of riding through low voltage
faults. As a result of the negative sequence, induction generators
response differently in asymmetrical voltage dips compared with
the symmetrical dip. This paper gave a full behavior analysis of
the BDFIG under different types of the asymmetrical fault and
proposed a novel control strategy for the BDFIG to ride through
asymmetrical low voltage dips without any extra hardware such
as crowbars. The proposed control strategies are experimentally
verified by a 250-kW BDFIG.
Index Terms—AC generators, doubly fed induction generators
(DFIG), fault ride-through, wind energy.
NOMENCLATURE
PW, CW Power winding and control winding.
V,I,ΨVoltage, current, and flux vectors.
FArbitrary vector.
v, i, ψ Voltage, current, and flux scalars.
P, Q Active and reactive power.
ωAngular frequency of the arbitrary rotating ref-
erence frame.
ω1,ω
2,ω
rAngular frequency of PW, CW, and rotor.
θ1,θ
rAngular position of PW flux frame and rotor.
p1,p
2Pole pair numbers of PW and CW.
R1,R
2,R
rResistances of PW, CW, and rotor.
L1,L
2,L
rSelf-inductance of PW, CW, and rotor.
L1r,L
2rCoupling inductance between stator windings
and rotor.
Manuscript received July 14, 2012; revised October 12, 2012 and January
21, 2013; accepted March 3, 2013. Date of publication June 19, 2013; date of
current version August 16, 2013. T. Long and S. Shao contributed equally to
this work. Paper no. TEC-00299-2012.
T. Long is with the GE Power Conversion, Rugby, Warwickshire CV21 1BU,
U.K. (e-mail: teng.long@ge.com).
R. A. McMahon is with the Department of Engineering, University of Cam-
bridge, Cambridge CB3 0FA, U.K. (e-mail: ram1@cam.ac.uk).
S. Shao is with the CSE Electric Technology Ltd., China Ship Industry
Cooperation, Beijing 100097, China (e-mail: shaoshiyi@gmail.com).
E. Abdi is with the Wind Technologies Ltd., Cambridge CB4 0EY, U.K.
(e-mail: ehsan.abdi@windtechnologies.com).
S. Liu is with the School of Control and Computer Engineering, North China
Electric Power University, Beijing 102206, China (email: liushidr@yahoo.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TEC.2013.2261818
δDifferential operator, i.e., d/dt.
snSlip of the BDFIG, defined in (16).
superscripts
+,−Positive and negative synchronous reference
frames.
subscripts
p, n Forward and backward sequence.
d, q Rotating dq frame axis.
α1,β
1Stationary axis of PW.
α2,β
2Stationary axis of CW.
I. INTRODUCTION
THE brushless doubly fed induction generator (BDFIG) is
attractive for wind power, especially offshore. In common
with the doubly fed induction generator (DFIG), it has the ben-
efit of a low-cost converter but does not have brushgear, promis-
ing low maintenance costs, and high robustness [1]. A recent
study predicts a significant increase in reliability [2]. A 20-kW
BDFIG-based wind turbine has been erected and experience to
date confirms expectations [3].
Wind power has become ever more popular during recent
decades. With its increasing penetration, requirements for grid
connection have been established. Among these, low-voltage
ride-through (LVRT) capability is regarded as one of the most
challenging requirements that is found in contemporary grid
codes [4]. For example, the requirement defined in the Chinese
grid code [5], [6] is shown in Fig. 1. During voltage dips, wind
generators are expected to remain connected, i.e., to ride through
the low-voltage fault.
Generally, two types of grid faults can be defined. One in-
volves symmetrical voltage dips (all three phases short circuited
to the ground) and the other asymmetrical voltage dips. This pa-
per concentrates on the latter case.
The DFIG has become the most widely used generator for
wind turbines, principally because it achieves variable speed
operation with only a fractionally rated converter [7], [8]. How-
ever, the brushes and slip rings present in the DFIG result in a
significant maintenance cost, particularly, for wind turbines in
remote places such as offshore wind farms [2], [9]. The DFIG
is also very sensitive to asymmetrical voltage dips [10]. With-
out extra hardware, the DFIG cannot ride through the most
severe asymmetrical faults even with very complex LVRT con-
trollers [11]. Generally speaking, crowbar protection is required
to limit transient overcurrents [12]–[14]. Other solutions using
0885-8969 © 2013 IEEE
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LONG et al.: ASYMMETRICAL LOW-VOLTAGE RIDE THROUGH OF BRUSHLESS DOUBLY FED INDUCTION GENERATORS 503
Fig. 1. Grid fault pattern, the solid line is from the Chinese grid code, and the
dash line is the voltage fault used in this paper.
hardware protective circuit such as a stator damping resistor
(SDR) controllers [11], or a dynamic voltage restorer [15], [16],
or a series grid-side converter [17] all increase the system cost
and complexity.
To date, no research has been carried out on the asymmetrical
LVRT performance of the BDFIG. This paper aims to fill this
gap. The dynamic behavior of the BDFIG will be analyzed, and
a crowbarless scheme will be proposed, with experimental val-
idation based on a 250-kW prototype BDFIG. The low voltage
fault emulated in this paper, shown in the dash line in Fig. 1,
is more severe than the Chinese gird code with a deeper low
voltage drop and a longer fault time. The experimental result
shows the proposed asymmetric LVRT method is able to meet
this severe grid requirement.
II. BDFIG OPERATION
The stator of the BDFIG has two separate windings with
different pole pair numbers chosen to avoid direct coupling be-
tween the windings. The rotor employs a special design enabling
it to couple to both stator windings. The power winding (PW)
is connected to the grid directly, whereas the control winding
(CW) is connected to the grid through a bidirectional variable
voltage, variable frequency (VVVF) converter handling only a
fraction of the rated power [1].
The BDFIG is normally operated in the synchronous (doubly
fed) mode, in which the shaft angular velocity is determined by
the excitation frequencies of the two stator windings, indepen-
dent of the torque exerted on the machine, and can be expressed
as
ωr=ω1+ω2
p1+p2
(1)
where ω1and ω2are the excitation angular frequencies supplied
to the two stator windings.
When the CW angular frequency ω2equals to zero, the angu-
lar velocity of the shaft is defined as the natural angular velocity
ωn.
III. DYNAMIC VECTOR MODEL OF THE BDFIG
The vector model of the BDFIG, aligned in the PW stationary
reference frame, is expressed as [18]
V1=R1I1+dΨ1
dt (2)
V2=R2I2+dΨ2
dt −j((p1+p2)ωr)Ψ2(3)
Vr=RrIr+dΨr
dt −jp1ωrΨr(4)
Ψ1=L1I1+L1rIr(5)
Ψ2=L2I2+L2rIr(6)
Ψr=LrIr+L1rI1+L2rI2(7)
where R1,R
2,L
1,L
2,L
r,L
1r,L
2rare the PW resistance, CW
resistance, PW self-inductance, CW self-inductance, rotor self-
inductance, mutual inductance between PW and rotor, and mu-
tual inductance between CW and rotor, respectively.
The power winding is connected to the grid. Hence, in the
steady state, all vectors rotate at the power winding synchronous
speed ω1, which is set by the frequency of the grid. For example,
V1can be expressed as
V1=|V1|ejω1t(8)
where |V1|is the magnitude of the power winding voltage.
From (4) to (7), the CW flux linkage in terms of the PW flux
linkage and CW current is
Ψ2=−L1rL2r
L1Lr−L2
1r+L1Rr
δ−jp1ωr
Ψ1
+L1L2Lr−L1L2
2r−L2L2
1r+L1L2Rr
δ−jp1ωr
L1Lr−L2
1r+L1Rr
δ−jp1ωr
I2(9)
where δrepresents the differential operator d
dt .
The term δ−jp1ωris very large compared with other terms
in the aforementioned expression, so its reciprocal can be ne-
glected. By substituting (9) into (3), V2becomes
V2=R2I2
+L1L2Lr−L2
1rL2−L1L2
2r
L1Lr−L2
1r
(δ−j(p1+p2)ωr)I2
L1rL2r
L2
1r−L1Lr
(δ−j(p1+p2)ωr)Ψ1
=EΨ1+Vx2.(10)
From (10), the converter output voltage V2can be split into
two terms: EΨ1that is the induced EMF due to the rate of
change of Ψ1, and VR2+VLlwhich is the voltage drop across
the CW resistance and an equivalent leakage inductance. These
terms are shown in an equivalent circuit in Fig. 2, in which
Vx2 =(R2+Ll(δ−j(p1+p2)ωr))I2(11)
EΨ1=L1rL2r
L2
1r−L1Lr
(δ−j(p1+p2)ωr)Ψ1(12)
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504 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 28, NO. 3, SEPTEMBER 2013
Fig. 2. Equivalent circuit of BDFIG control winding.
Ll=L1L2Lr−L2
1rL2−L1L2
2r
L1Lr−L2
1r
.(13)
For simplicity, the PW resistance is ignored in this section
for analyzing the behavior of the BDFIG under asymmetric
low-voltage faults. However, the resistance is considered when
estimating the PW flux linkage for designing and implementing
the control scheme in the Section VI.
Hence, (2) can be simplified as
V1=dΨ1
dt =jω1Ψ1.(14)
Substituting (8) and (14) into (12) gives
EΨ1=L1rL2r
L2
1r−L1Lr
ω1−(p1+p2)ωr
ω1|V1|ejω1t
=L1rL2r
L2
1r−L1Lr
sn|V1|ejω1t(15)
where snis defined as the slip of the BDFIG:
sn=ωn−ωr
ωn
=ω1−(p1+p2)ωr
ω1
.(16)
The induced EMF EΨ1 can be also expressed in the CW refer-
ence frame, as indicated as superscript (2)
E(2)
Ψ1=L1rL2r
L2
1r−L1Lr
sn|V1|e−j(ω1−(p1+p2)ωr)t.(17)
Similarly, the voltage drop due to the CW current is
V(2)
x2 =(R2+j(ω1−(p1+p2)ωr)Ll)I(2)
2.(18)
Hence, from the viewpoint of the converter (CW stationary
reference frame), the CW voltage in terms of the PW flux and
the voltage drop caused by the CW current becomes
V(2)
2=E(2)
Ψ1 +V(2)
x2.(19)
Equations (17), (18), and (19) show that for normal operation
of the BDFIG, the magnitude of V(2)
2depends on the PW voltage
|V1|and its gain is proportional to the CW frequency which is
determined by the rotor angular velocity ωr.With a −0.3 to 0.3
slip range, a fractionally rated converter is sufficient.
IV. BEHAVIOR UNDER ASYMMETRICAL VOLTAGE DIP
In the following analysis, the CW is taken to be open circuited,
i.e., I2=0. Under asymmetrical conditions, the sequence com-
ponent theory can be used [19], [20]. Considering an asymmet-
rical voltage drop at t=t0, the PW voltage can be expressed
as
V1=|V1|ejω1t(t<t
0)
|V1p|ejω1t+|V1n |e−jω1t(t≥t0).(20)
The forward and backward sequences, subscripted by pand
n, respectively, are decomposed as
|V1p|
|V1n|=1
3·1ej2π
3ej4π
3
1ej4π
3ej2π
3·⎡
⎢
⎣
V1u
V1v
V1w
⎤
⎥
⎦(21)
where V1u=Vsin(ω1t)and V1v=Vsin(ω1t+2
3π),V
1w=
Vsin(ω1t+4
3π).
The forward sequence component generates a flux rotating at
the synchronous speed and the backward sequence component
produces a flux rotating at the synchronous speed but in a reverse
direction. In the steady state, these two fluxes can be expressed
as
Ψ1p =|V1p|
jω1
ejω1t(22)
Ψ1n =|V1n|
−jω1
e−jω1t.(23)
The forward and backward sequences of the PW flux linkage
in the steady state vary with the type of the faults. Three types
of asymmetrical low voltage faults are discussed in this paper:
phase to phase short circuit (p-p), one phase to the ground short
circuit (p-n), and phase to phase to the ground short circuit
(p-p-n). When the PW of the machine is Δconnected, the PW
voltage and flux linkages are given as
phase to phase short circuit (p-p):
⎡
⎢
⎣
V1u
V1v
V1w
⎤
⎥
⎦=
⎡
⎢
⎢
⎢
⎢
⎢
⎢
⎣
0
√3
2Vsin ω1t+3
2π
√3
2Vsin ω1t+1
2π
⎤
⎥
⎥
⎥
⎥
⎥
⎥
⎦
(24)
Ψ1p
Ψ1n =1
jω1·⎡
⎢
⎣
1
2Ve
jω1t
1
2Ve
−jω1t⎤
⎥
⎦(25)
phase to ground short circuit (p-n):
⎡
⎢
⎣
V1u
V1v
V1w
⎤
⎥
⎦=
⎡
⎢
⎢
⎢
⎢
⎢
⎢
⎢
⎣
√3
3Vsin(ω1t+π
6
Vsin(ω1t+4
3π)
√3
3Vsin(ω1t+π
2)
⎤
⎥
⎥
⎥
⎥
⎥
⎥
⎥
⎦
(26)
Ψ1p
Ψ1n =1
jω1·⎡
⎢
⎣
2
3Ve
jω1t
1
3Ve
−j(ω1t−4
3π)⎤
⎥
⎦(27)
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LONG et al.: ASYMMETRICAL LOW-VOLTAGE RIDE THROUGH OF BRUSHLESS DOUBLY FED INDUCTION GENERATORS 505
phase to phase to ground short circuit (p-p-n):
⎡
⎢
⎣
V1u
V1v
V1w
⎤
⎥
⎦=⎡
⎢
⎢
⎢
⎢
⎢
⎣
0
√3
3Vsin(ω1t+3
2π)
√3
3Vsin(ω1t+1
2π)
⎤
⎥
⎥
⎥
⎥
⎥
⎦
(28)
Ψ1p
Ψ1n =1
jω1·⎡
⎢
⎣
1
3Ve
jω1t
1
3Ve
−jω1t⎤
⎥
⎦.(29)
During the transient, the PW flux linkage must be continuous
from one state to the other state and a transient zero sequence
component is produced to link these two states at t=t0although
the PW voltage has a step change when the fault happens [21],
[22]. This transient flux linkage is the zero sequence flux linkage
Ψ1z
Ψ1p +Ψ1n +Ψ1z =Ψ1.(30)
Substituting (22) and (23) into (30), in the PW stationary
reference frame, the zero sequence flux linkage is expressed as
Ψ1z =
(|V1|−|V1p |)ejω1t0−|V1n |e−jω1t0
jω1e−(t−t0)
τ1.
(31)
Since the CW current is assumed to be zero, the CW voltage
is the induced EMF. From the view of the CW stationary refer-
ence frame, combining (12), (19), (30), and (31), the voltage is
expressed as
V(2)
2=E(2)
Ψ1p +E(2)
Ψ1n +E(2)
Ψ1z (32)
where
E(2)
Ψ1p =L1rL2r
L2
1r−L1Lr
sn|V1p|ejsnω1t(33)
E(2)
Ψ1n =L1rL2r
L2
1r−L1Lr
(2 −sn)|V1n|e−j(2−sn)ω1t(34)
E(2)
Ψ1z =L1rL2r
L2
1r−L1Lr
(1 −sn)ω1|Ψ1z|e−j(1−sn)ω1te−(t−t0)
τ1.
(35)
From the converter side, the open-circuited voltages contains
all three sequence components during an asymmetrical fault, for
t≥t0.
Steady-state forward sequence of E(2)
Ψ1p :This sequence of
E(2)
Ψ1p rotates with an angular velocity of ω1−(p1+p2)ωr,
with a scaling factor of |sn|. It is aligned with the prefault EMF
but has a smaller magnitude because the forward sequence of
the grid fault voltage, |V1p|, is smaller than the prefault rated
voltage |V1|. The BDFIG for a wind turbine is usually designed
with a ±30% speed range, so the slip is from −0.3 to 0.3 and
the maximum scaling factor for normal operation is 0.3.
Steady-state backward sequence of E(2)
Ψ1n :This sequence of
E(2)
Ψ1n rotates with an angular velocity of −ω1−(p1+p2)ωr
with a scaling factor of |2−sn|. It should be noted that its
scaling factor can be much larger that of the forward sequence
and its maximum value is 2.3 when the machine is running at
the highest speed, i.e., 130% of the natural speed. The backward
sequence component of the grid fault voltage |V1n|is smaller
than the prefault rated voltage.
Transient zero sequence of E(2)
Ψ1z :This sequence of E(2)
Ψ1z
rotates with an angular velocity of −(p1+p2)ωrwith a scaling
factor of |1−sn|which is also much larger than that of the
forward one with a maximum value of 1.3. According to (31), the
magnitude of the zero sequence of the CW voltage is determined
by the time when the grid fault happens and decays with a time
constant τ1which can be expressed as L1Lr−L2
1r
R1Lr.
V. CONTROL WINDING OVERCURRENT ANALYSIS WHEN THE
MACHINE-SIDE CONVERTER ISCONNECTED
The aforementioned analysis assumes the CW current is zero.
In normal operation, however, the CW of the BDFIG is fed with
a voltage source converter. During an asymmetrical fault, the
converter ideally should balance all three sequence components
of the induced EMF in the CW to control the current. From
the last section, it is shown that the backward and the zero se-
quence component of the induced EMF, EΨ1n and EΨ1n,are
much greater than the converter voltage rating due tothe scaling
factors. Thus, the converter is not able to supply enough volt-
age to balance the backward and zero sequence components of
the induced EMF. Uncontrollable overcurrents occur simulta-
neously and become an issue for LVRT [23]. In this section, the
steady-state analysis of the backward sequence current and the
transient analysis of the zero sequence current are given.
A. Backward Sequence Component of the CW Current
in the Steady State
Assuming the converter does not supply the backward se-
quence voltage, V2n =0, from (19), the backward sequence
EMF appears across the equivalent impedance, i.e., EΨ1n =
−Vx2n. When the generator is initially running at 650 r/min, in
an asymmetrical fault, from (34), the scaling factor of the back-
ward sequence EMF becomes 2.3 which is 7.7 times greater
than the prefault value. The converter is not able to compensate
this voltage [10], [24].
Nevertheless, in the steady state, the backward sequence EMF
will not introduce any overcurrent to the converter. Combining
(18), (19), and (34), ignoring the CW resistance, R2, the back-
ward sequence of the CW current is expressed as
I(2)
2n =L1rL2r
L2
1r−L1Lr(2 −sn)|V1n|
(2 −sn)ω1Ll
e−j((2−sn)ω1t+1
2π).
(36)
The equivalent impedance, shown in Fig. 2, is also increased
with the same scaling factor of the induced EMF shown as the
appearance of the (2 −sn)at the denominator in (36). Thus the
enlargement of the EMF from the scaling factor is cancelled by
the impedance.
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506 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 28, NO. 3, SEPTEMBER 2013
TAB L E I
FORWARD,BACKWARD,AND ZERO SEQUECNES OF THE PW FLUX LINKAGE
(p.u) SUMMARY
For comparison, in normal operation, the forward sequence
of the CW is also given as
I(2)
2p =|V2|
ω1Ll−L1rL2r
L2
1r−L1Lrsn|V1p|
snω1Llej(snω1t−1
2π).
(37)
From (36), it is seen that the CW backward current will not be
increased because the increased scaling factor appear at both the
EMF and the impedance. Associating (23) and (36), the back-
ward current is only proportional to the PW backward flux link-
age, i.e., the backward grid voltage as |Ψ1n|=|V1n|
ω1. Accord-
ing to (24), (26), and (28), the steady-state negative sequence
PW flux linkages in all three different asymmetrical faults are
less than half of the rated, thus the backward sequence current is
predicted to have a smaller magnitude to the forward sequence
current although the backward sequence current shows larger
frequencies than the forward one as shown in (36) and (37) .
Thus, the backward sequence current in the CW is not a major
issue for the BDFIG during asymmetric low-voltage faults.
B. Zero Sequence Component of the CW Current
During the Transient
The flux linkage must be continuous between periods of the
prefault and the asymmetrical faults, and the zero sequence flux
is the transient component linking those two steady states.
From (24) to (28), in the steady state for p-p and p-p-n faults,
the backward sequence components have the same magnitude
as the forward sequence components so the the resultant flux
linkages during the faults are pulses. In the steady-state p-n fault,
the backward sequence component is smaller than the forward
one and the resultant flux trajectory is an ellipse. The flux linkage
magnitude of the zero sequence depends on the timing of an
asymmetrical fault and the type of the fault. According to (24)–
(31), the zero sequence of the flux linkage in different faults is
summarized in Table. I. The experimental result, illustrated in
Fig. 3, has shown the PW flux linkage trajectory from prefault
to the asymmetrical fault in three types of faults. All faults
occurred at the the point where the largest zero sequence of PW
fluxes were generated.
From (35), the zero sequence of the PW flux linkage results
a large EMF on the CW, which decays exponentially, and the
converter is not able to compensate the zero sequence EMF [25],
[26]. Similar to the analysis of the negative sequence current,
the zero sequence of the CW current is given by combining (18),
(19), and (35):
I(2)
2=−1
Llt
t0
Λ|Ψ1z|e−j(1−sn)ω1νe−(ν−t0)
τ1dν(38)
where Λ= L1rL2r
L2
1r−L1Lr(1 −sn)ω1.
As shown in (38), the magnitude of the current depends on
the equivalent inductance Llwhich is mainly the leakage in-
ductance of the rotor. For the conventional DFIG, the equivalent
inductance can be also derived and it is mainly contributed by the
leakage inductance of the stator and the rotor of the DFIG [25],
[27]. However, the BDFIG, compared to the conventional DFIG,
has a much larger rotor leakage inductance, arising from rotor
harmonic inductance inherent in the special rotor design [28].
Hence, the equivalent inductance is much lager than that found
in the DFIG. Because of this larger equivalent inductance Ll,
the current from the zero sequence component can be reduced
to an acceptable value for the converter and the extra overcur-
rent protection equipment such as crowbars are not needed [29],
[30].
VI. CONTROL SCHEME DEVELOPMENT
A. Basic Control Loops in Normal Conditions
As has been discussed previously, only the forward sequence
component needs to be considered. Therefore,
Ψ+
1=ψ+
1dp +jψ+
1qp =ψ+
1dp.(39)
The PW real and reactive powers can be expressed as
P1=3
2[v+
1dpi+
1dp +v+
1qpi+
1qp]≈3
2v+
1qpi+
1qp (40)
Q1=3
2[−v+
1dpi+
1qp +v+
1qpi+
1dp]≈3
2v+
1qpi+
1dp.(41)
Therefore, the real and reactive powers of the power winding
can be regulated by i+
1qp and i+
1dp, respectively. However, the
power winding current cannot be controlled directly as the grid
voltage is fixed. From [31] and [32], mathematical analysis
shows that i+
1qp and i+
1dp can be controlled by i+
2qp and i+
2dp with
a linear gain K1pand perturbation terms D1dp and D1qp arising
from cross coupling from the BDFIG:
i+
1dp =K1pi+
2dp +D1dp (42)
i+
1qp =K1pi+
2qp +D1qp.(43)
Mathematical expressions for K1p,D1dp, and D1qp can be found
in [31].
Similarly, the relationship between I+
2and V+
2in the two-axis
(dq) form can be written as
i+
2dp =K2pv+
2dp +D2dp (44)
i+
2qp =K2pv+
2qp +D2qp.(45)
Expressions for K2p,D2dp, and D2qp can also be found in [31].
Considering (42), (43), (44), and (45), a cascaded control
loop can be designed. The outer loop is called the power loop,
in which i+∗
2dp and i+∗
2qp are generated by two PI controllers from
active and reactive power errors. The inner loop generates v+∗
2dp
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LONG et al.: ASYMMETRICAL LOW-VOLTAGE RIDE THROUGH OF BRUSHLESS DOUBLY FED INDUCTION GENERATORS 507
(a) (b) (c)
Fig. 3. PW flux-linkage trajectory experimental results in different faults. The prefault condition is full load, 625 r/min and unity power factor. (a) PW flux-linkage
trajectory for p-p fault. (b) PW flux-linkage trajectory for p-n fault. (c) PW flux-linkage trajectory for p-p-n fault.
and v+∗
2qp, and is called the current loop. Note that, compared to
the outer loop, the current control loop generally requires much
faster dynamics.
B. Control System During Asymmetrical Dips
During asymmetrical dips, (40) and (41) will not be valid due
to the appearance of backward and zero sequence components.
In contrast to the controller proposed by [11], this paper proposes
a simple and robust control strategy which is to control I+
2p to
zero in the positive frame. In other words, V+
2p is supplied to
balance E+
Ψ1p .
The effect of the backward sequence CW current I2n−is not
considered. The backward sequence of PW flux linkages, which
are proportional to backward sequence CW currents, are less
than or equal to half of the prefault rated value (see Table. I);
thus, the backward current is not the major issue of protecting
the converter from the catastrophic overcurrent.
Due to the large equivalent inductance Llthe CW zero se-
quence current can be reduced to an acceptable value. As the
zero sequence current of asymmetrical low faults is smaller than
that found in the symmetrical low voltage fault [29], [30], so
the asymmetrical LVRT without a crowbar is considered to be
viable.
Therefore, the control chain for asymmetrical LVRTs is pre-
sented as
0⇒i+
2dp ⇒v+
2dp
0⇒i+
2qp ⇒v+
2qp
0⇒v−
2dn
0⇒v−
2qn
and the derivative equivalent model with the control strategy
for asymmetrical LVRTs is illustrated in Fig. 4. The complete
control scheme is shown in Fig. 6. The PW voltages and currents
are used to estimate the angle of the forward sequence of the
PW flux linkage through the phase locked loop (PLL) that will
be discussed later.
Fig. 4. Derivative equivalent circuit model for asymmetrical LVRT.
In normal grid conditions, both the power loop and current
loop will operate. During an asymmetrical fault, however, the
power loop will be switched out and the forward sequence of
the CW current reference is set to be zero. Only the backward
sequence component will appear in the converter current with
the decay of the zero sequence component.
C. Flux Estimation and Phase Locked Loop (PLL)
The purpose of the PLL is to synchronize the forward se-
quence to the positive PW reference frame. For the PW flux
linkage, this can be expressed as
Ψ+
1dq =(V+
1dq −R1I+
1dq)dt
=[ψ+
dp +ψ−
dn cos(2ω1t)+ψ−
qn sin(2ω1t)]
+j[ψ+
qp −ψ−
dn sin(2ω1t)+ψ−
qn cos(2ω1t)].(46)
The flux linkage estimated by (46) contains a dc component
from the forward sequence and a 100 Hz component from the
backward sequence. Without loss of generality, there may be
a transient 50 Hz component from the zero sequence in the
positive reference frame [10].
A PLL containing two band-stop filters is used, shown in
Fig. 5, to trap components at 50 Hz for the zero sequence and
100 Hz for the backward sequence [33], so that only Ψ+
p=
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508 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 28, NO. 3, SEPTEMBER 2013
Fig. 5. PLL block diagram.
Fig. 6. Schematic of the control system.
ψ+
dp +jψ+
qp remains in (46). The forward sequence is locked to
the positive reference frame when ψ+
qp =0, implemented by a
PI controller.
D. Fault Detector
A fault detector is designed to sense an asymmetrical fault.
The index used is the magnitude of the backward sequence
component of the PW voltage
|V−
1n|=(v−
1nd)2+(v−
1nq)2.(47)
Ideally, |V−
1n|should be zero if there is no unbalance. It is im-
portant to distinguish between the asymmetric low voltage fault
and the steady-state small voltage unbalance which is common
for wind generators connecting to a weak power system. In the
latter case, the wind generator is required to operate normally. A
special control scheme for operating the BDFIG under a steady-
state small voltage unbalance was investigated in [34]. In this
paper, the low voltage detector is designed to avoid switching
the control loop into the asymmetric LVRT mode when a small
steady-state voltage unbalance is present, as occurs in normal
grid operation. The thresholds for the low voltage fault and its
clearance is hysteresis-comparator based. When |V−
1n|exceeds
20% of the nominal grid voltage, the control loop is switched
to the asymmetric LVRT mode and the control loop will be
TAB L E I I
PROTOTYPE MACHINE SPECIFICATIONS
switched back to the normal operation mode when |V−
1n|is less
than 10% of the nominal grid voltage.
VII. EXPERIMENTAL RESULTS
A. Experimental Setup
An experimental setup was used to evaluate the performance
of the proposed control scheme using a 250-kW BDFIG, be-
lieved to be the largest built to date, the specifications of which
are given in Table II.
This paper focuses on the control algorithm of the machine-
side converter, assuming that the grid- side converter stabilizes
the dc-link voltage well enough during asymmetric grid fault
condition [35]. A commercial inverter supplied from control
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LONG et al.: ASYMMETRICAL LOW-VOLTAGE RIDE THROUGH OF BRUSHLESS DOUBLY FED INDUCTION GENERATORS 509
(a) (b)
Fig. 7. Schematic and photo of the LVRT test rig. (a) Schematic of the LVRT test rig.(b) Photo of the test rig.
(a) (b) (c)
Fig. 8. Experimental results of asymmetrical LVRT in different faults. The pre-fault condition is full load, 625 r/min and unity power factor. (a) Phase to phase
LVRT. (b) One phase to ground LVRT. (c) Phase-phase to ground LVRT.
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510 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 28, NO. 3, SEPTEMBER 2013
techniques (Unidrive SP6601) embedded with a dc-link damper
is able to stabilize the dc-link voltage for the experiment reported
in this paper. The coordinated control scheme combining both
the grid- and machine- side converters is beyond the scope of
this paper and will be investigated in the future.
In the test, the grid-side converter was always connected to
the grid bypassing the grid fault hardware.
The prototype BDFIG was coupled to an induction machine
equipped with a commercial ac drive (ABB ACS800). The drive
was set to operate at constant speed and the BDFIG was in a
power control mode. An incremental encoder with 10 000 pulses
per revolution was used to measure the shaft rotational speed.
The voltages and currents of each stator phase were measured
by LEM LV 25-p and LEM LTA 100-p transducers, respectively.
The line currents of the power winding were also obtained.
The control algorithm was implemented in MATLAB
Simulink in an xPC Target computer which receives all the
measurements and generates PWM signals for the machine-side
converter. The sampling time of the control loop was 0.5 ms.
The test rig schematic and photograph are shown in Fig. 7.
B. Experimental Results
As has been mentioned, the main concern during LVRT is
the converter current. It is widely accepted that the IGBTs in
aconvertercanwithstanda2p.u.peak current for 1 ms, and
therefore 2 p.u. current has become a benchmark [11].
The first experiment was a p-p circuit test, as shown in
Fig. 8(a), causing one phase of the PW voltage to become
zero. Before the fault, t≤1s the BDFIG was delivering full
power and unity power factor, and the converter was at the rated
current.
At t=1s, the fault happens, EΨ1p,EΨ1n, and EΨ1z all
exist, causing I2p,I2n , and I2z. The peak point of the CW
current was about 1.9 p.u. of the IGBTs’ rated current. As has
been discussed, I2z depends on the time when fault happens.
This test results show the worst case but the current is still below
2 p.u. of the converter rating. Hence, no extra hardware is needed
to protect the converter from this transient overcurrent.
After 400 ms, the zero sequence current in the CW has de-
cayed to a very small value and only the CW backward sequence
current I2z with a higher frequency remains. As has been dis-
cussed, the steady-state backward sequence current is not larger
than the rated current due to the scaling factor cancelation.
After the clearance of the fault, t≥3s, normal control of I2p
resumes.
Similar experiments were done for a p-n fault as shown in
Fig. 8(b) and a p-p-n fault as shown in Fig. 8(c). In both cases,
the converter currents did not go outside the current rating of
the converter ensuring the safe operation. The CW backward
sequence current is only proportional to the PW backward se-
quence flux linkage according to (36) and (23). The PW back-
ward flux linkage varies with the type of the fault. From Table I,
it is shown that PW backward flux linkages in the cases of p-p, p-
n, and p-p-n faults, are 1/2, 1/3, and 1/3 of the rated PW forward
flux linkage, respectively. Therefore, the backward sequence
CW currents in p-p, p-n, and p-p-n faults are approximately
1/2, 1/3, and 1/3 of the rated forward CW current (the prefault
current). Because the zero sequence CW current decays expo-
nentially with a small time constant, the fault current is mainly
from the backward sequence CW current except the beginning
of the fault so the fault current during the most of the period
of an asymmetrical low voltage fault is smaller than the normal
prefault current. This behavior is verified by the experimental
results shown in Fig. 8.
VIII. CONCLUSION
This paper has thoroughly analyzed the behavior of the BD-
FIG under asymmetrical low voltage faults in cases of the phase
to phase, phase to ground, and phase to phase to ground short
circuits. Analysis shows that the major issue for an asymmet-
rical low voltage fault is from the zero sequence of the CW
current but not the backward sequence current. The severity of
these three types of asymmetrical faults has been compared.
This paper has also introduced a practical control scheme for
the BDFIG to ride through asymmetrical LVRT. Experimental
results have shown that the BDFIG with the proposed controller
has potential to ride through asymmetrical low voltage faults
without extra hardware such as crowbars. The BDFIG-based
wind turbine with the proposed control scheme is able to show
high stability and a low cost of grid integration.
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Teng Long (S’10–M’13) received the B.Eng degree
from Huazhong University of Science and Technol-
ogy, Wuhan, China, and the B.Eng (first class Hons.)
degree from the University of Birmingham, Birming-
ham, U.K, in 2009. He was an exchange student in
Hong Kong Polytechnic University, Hong Kong, in
2008. He received the Ph.D degree in electrical en-
gineering from the University of Cambridge, Cam-
bridge, U.K, in 2013.
He is currently with the GE Power Conversion,
U.K., as a Power Electronics Engineer in the Global
Technology and Engineering team. His research interests include power elec-
tronics, electric machines, drive and control, energy efficiency, and renewable
energy.
Shiyi Shao (M’10) received the B.Eng. and M.Phil
degrees from Shanghai Jiao Tong University, Shang-
hai, China, in 2003 and 2006, respectively, and the
M.Phil and Ph.D. degrees in electrical engineering
from the University of Cambridge, Cambridge, U.K,
in 2008 and 2010 respectively.
He was the Chief Engineer of the Wind Tech-
nologies, Cambridge, U.K. He is currently with CSE
Electric Technology Ltd., China Ship Industry Co-
operation, Beijing, China, as a Chief Engineer. His
research interests include power electronics, electric
machine, electric system design, drive and control, energy efficiency, and re-
newable energy.
Ehsan Abdi (M’13) received the B.Sc. degree in elec-
trical engineering from the Sharif University of Tech-
nology, Tehran, Iran, in 2002, and the M.Phil. and
Ph.D. degrees in electrical engineering from Cam-
bridge University, Cambridge, U.K., in 2003 and
2006, respectively.
He is currently with Wind Technologies, Cam-
bridge, aiming at exploiting the Brushless Doubly
Fed Machine for commercial applications. He is also
an Embedded Researcher at Electrical Engineering
Division, Cambridge University, and his main re-
search interests include electrical machines and drives, wind power generation,
and electrical measurements and instrumentation.
Richard A. McMahon received the B.A. degree in
electrical sciences and the Ph.D. degree from the Uni-
versity of Cambridge, Cambridge, U.K., in 1976 and
1980, respectively.
He has been with the Department of Engineering,
University of Cambridge, where he was a University
Lecturer in electrical engineering in 1989, follow-
ing his Postdoctoral work on semiconductor device
processing, and became a Senior Lecturer in 2000.
His research interests include electrical drives, power
electronics, and semiconductor materials.
Shi Liu received the B.Eng and M.Sc degrees from
Chongqing University, Chongqing, China, and the
Ph.D degree from the University of Cambridge, Cam-
bridge, U.K.
He was the Research Professor with the Chi-
nese Academy of Sciences in 1998, and has been
with North China Electric Power University, Beijing,
China, since 2007. His research interests include sys-
tem integration of renewable energy and forecast of
renewable energy power generation.
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