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Parallel Symbol-Flipping Decoding for Non-Binary LDPC Codes
Abstract
A new low-complexity parallel symbol-flipping decoding algorithm for non-binary low-density parity-check (NB-LDPC) codes is proposed. The algorithm outperforms quite a number of existing reliability-based message-passing algorithms, and its computation complexity is smaller than that of almost all the previously proposed iterative decoding algorithms for NB-LDPC codes. It is suitable for decoding NB-LDPC codes whose parity-check matrices have large column weights.
... Another algorithm termed as weighted algorithm B (wt.Algo B ) presented in [12] introduces the binary Hamming distance and plurality logic performance improvement. The parallel symbol flipping decoding (PSFD) algorithm in [13], has good performance only for parity check matrix of large column weight. A multiple voting based PSFD (MV-PSFD) algorithm was proposed in [14] for the improvement of PSFD algorithm. ...
... As research in the literature is focused mostly on low column or ultra-low column weight LDPC codes, therefore, we have also chosen to use low/ultra-low column weight. In the literature, those symbol flipping NB-LDPC decoders, showing better BER performances for low column weight, are considered as good decoding algorithms LDPC codes using high column weight increase the decoding computational complexity and contribute towards error floor [7,13,25]. Therefore, ultra sparse LDPC codes are used to achieve low decoding latency and to overcome error as shown in [8,9,14,28]. Other advantages of ultra-sparse LDPC codes like high girth and better BER performance are given in the references [19,29,34] In this paper, symbol flipping decoding algorithms are proposed for the QAM based NB-LDPC codes. ...
... In this proposed algorithm, only those variable nodes contributing to the failed checks are considered for flipping in order to maintain low complexity and fast convergence. The voting scheme adopted in parallel symbol flipping [13], [14] is used for selection of symbol positions to be flipped at the k th iteration. In Figure 3, the short listing of least reliable symbols is completed first and the p number of variable nodes are sent to the next module for computing the flipping function. ...
This paper addresses the problem of decoding non-binary low density parity check codes(LDPC) over finite field GF(q) using symbol flipping approach. To achieve low complexity reliable communication, three new algorithms for improving the bit error rate performance of the non-binary LDPC decoder are presented. The first type is the symbol flipping decoding algorithm using a flipping function based on the channel reliability to identify the least reliable symbol position. In this algorithm, if the predicted symbol value satisfies the check sum, then the value is declared as correct otherwise the value is adjusted and sent back to the QAM detector. Algorithms 2 in this paper is an improvement to iterative joint detection-decoding algorithm by using the method of iterative hard decision based majority logic to select the new candidate symbol value. The feedback value to the QAM detector is adjusted by using Euclidean distance between the current symbol and the newly selected symbol value. Algorithm 3 is a low complexity version of Algorithm 2 which is derived by applying a majority voting scheme. In the majority voting scheme, symbols are short listed first by voting and all the computation are carried out only for the short listed least reliable symbols which significantly lowers the processing complexity. Numerical results and complexity analysis show that the proposed methods have good bit error rate versus complexity trade-off for various applications when compared with some existing algorithms.
... The weighted algorithm B (wt.Algo B ) in [5] introduced the binary Hamming distance and plurality logic to improve performance. The parallel symbol flipping decoding (PSFD) algorithm in [6] used majority voting to get a better flipping decision but this algorithm performed only for the parity check matrix of large column weight. The PSFD algorithm is improved further by using multiple votes [7] and showed better performance even for the NB LDPC parity check matrix with small column weight. ...
... In the second proposed algorithm, the least reliable variable nodes are shortlisted using a majority voting scheme [6] and the flipping function is computed only for those selected positions which reduces the computational burden of hardware. To predict the candidate symbol values, the flipping function is computed for the selected symbol positions in the same manner as in the D-SFDP algorithm. ...
... In this section, a votingbased symbol flipping decoding algorithm is proposed which flips a single symbol per iteration. In the voting scheme of [6] and [7], each unsatisfied check node gives one vote to the relevant variable node. The j th variable node then collects all the votes, say V (k) j , from the failed check nodes at k th iteration. ...
In this paper, we present two low complexity algorithms to decode non-binary LDPC codes. The proposed decoding algorithms update iteratively the hard decision received vector to search for a valid codeword in the vector space of Galois field (GF). The selection criterion for the position of unreliable symbols is based on failed checks and the information from the Galois field structure. In the first proposed algorithm, the flipping function is calculated for all symbols of the received sequence and multiple symbols are flipped in each iteration while in the second proposed algorithm, a single symbol is flipped per iteration. In the second method, unreliable positions are short-listed by using a majority voting scheme, and then the flipping function is computed to predict candidate symbols from the set of symbols in GF (q) while not violating the field order q. The proposed methods reduce the decoding complexity and memory use. The results of the algorithms show appealing tradeoffs between complexity and bit error rate performance for non-binary LDPC codes.
... Further, the complexity of the computations of all these algorithms is still too high for hardware implementation. On the other hand, reliability based message passing algorithms [11]- [14] and the symbol flipping algorithms [15], [16] are simple and computationally very fast for NB LDPC codes but at a cost of reduced performance. Reliability based majority logic decoding algorithms offer low complexity as they send only the most reliable field message and in this respect are similar to message passing decoding algorithms. ...
... The weighted algorithm B (wt.Algo B ) in [15] introduces the binary Hamming distance and plurality logic to improve performance. The parallel symbol flipping decoding (PSFD) algorithm [16] uses majority voting to get better flipping decision but this algorithm performs better only if the parity check matrix has a large column weight. The PSFD algorithm is improved further by using multiple votes in [23] and performs better even for the LDPC parity check matrix with small column weight. ...
... The objective of this paper is to propose algorithms with good performance and low complexity to fulfill the requirement of low power and efficient memory usage. The proposed algorithms can be divided into three categories; 1) algorithms using voting and prediction [16], [23] [25]; 2) algorithms using voting with channel bit reliability [16], [23] [27] and 3) multiple symbol flipping decoding algorithms based on prediction as well as bit reliability [25], [27]. ...
The main challenge for hardware implementation of non-binary LDPC decoding is the high computational complexity and large memory requirement. To address this challenge, five new low complexity LDPC decoding algorithms are proposed in this paper. The proposed algorithms are developed specifically towards the low complexity, yet effective, decoding of the NB LDPC codes. The proposed decoding algorithms update, iteratively, the hard decision received vector to search for the valid codeword in the vector space of Galois field (GF). The selection criterion for least reliable symbol positions is based on the information from the failed checks and the reliability information from the Galois field structure as well as from the received channel soft information. To choose the correct value for the candidate symbol, two methods are used. The first method is based on the prediction of the error symbol from the set of Galois field symbols which maximize an objective function. In the second method, individual bits are flipped based on the reliability information obtained from the channel. Algorithms 1 and 2 flip a single symbol per iteration whilst the other three algorithms 3,4 and 5 flip multiple symbols in each iteration. The proposed voting based Algorithms 1,2 and 5 first short list the unreliable positions using a majority voting scheme and then choose the candidate symbol value from the set of the symbols in GF(q) while not violating the field order q. These methods simplify the decoding complexity in terms of computation and memory. Results and analysis of these algorithms show an appealing tradeoff between computational complexity and bit error rate performance for NB LDPC codes.
... To the best of our knowledge, none of the existing research attempts to improve the second step which also has a significant impact on the performance of the overall decoding algorithm. On the other hand, [7][8][9] present three approaches in which the flipped symbol position selection and flipped symbol value selection steps are carried out together. However, we believe that there is a significant impact of the symbol value selection step on the performance of the overall decoding algorithm; thus, the performance of the overall symbol flipping algorithm can be improved by improving the flipped symbol value selection. ...
... Incorporation of this additional information in the flipped symbol value selection can be expected to produce an improved overall decoding performance. In the approach of [7][8][9], a search for a valid codeword is carried out in the extended symbol combination set formed by considering all possible symbols that a position can have. Although this second approach improves the decoding performance of the overall non-binary LDPC decoding algorithm, a dedicated flipped symbol value selection can be expected to further enhance the overall performance. ...
... Also compared to the algorithm of [8], the proposed algorithm has significantly less complexity for = 2 and η = w r 2 = 3. The complexity of the algorithms of [7] and [9] are in the same order as the proposed algorithm, but are nearly 20 and 30% higher than the complexity of the proposed algorithm, respectively. For the 63 × 37 LDPC code, with w c = w r = 8, Table 3 shows that the symbol position selection step requires approximately 753 real operations per iteration on average. ...
Symbol flipping-based hard decision decoding for non-binary low-density parity check (LDPC) codes has attracted much attention due to low decoding complexity even though the error performance of the symbol flipping decoder is inferior to that of the soft decision decoders. Standard symbol flipping decoding involves two steps, selection of the symbol position to be flipped and selection of the flipped symbol value. In this paper, an improved symbol value selection algorithm is developed for symbol flipping-based non-binary LDPC decoding. The key idea of the proposed algorithm is to use the complete information on correlation among the code symbols, in addition to their initial reliabilities when value of the flipped symbol is decided. The proposed algorithm offers improved error performance over the existing approaches of flipped symbol value selection which are solely based on the initial symbol reliabilities, with only a non-significant increase in complexity. At the same time, the proposed algorithm is low in complexity compared to other symbol flipping-based LDPC decoding algorithms which use the information on correlation among the code symbols in selecting the flipped symbol value.
... To the best of our knowledge, the use of QC-LDPC codes in cryptography has been studied till now only for the binary case; on the other hand, there is an extensive literature about decoding algorithms for non-binary LDPC codes (see for instance [15]- [18]). In this paper we investigate the use of such codes in the McEliece cryptosystem, and propose to encrypt through error vectors that are non-binary as well. ...
... Different from the message-passing decoding algorithms, the majority-logic decoding based algorithm (MLGD) [8] and symbol flipping decoding (SFD) algorithms [9], [10] present much lower decoding complexity. The MLGD algorithm only considers the most reliable field element for each symbol at the decoding processing. ...
Compared with the non-prediction algorithm, the prediction-based symbol flipping decoding algorithm of non-binary low-density parity-check (NB-LDPC) codes over GF(q) significantly improves the error performance. To escape from undesirable local maxima, this paper proposes a self-adjustment strategy to redesign the flipping metric. Combined with the prediction mechanism, our proposed algorithm provides a good tradeoff between the complexity and the error performance. Simulation results for the AWGN channel and the binary symmetric channel (BSC) verify the effectiveness of the proposed algorithm.
This paper investigates the application of gradient descent with momentum in symbol flipping decoding algorithms based on prediction (SFDP) for non-binary low-density parity-check (NB-LDPC) codes. The momentum added in the objective function of SFDP algorithms can provide inertia to the decoding process by considering the flipping states in the past iterations. Simulation results show that the proposed momentum-based SFDP algorithms perform significantly better than the original SFDP algorithms with low extra complexity. Furthermore, to lower the error floor of momentum-based SFDP algorithms, we also introduce artificial noises into the objective functions of momentum-based SFDP algorithms to help the iterative decoding escape from local optimum.
This letter presents an adaptive single/multiple distance-symbol flipping decoding algorithm with prediction (ASMD-SFDP). Different from the D-SFDP, the presented algorithm consider both the global maximization and sec-maximization values of the reliability fluctuation quantity (RFQ). Flipping operation is performed only when the global maximization is greater than or equal to zero. Furthermore, a new flipping strategy is introduced based on the numerical gap between the global maximization and sec-maximization. The flipping operation is performed adaptively: 1) If the gap is greater than or equal to a designed threshold, only single symbol is flipped; 2) Otherwise, multiple symbols are flipped. Simulation results show that the presented algorithm can achieve a significant performance gain of 0.4
$\sim $
0.5 dB compared with the original D-SFDP algorithm. More interestingly, the presented algorithm also shows a much faster convergence speed.
A properly designed stopping criterion for iterative decoding algorithms can save a number of iterations and lead to a considerable reduction of system latency. The symbol flipping decoding algorithms based on prediction (SFDP) have been proposed recently for efficient decoding of non-binary low-density parity-check (LDPC) codes. To detect the decoding frames with slow convergence or even non-convergence, we track the number of oscillations on the value of objective function during the iterations. Based on this tracking number, we design a simple stopping criterion for the SFDP algorithms. Simulation results show that the proposed stopping criterion can significantly reduce the number of iterations at low signal-to-noise ratio regions with slight error performance degradation.
Symbol flipping decoding (SFD) of non-binary low-density parity-check (NB-LDPC) codes has lower implementation complexity at a cost of performance degradation, when compared with other belief propagation decoding algorithms. This paper proposes modified SFD algorithms based on prediction (SFDP) for NB-LDPC codes by introducing random penalty items into the flipping metrics. Two types of noise with uniform and Gaussian distributions are considered. A probabilistic analysis shows theoretically that the randomly penalized SFDP algorithms can be advantageous in the correct flipping probability over their original versions. Simulation results show that the proposed penalizing methods exhibit significant performance gains for both regular and irregular NB-LDPC codes with different rates and alphabet sizes in both the additive white Gaussian noise (AWGN) channel and the binary symmetric channel (BSC).
This paper proposes a novel symbol-flipping decoding (SFD) algorithm called decision-symbol reliability-based SFD (DRB-SFD) algorithm for nonbinary low-density parity-check (LDPC) codes aiming to improve the error-rate performances of data storage devices with hard-decision channel outputs, e.g., data storage using nand flash memory. The proposed algorithm generates the reliability information of decision symbols based on a metric for symbol flipping during iterations instead of soft-decision channel outputs. In addition, it quantizes the reliability information into reliability messages that are exchanged between variable and check nodes. The number of quantization levels is carefully chosen to be the same as the field size of coded symbols, which allows the message exchanges to be performed without the additional signal paths. It is also extensively discussed how to decide parameters in the proposed algorithm in an analytic way. We demonstrate that the proposed algorithm featured with the exchanges of reliability messages provides significant performance improvements over existing SFD algorithms on channels with hard-decision outputs.
Based on the symbol-flipping algorithm with multiple-votes (MV-SF), this paper presents two simplified algorithms, symbol flipping with truncated and multiple votes (TMV- SF) and symbol flipping with simplified and multiple votes (S-MV-SF), for non-binary low-density parity-check (NB-LDPC) codes. Unlike previous symbol-flipping based algorithms (SFBAs), the T(S)-MV-SF uses the truncated voting information in each check and variable node update. The proposed algorithms also approximate the sorting function in each check update. Therefore, their complexity and memory consumption are remarkably reduced as compared with existing SFBAs. Furthermore, we introduce several parameters to compensate the information loss caused by the truncated voting information. After optimizing all the parameters, the proposed algorithms even have better performance than the MV-SF. As compared with the MV-SF, the maximum performance gain among all numerical examples is about 0.11dB for the S-MV-SF on the (63,37) code. The T-MVSF has the largest reduction of the computational complexity on the (255,175) code, which is about 80% of the complexity of the MV-SF. Moreover, the performance of the T-MV-SF is better than the MV-SF on the (255,175) code. As a result, the proposed algorithms can effectively balance the error performance and complexity for decoding of NB-LDPCs.
This paper constructs an objective function for symbol flipping decoding algorithms, considering not only soft reliability, but also hard reliability. The maximization of this objective function indicates that the flipping metric should involve both the information before and after symbol flipping, while the existing algorithms consider the information before symbol flipping. Theoretical analysis shows that such prediction mechanism, together with hard reliability, can significantly improve the error performance of symbol flipping algorithms. Simulation results show that the proposed algorithms provide effective tradeoff between error performance and complexity for decoding nonbinary LDPC codes.
A novel decoding algorithm for non-binary low density parity check (NB-LDPC) codes is proposed. The algorithm builds on the recently designed parallel symbol-flipping decoding (PSFD) algorithm and combines a technique of error estimation and a method of multiple voting levels from each unsatisfied check-sum to the corresponding variable nodes. Simulations results, performed on a number of NB-LDPC codes of various lengths and column weights constructed using several methods, show that the new algorithm not only avoids using code-dependent voting threshold but also improves the error rate performance of the PSFD algorithm, particularly for low column weight parity-check matrices.
In this paper, we present a low-complexity iterative joint detection-decoding algorithm for majority-logic decodable nonbinary LDPC coded modulation systems. In the proposed algorithm, a hard-in-hard-out decoder is combined with a hard-decision signal detector in an iterative manner. Each iteration consists of five phases. Firstly, the detector makes hard decisions based on the iteratively updated “received” signals; secondly, these hard-decisions are distributed via variable nodes to check nodes; thirdly, check nodes compute hard extrinsic messages; fourthly, each variable node counts hard extrinsic messages from its adjacent check nodes and feeds back to the detection node the symbol with the most votes as well as the difference between the most votes and the second most votes; finally, these feedbacks are used to shift each “received” signal point along an estimated direction to possibly reduce noise. The proposed algorithm requires only integer operations and finite field operations. Simulation results show that the proposed algorithm performs well and hence serves as an attractive candidate to decode majority-logic decodable nonbinary LDPC codes.
This paper is concerned with construction and structural analysis of both cyclic and quasi-cyclic codes, particularly low-density parity-check (LDPC) codes. It consists of three parts. The first part shows that a cyclic code given by a parity-check matrix in circulant form can be decomposed into descendant cyclic and quasi-cyclic codes of various lengths and rates. Some fundamental structural properties of these descendant codes are developed, including the characterization of the roots of the generator polynomial of a cyclic descendant code. The second part of the paper shows that cyclic and quasi-cyclic descendant LDPC codes can be derived from cyclic finite-geometry LDPC codes using the results developed in the first part of the paper. This enlarges the repertoire of cyclic LDPC codes. The third part of the paper analyzes the trapping set structure of regular LDPC codes whose parity-check matrices satisfy a certain constraint on their rows and columns. Several classes of finite-geometry and finite-field cyclic and quasi-cyclic LDPC codes with large minimum distances are shown to have no harmful trapping sets of size smaller than their minimum distances. Consequently, their error-floor performances are dominated by their minimum distances.
A simplified algorithm for the check node processing of extended min-sum non-binary LDPC decoders is proposed. This novel technique, named bubble check , can reduce the number of compare operations by a factor of three at the elementary check node level. As this significant complexity reduction is achieved without any performance loss, this technique becomes highly attractive for hardware implementation.
This paper presents five methods for constructing nonbinary LDPC codes based on finite geometries. These methods result in five classes of nonbinary LDPC codes, one class of cyclic LDPC codes, three classes of quasi-cyclic LDPC codes and one class of structured regular LDPC codes. Experimental results show that constructed codes in these classes decoded with iterative decoding based on belief propagation perform very well over the AWGN channel and they achieve significant coding gains over Reed-Solomon codes of the same lengths and rates with either algebraic hard-decision decoding or Kotter-Vardy algebraic soft-decision decoding at the expense of a larger decoding computational complexity.
In this letter, we address the problem of decoding nonbinary low-density parity-check (LDPC) codes over finite fields GF(q), with reasonable complexity and good performance. In the first part of the letter, we recall the original belief propagation (BP) decoding algorithm and its Fourier domain implementation. We show that the use of tensor notations for the messages is very convenient for the algorithm description and understanding. In the second part of the letter, we introduce a simplified decoder which is inspired by the min-sum decoder for binary LDPC codes. We called this decoder extended min-sum (EMS). We show that it is possible to greatly reduce the computational complexity of the check-node processing by computing approximate reliability measures with a limited number of values in a message. By choosing appropriate correction factors or offsets, we show that the EMS decoder performance is quite good, and in some cases better than the regular BP decoder. The optimal values of the factor and offset correction are obtained asymptotically with simulated density evolution. Our simulations on ultra-sparse codes over very-high-order fields show that nonbinary LDPC codes are promising for applications which require low frame-error rates for small or moderate codeword lengths. The EMS decoder is a good candidate for practical hardware implementations of such codes
Gallager codes with large block length and low rate (e.g., N ≃ 10,000–40,000, R ≃ 0.25–0.5) have been shown to have record-breaking performance for low signal-to-noise applications. In this paper we study Gallager codes at the other end of the spectrum. We first explore the theoretical properties of binary Gallager codes with very high rates and observe that Gallager codes of any rate offer runlength-limiting properties at no additional cost.
We then report the empirical performance of high rate binary and non-binary Gallager codes on three channels: the binary input Gaussian channel, the binary symmetric channel, and the 16-ary symmetric channel.
We find that Gallager codes with rate R = 8/9 and block length N = 1998 bits outperform comparable BCH and Reed-Solomon codes (decoded by a hard input decoder) by more than a decibel on the Gaussian channel.
Based on the idea of plurality voting, we develop a low-complexity symbol-reliability based message-passing decoding algorithm for nonbinary low-density parity-check (LDPC) codes over finite fields. A key feature of the algorithm is that the message passed in the Tanner graph is the field element with the highest reliability. This leads to a very simple check node update. The algorithm requires only finite and integer operations. Moreover, the estimation of the signal-to-noise ratio (SNR) is not needed. Compared to the Fast Fourier Transform based q-ary sum-product algorithm (FFT-QSPA), the proposed decoding algorithm provides an excellent trade-off between performance and complexity for the nonbinary LDPC codes constructed based on finite geometries, finite fields and cyclotomic cosets.
Thesis (Sc. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering, 1960. Vita. Includes bibliographical references (leaves 110-111). by Robert Gray Gallager. Sc.D.
In this paper, a new low-complexity symbol-flipping algorithm to decode nonbinary low-density parity-check (LDPC) codes is proposed. The decoding procedure updates iteratively the hard-decision received symbol vector in search of a valid codeword in the symbol vector space. Only one symbol is changed in each iteration, and symbol flipping function combines the number of failed checks and reliability of the received bits and calculated symbols. An optional mechanism to avoid infinite loops in high Galois field search is also proposed. Our studies show that the algorithm achieves an appealing tradeoff between performance and complexity over relatively low Galois field for short to medium code length.
Iterative decoding of non-binary LDPC codes is currently performed using either the sum-product or the min-sum algorithms or slightly different versions of them. In this paper, several low-complexity quasi-optimal iterative algorithms are proposed for decoding non-binary codes. The min-max algorithm is one of them and it has the benefit of two possible LLR domain implementations: a standard implementation, whose complexity scales as the square of the Galois field's cardinality and a reduced complexity implementation called selective implementation, which makes the min-max decoding very attractive for practical purposes.
A two-stage hybrid iterative decoding algorithm with an efficient stopping criterion for nonbinary low-density parity-check (LDPC) codes is proposed, which combines weighted symbol-flipping (WSF) algorithm and fast Fourier transform q-ary sum-product algorithm (FFT-QSPA). The first WSF decoding would be stopped in advance by analyzing the trend of the number of unsatisfied checks. If the first stage decoding is stopped or failed, the second powerful FFT-QSPA is activated. The proposed decoding with the efficient stopping achieves error performance as good as that of FFT-QSPA with a low complexity, and converges faster than hybrid WSF (HWSF) algorithm.
This paper presents two low-complexity reliability-based message-passing algorithms for decoding LDPC codes over non-binary finite fields. These two decoding algorithms require only finite field and integer operations and they provide effective trade-off between error performance and decoding complexity compared to the non-binary sum product algorithm. They are particularly effective for decoding LDPC codes constructed based on finite geometries and finite fields.
In this letter, we propose a construction of nonbinary quasi-cyclic low-density parity-check (QC-LDPC) codes based on a cyclic maximum distance separable (MDS) code. The parity-check matrices are significantly rank deficient square matrices and their Tanner graphs have a girth of at least 6. The minimum distances of the codes are very respectable as far as LDPC codes are concerned. Based on plurality voting and iterative mechanism, a low-complexity nonbinary massage-passing decoding algorithm is proposed. It only requires finite field operations, integer additions and integer comparisons. Simulation results show that the decoding algorithm is fit for the proposed codes, providing efficient trade-offs between performance and decoding complexity, which suggests that the coding scheme may find some applications in communication or storage systems with high-speed and low-power consumption requirements.
Non-binary low-density parity-check (NB-LDPC) codes can achieve better error-correcting performance than their binary counterparts at the cost of higher decoding complexity when the codeword length is moderate. The recently developed iterative reliability-based majority-logic NB-LDPC decoding has better performance-complexity tradeoffs than previous algorithms. This paper first proposes enhancement schemes to the iterative hard reliability-based majority-logic decoding (IHRB-MLGD). Compared to the IHRB algorithm, our enhanced (E-) IHRB algorithm can achieve significant coding gain with small hardware overhead. Then low-complexity partial-parallel NB-LDPC decoder architectures are developed based on these two algorithms. Many existing NB-LDPC code construction methods lead to quasi-cyclic or cyclic codes. Both types of codes are considered in our design. Moreover, novel schemes are developed to keep a small proportion of messages in order to reduce the memory requirement without causing noticeable performance loss. In addition, a shift-message structure is proposed by using memories concatenated with variable node units to enable efficient partial-parallel decoding for cyclic NB-LDPC codes. Compared to previous designs based on the Min-max decoding algorithm, our proposed decoders have at least tens of times lower complexity with moderate coding gain loss.
In this letter, we propose a low complexity decoding algorithm for majority-logic decodable nonbinary low-density parity-check (LDPC) codes. The proposed algorithm is initialized with the quantized squared Euclidean distances between the constellation points and the received signals. Like most of the existing reliability-based decoding algorithms, the proposed algorithm requires only integer operations and finite field operations and (hence) can be implemented with simple combinational logic circuits in practical systems. Simulation results show that the proposed algorithm suffers from a little performance degradation compared with FFT-QSPA. The algorithm provides a candidate for trade-offs between performance and complexity.
A low-density parity-check code is a code specified by a parity-check matrix with the following properties: each column contains a small fixed number j geq 3 of l's and each row contains a small fixed number k > j of l's. The typical minimum distance of these codes increases linearly with block length for a fixed rate and fixed j . When used with maximum likelihood decoding on a sufficiently quiet binary-input symmetric channel, the typical probability of decoding error decreases exponentially with block length for a fixed rate and fixed j . A simple but nonoptimum decoding scheme operating directly from the channel a posteriori probabilities is described. Both the equipment complexity and the data-handling capacity in bits per second of this decoder increase approximately linearly with block length. For j > 3 and a sufficiently low rate, the probability of error using this decoder on a binary symmetric channel is shown to decrease at least exponentially with a root of the block length. Some experimental results show that the actual probability of decoding error is much smaller than this theoretical bound.
A parallel weighted bit-flipping (PWBF) decoding algorithm for low-density parity-check (LDPC) codes is proposed. Compared to the best known serial weighted bit-flipping decoding, the PWBF decoding converges significantly faster but with little performance penalty. For decoding of finite-geometry LDPC codes, we demonstrate through examples that the proposed PWBF decoding converges in about 5 iterations with performance very close to that of the standard belief-propagation decoding.
In the late 1950s and early 1960s, finite fields were successfully used to construct linear block codes, especially cyclic codes, with large minimum distances for hard-decision algebraic decoding, such as Bose-Chaudhuri-Hocquenghem (BCH) and Reed-Solomon (RS) codes. This paper shows that finite fields can also be successfully used to construct algebraic low-density parity-check (LDPC) codes for iterative soft-decision decoding. Methods of construction are presented. LDPC codes constructed by these methods are quasi-cyclic (QC) and they perform very well over the additive white Gaussian noise (AWGN), binary random, and burst erasure channels with iterative decoding in terms of bit-error probability, block-error probability, error-floor, and rate of decoding convergence, collectively. Particularly, they have low error floors. Since the codes are QC, they can be encoded using simple shift registers with linear complexity.
Binary Low Density Parity Check (LDPC) codes have been shown to have near Shannon limit performance when decoded using a probabilistic decoding algorithm. The analogous codes defined over finite fields GF (q) of order q ? 2 show significantly improved performance. We present the results of Monte Carlo simulations of the decoding of infinite LDPC Codes which can be used to obtain good constructions for finite Codes. Our empirical results for the Gaussian channel include a rate 1/4 code with bit error probability of 10 Gamma4 at E b =N 0 = Gamma0:05dB. 1 Introduction We consider a class of error correcting codes first described by Gallager in 1962 [1]. These recently rediscovered low density parity check (LDPC) codes are defined in terms of a sparse parity check matrix and are known to be asymptotically good for all channels with symmetric stationary ergodic noise [2, 3]. Practical decoding of these codes is possible using an approximate belief propagation algorithm and near Shanno...
Binary Low Density Parity Check (LDPC) codes have been shown to have near Shannon limit performance when decoded using a probabilistic decoding algorithm. The analogous codes defined over finite fields GF (q) of order q ? 2 show significantly improved performance. We present the results of Monte Carlo simulations of the decoding of infinite LDPC Codes which can be used to obtain good constructions for finite Codes. We also present empirical results for the Gaussian channel including a rate 1/4 code with bit error probability of 10 Gamma4 at E b =N0 = Gamma0:05dB. I. Introduction We consider a class of error correcting codes first described by Gallager in 1962 [2]. These recently rediscovered low density parity check (LDPC) codes are defined in terms of a sparse parity check matrix and are known to be asymptotically good for all channels with symmetric stationary ergodic noise [6]. Practical decoding of these codes is possible using an approximate belief propagation algorithm and ...