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RISC: Back to the future?

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Chester Gordon Bell at Microsoft
Chester Gordon Bell
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... Prestaciones del procesador "A Tale of two processors: revisiting the RISC-CISC debate" C. Isen, L. John, E. John, 2009 [8] "RISC: Back to the future?" C. G. Bell [9] Clasificación de las arquitecturas "A Historical overview of Computer Architecture" R. E. Smith [10] "Creating the computer industry" E.W. Pugh; W. Aspray, 1996 [11] Multicomputadores y supercomputadores "The social limits of Speed: The development and use of supercomputers" B. Elzen; D. Mackenzie, 1994 [12] Ley de Amdahl "Computer Architecture and Amdahl's Law" G.M. Amdahl, 2013 [13] Multiprocesadores y multicomputadores "Ultracomputers a Teraflops before its time" G. Bell [14] Paralelismo entre instrucciones "The Pentium Chronicles: Introduction". R.P. Colwell, 2006 [15] ...
... En cuanto a las arquitecturas paralelas, se presentan los conceptos fundamentales del paralelismo ILP y el procesamiento multihebra: planificación de instrucciones, comunicación y sincronización, coherencia y consistencia de memoria, etc. En la Tabla 2 se recogen las referencias que pueden utilizarse para construir relatos relacionados con los conceptos fundamentales que se abordan. Se incluyen artículos con información acerca de la controversia RISC/CISC [8,9], y del momento en que una arquitectura CISC se implementó de forma eficiente a través de una microarquitectura superescalar (microarquitecturas P6 de Intel) [15]. También hay artículos que describen cómo van surgiendo distintas arquitecturas a partir de planteamientos que priman la compatibilidad con diseños previos o la obtención de mejores prestaciones a cualquier precio. ...
... (C. G. Bell) [9]. La controversia que se produjo en la década de los 80 entre estas dos filosofías de diseño del repertorio de instrucciones máquina ilustra muy bien cómo, en ingeniería, razonamientos plausibles desde un punto de vista lógico pueden no verse corroborados por la realidad y hacen necesario un análisis cuantitativo y una evaluación experimental que refleje las características de las aplicaciones, tal y como se plantea en el libro de Arquitectura de Computadores de Hennessy y Patterson. ...
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... The best-known weighted-instruction mix is MIPS (millions of instructions per second), which was used in a hedonic function for computers by Dulberger (1989). Lias (1980), Serlin (1986 and Bell (1986)-and other computer manufacturers-emphasized that MIPS was designed to measure speed for IBM architectures, and might not provide a comparable measure across different machine architectures. Lias (1980, p. 105) put the measurement error that arises from applying MIPS to machines of different architectures at 10%-30%. ...
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Microprogramming heritage of RISC design
Conference Paper
  • Dec 1990
The paper summarizes the current design trends of micro-architectures and analyzes the tradeoffs between the RISC approach and the microprogramming approach especially on vertical migration among hardware, firmware, compilation, and software. RISCs simplicity is contrasted by the regularity of microprogrammed control. The RISC design incentives are categorized into three perspectives, namely, technology-driven, application-driven, and performance-driven. Traditional firmware migration approaches are reviewed and related to the RISC design philosophy as well as, the writable instruction set computer (WISC) concept. Research such as firmware migration candidates selection can be applied to RISC instruction set design. Similarly, micro-code generation and compaction research can be used to construct smart, optimizing RISC compilers. Horizontal microcoding is interpreted by the very long instruction word (VLIW) architecture
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