Content uploaded by Khaled Elleithy
Author content
All content in this area was uploaded by Khaled Elleithy
Content may be subject to copyright.
Mapping CIRCAL based algorithms to event logic
Abstract
In this paper a new approach fro implementing CIRCAL algorithm using event logic is presented. A high- level description of an algorithm is expressed in CIRCAL, a formal parallel hardware description language. The approach employs a transition signaling convention and a request-acknowledgment protocol under the bundled data model. The mapping approach is a syntax-directed one that will parse various CIRCAL constructs to their corresponding event logic. The mapping methodology is illustrated by an example.
... Donath [SI has shown from simple theoretical considerations that the distribution f, of the wire lengths for a good two-dimensional placement on a square Manhattan grid is of the form: P = KB' (1) 0-7803-6488-0/00/$10.00 0 2000 IEEE __ f, = g / k Y , ( 1 5 k < -L ) a n d f L =:O(k>L). (2) 2p+y -3. ...
In this paper we present a method to estimate the layout area of
DSP algorithms that are designed using the standard cell methodology.
The circuit description is given as a netlist of standard cell library
modules. The area occupied by the circuit can be estimated prior to the
actual layout phase. Area estimation before final layout is important
for design evaluation and for the prediction of the chip floorplan
A new approach for parallelism analysis and extraction of digital
signal processing algorithms is introduced. The high level description
of the input is given in CIRCAL. A dependency graph of the problem is
constructed to check existence of cycles. Loops in the dependency graph
are parallelized. The approach is illustrated by an example
A calculus in which the behaviour of circuits may be described and analysed is presented.A concurrent composition operator allows descriptions of components to be composed to give descriptions of a complete device. This operator allows synchronous and asynchronous behaviour to be naturally modelled so allowing us to represent and analyse timing issues in circuits.An abstraction operator allows for the formalisation of hierarchical design notions and causes the behaviour of a circuit to be described only in terms of its potential interactions with the environment.To illustrate the use of the calculus, various VLSI circuits have their behaviour described in Circal.
A formalism in which timing properties of digital hardware may be
specified, derived, and formally verified is introduced as a rigorous
theory for hardware timing. A rigorous modeling framework has been used
to create a family of related verification techniques rather than a
single timing analysis tool. This framework is based on a model of
interacting finite state machines called CIRCAL, a formalism developed
for the purpose of describing and validating complex concurrent systems.
In this approach to hardware timing analysis, the presence of a
composition operator is all-pervasive. It provides a single, uniform
mechanism for describing the behavior of interacting hardware modules
and for establishing and describing the timing properties of such
modules