Article

Application of Automated Topography Focus Corrections for Volume Manufacturing

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Abstract

This work describes the implementation and performance of AGILE focus corrections for advanced photo lithography in volume production as well as advanced development in IBM's 300mm facility. In particular, a logic hierarchy that manages the air gage sub-system corrections to optimize tool productivity while sampling with sufficient frequency to ensure focus accuracy for stable production processes is described. The information reviewed includes: General AGILE implementation approaches; Sample focus correction contours for critical 45nm, 32nm, and 22nm applications; An outline of the IBM Advanced Process Control (APC) logic and system(s) that manage the focus correction sets; Long term, historical focus correction data for stable 45nm processes as well as development stage 32nm processes; Practical issues encountered and possible enhancements to the methodology.

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... La problématique de la topologie du wafer n'est pas récente [49] Pour s'assurer que la mesure donne une valeur correcte de la topographie du wafer, un second capteur pneumatique (non impacté par ces effets), nommé AGILE [52] pour « Air Gauge Improved Leveling » (ou mise à niveau améliorée par capteur pneumatique), a été installé dans les scanners de lithographie ASML. AGILE mesure une différence de pression entre deux jets d'air : une référence et le capteur. ...
Thesis
La complexification des intégrations sur les puces électroniques et la course à la miniaturisation sont les deux moteurs actuels de la microélectronique. Les limites optiques de la lithographie sont déjà atteintes depuis longtemps. Ainsi, la fabrication doit aussi être contrôlée de plus en plus étroitement afin d’éviter des variabilités qui nuiraient au bon fonctionnement du produit. Cette thèse présente une approche holistique du contrôle d’un des paramètres les plus importants de la photolithographie : le focus. Celui-ci est directement lié à la qualité de l’image transférée dans la résine photosensible pendant l’exposition. Son contrôle est donc primordial. Les sources de variabilités du focus sur le wafer sont multiples et diverses mais le cas particulier de la topographie du substrat a été privilégié dans cette étude.L’approche holistique de cet effet en particulier a conduit à l’utilisation d’outils de « data mining » telle la régression par la méthode des moindres carrés partiels qui a permis de pointer les principales causes de cette topographie, de créer un modèle prédictif de la topologie mais aussi d’évaluer des solutions d’améliorations comme l’amélioration des corrections qu’effectue le scanner permettant un meilleur contrôle généralisé de toutes les technologies sans toutefois changer l’intégration et le design ou encore la mise en place d’une méthode qui permet d’évaluer les erreurs de focus sur le wafer sans pour autant avoir recours à des mesures intensives sur silicium. D’autres solutions permettent de corriger les facteurs de risques à la source en modifiant le design afin de limiter la formation de la topologie de surface.
Article
The ever shrinking lithography process window requires us to maximize our process window and minimize tool-induced process variation, and also to quantify the disturbances to an imaging process caused upstream of the imaging step. Relevant factors include across-wafer and wafer-to-wafer film thickness variation, wafer flatness, wafer edge effects, and design-induced topography. We quantify these effects and their interactions, and present efforts to reduce their harm to the imaging process. We also present our effort to predict design-induced focus error hot spots at the edge of our process window. The collaborative effort is geared towards enabling a constructive discussion with our design team, thus allowing us to prevent or mitigate focus error hot spots upstream of the imaging process.
Article
With decreasing critical dimension (CD) budgets and smaller k1 values the need for perfect focus control becomes paramount. Among the individual contributors to the overall focus budget, the accuracy of the leveling system on a process wafer and the focus setting accuracy for the individual layers are two major contributors. In our study we discuss the usage of a new non-optical leveling system and its measurement capability of wafer topography. By exposing focus-exposure matrices (FEMs) and measuring them on multiple points in the field, we demonstrate the systematic and random focus variation across the scanner exposure field for several layers. Critical back end of line (BEoL) layers in particular show considerable impact of topography, thus resulting in the across field focus variations shown. By using the newly developed AGILE leveling system which uses an air-gauge focus sensor we demonstrate a more accurate best focus determination across field, resulting in better overall focus performance. This AGILE system is expected to be independent on any process variation, since there is no (optical) interaction between the measurement device and the process layer stack. By the use of multi-point FEMs we show that the intrafield focus range can be reduced by as much as 50%, depending on certain layer and layout characteristics. We discuss the impact of the new sensor in conjunction with the extended FEM scheme on the overall focus budget for critical layers. Finally, we briefly show a possible integration scenario into the overall exposure strategy.
Article
Our case study experimentally gauges the defocus component induced by a step in the exposure field substrate, with the edge of the step aligned parallel to the scanning slit. Such steps frequently occur at the border of different chiplets or process monitors within one exposure field. A common assumption is that a step-and-scan imaging system can correct for the majority of such topography, since the wafer is dynamically leveled under the static image plane as it is scanned. Our results show that the range of defocus approaches about 85% of the actual step height and thus contributes significantly to the overall focusing variance. This area on the wafer in which defocus can be observed extends by more than 3mm to both sides of the step. In the same area a degradation of imaging fidelity can be observed in the form of exaggerated proximity effects.
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