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Modified multistage semiconductor-Fitch

generator topology with magnetic compression

Stanisław Kalisiak

*

, Marcin Hołub

†

*

Szczecin University of Technology, Electrical Engineering Department, Szczecin, Poland, e-mail: kal@ps.pl

†

Szczecin University of Technology, Electrical Engineering Department, Szczecin, Poland, e-mail: mholub@ps.pl

Abstract— For non-thermal plasma technology corona

discharge devices high-voltage, high-current pulses are used

with very high demands considering rising voltage slopes.

Many solid state pulse power modulator (SSPPM) system

topologies are known however most include a high power

transformer compromising the overall system efficiency. A

modified Fitch generator topology is introduced enlarging

the output voltage to supply voltage ratio to theoretically the

factor of three. Moreover the output voltage waveform

enables the magnetic pulse compressor cross-section

minimization with the factor of 0,67 due to a unique output

voltage waveform. Test stand results are given for a 10-stage

construction and a single stage magnetic compressor, power

switch dynamic parameters influence on systems efficiency

is discussed.

Keywords— Pulsed power converter, Fitch generator,

plasma supply systems, resonant converter.

I. INTRODUCTION

Modern plasma technology systems often require high

voltage, high current, short duration pulse power supplies

[1,2,3,4]. Although fast development of modern power

switches (most of all thyristors and LTTs) results in high

blocking voltage ratings, costs and rise and fall times are

often hard to adopt in pulsed power systems, most of all

considering sources with short rising and falling edge de-

mands. Many system topologies have been introduced in

order to multiply the output voltage/blocking voltage ratio

when compared to single switch. Most important ones

include the Marx topology [5] depicted partly in Fig. 1

and the Fitch topology [6] (also called resonant charge

transfer Marx topology).

Fig. 1. A classical Marx [5] topology pulse power source. SG – spark

gap switch, C – capacitor, R – charging resistance.

Modern designs include solid state switches instead of

spark-gap or gaseous switches (as thyratrons) because of

the well known advantages as lifetime, control apparatus

simplification and output frequencies. However the

overall tendency is that with rising blocking voltage

ratings dynamic parameters of the switches are heavily

decreased. In order to maintain high output voltage

capabilities with fast switch responses modular

construction was developed enabling output voltage

multiplication without the use of a high voltage

transformer.

II. MODIFIED, MULTILEVEL-FITCH CONVERTER

TOPOLOGY

A modification of the Fitch topology is proposed incre-

menting the voltage multiplication factor of a single

module to three. Solid state switch based construction is

presented in Fig. 2, a single stage clarifying basics of

operation is depicted in Fig. 3.

Fig. 2. Proposed, modified Fitch generator topology.

Fig. 3. Single power stage of the pulsed power system.

Principle of operation can be discussed using schematic

waveforms from Fig. 4. While the power switch is not

operated the output voltage U

out

is equal or close to zero

and the voltage amplitude across capacitors C

1

, C

2

, C

3

is

matched to charging voltage and the polarization agrees

with the one depicted in Fig. 3.

When the solid state switch (Figures include an IGBT

transistor) is operated output voltage U

out

is equal to the

sum of capacitor voltages U

C1

+U

C2

+U

C3

, that is the

instant voltage value at the beginning of the recharge

process equals –U

C

.

The recharging process begins and the voltage changes

according to (1):

(

)

tUU

Cout

ω

cos21

−

=

, (1)

where

LC

1

=ω

when L

2

=L

3

=L and C

1

=C

2

=C

3

=C.

Fig. 4. Principle of a single stage operation.

The condition to recharge capacitors simultaneously can be

achieved by magnetic coupling of recharge inductances L

2

and L

3

. For a serial connection of n number of stages

(Fig. 2) following output voltage equation can be obtained:

(

)

tUnU

C

n

out

ω

cos21

)(

−

⋅

=

(2)

As can be derived from resonant capacitor recharge

conditions with high quality factor after the half-period of:

LC

T

π=

2

(3)

overall output voltage reaches:

Cout

UnU

⋅

⋅

=

3

(max)

. (4)

Equation 4 summarizes the advantage of the topology

introduced, a fact of tripling the supply voltage on a single

voltage stage.

III. INFLUENCE OF DYNAMIC SWITCH PARAMETERS ON

SYSTEM EFFICIENCY

In case of short pulse formation in high voltage circuits

solid-state switch dynamic losses have a major efficiency

impact. In case of the described topology an equivalent

circuit can be used depicting the serial connection of

resulting capacity and inductance with the power switch

(Fig. 5a). In the converter prototype constructed Ixys

IGBT IXDN 55N120 D1 transistors were used, with a

nominal rise time of t

r

=70ns. Considering voltage-current

waveforms of the switching element an analytical

approach can be used as depicted in Fig. 5b.

A. Simplified approach

Considering waveforms depicted in Fig. 5. a simplified

energy loss analysis can be led taking linear collector

current and collector-emitter voltage waveforms during

switching. Because of the system equivalent circuit

mainly turn-on losses will have a strong impact on system

efficiency. As can be denoted from theoretical turn-on

losses equation energy loss can be described as:

+

⋅⋅≅

6

2

)(0

0

2

satCEC

C

r

loss

UU

U

L

t

E

(5)

and in respect to the energy stored in capacitor at the

beginning of the recharge process E

stored

:

+

⋅

⋅⋅

≅

3

2

)(0

0

2

satCEC

C

r

stored

loss

UU

CLU

t

E

E

(6)

Fig. 5. a) - equivalent circuit, b) – power switch voltage-current

analytical waveforms.

A graphical illustration of the dependency (6) is presented

in Fig. 6 together with the calculated recharge half-period.

Calculations were led using Ixys transistor parameters, C

= 44nF, U

C0

= 600V.

Fig. 6. Simplified, analytical energy loss ratio and recharge half-period.

As can be denoted for the inductances above 3µH the

energy loss ratio should not exceed 1,5%, which also is in

good agreement with results presented in [7]. Further

output pulse shortening, and in consequence resonant

inductance L minimization leads to dramatic energy loss

enlargement, furthermore power switch critical ratings

limit the current rising slope. In consequence the energy

efficiency suddenly drops if the T/2 / t

r

factor is lower than

approximately 10. For the inductance values above 3µH

no significant efficiency improvement is achieved and the

output pulse length is increased, which is undesirable in

the analyzed case. Of course dynamical switching

parameters of the switch are crucial as described in (6),

the influence of switching-on time was investigated with

the means of different gate resistance values R

G

. Measured

values are presented in Fig. 7.

Fig. 7. Measured turn-on energy loss as a function of gate resistance.

B. Quality factor approach

Alternative analysis can be led using not energy balance

equations or each of its components into account but a

summarized, mean value based on the energy balance

before and after the recharge half-period. The quality

factor Q for the equivalent circuit presented in Fig. 5a) is

given by:

R

L

Q

0

ω

=

, (7)

where

LC

1

0

=ω

. (8)

Fig 8. Quality factor – output voltage waveform influence

Considering the quantities given in (7) and (8) an equation

can be derived for the output voltage U

out

waveform as a

function of supply voltage U

C0

and the quality factor Q:

( )

⋅−=

−

Q

t

Cout

etUU

2

0

0

cos21

ω

ω (9)

A graphical illustration of single module operation for the

supply voltage U

C0

=600V is given in Fig. 8.

The dependency was also examined using the test-stand

measurements. Circuit damping was adjusted using

different transistor gate resistances therefore changing the

switching-on behavior as seen in Fig. 7. Results of a

single capacitor recharge voltage U

C

waveform are

depicted in Fig. 9, tests were led using supply voltage of

600V. Gate resistance was adjusted between R

G

=3.3Ω and

R

G

=100Ω.

Fig. 9. Capacitor recharge voltage U

C

as a function of time and gate

resistance R

G

.

From (9) voltage recharge ratio can be obtained

describing the percentage of initial capacitor voltage U

C0

transfer after the recharge half-period (U

C(t=T/2)

). The

analytical solution is given by:

+=

−

−

=

14

0

)2/(

21

3

1

Q

C

TtC

e

U

U

π

(10)

Fig. 10. Voltage recharge ratio as a function of quality factor Q.

A graph showing the recharge ratio described in (10) is

shown in Fig. 10 for the quality factor Q range between 5

and 100. All the dependencies given are for a single

module of the construction as depicted in Fig. 3.

As can be denoted from Fig. 10 module’s quality factor

should be possibly high, with the minimal value of

approximately Q≈25 for high system efficiency. A series

of measurements led, depicted in Fig. 9, leads to

summarization of transistor t

r

ratings influence on systems

quality factor and efficiency given in Table 1

(measurements were led for a single module,

L

2

=L

3

=3,5µH, C

1

=C

2

=C

3

=44nF as depicted in Fig. 3.):

TABLE I.

IGBT TRANSISTOR DYNAMIC PARAMETERS INFLUENCE ON SYSTEMS

QUALITY FACTOR AND RECHARGE EFFICIENCY

R

G

[Ω]

U

C0

[V] U

C(t=T/2)

[V] Q [p.u.] E

loss

/E

stored

[%]

100 602 -120 1 96

51 598 -354 3 65

20 602 -480 6,94 36

10 600 -534 13,48 21

5,1 595 -568 33,82 9

3,3 600 -572 32,87 9

As can be denoted for nominal gate resistance of 5,1Ω

the practically verified quality factor reaches almost 34,

which compared to Fig. 10 should result in energy

efficiency of approximately 97%. Except for transistor

turn-on (Fig. 6) losses also ohm (current displacement)

losses and magnetic material properties are visible.

IV. MAGNETIC COMPRESSION

Compression of output pulses is often necessary in

order to obtain required timing parameters of the output

pulse, most of all considering

dt

dU

out

factor. Plasma

systems using pulsed corona discharge phenomena require

very short output pulses of a few hundred nanoseconds

[8]. Additional applications of voltage magnetic

compressors include typical systems were pulsed power

systems or solid state pulse power modulators (SSPPM)

are used, that is laser supplies [9], Z-pinch supplies [10].

Introduced topology exhibits a unique property of

magnetic system size reduction. In case of serially charged

capacitors in the moment of magnetic compression

following condition has to be fulfilled:

S

T

nout

ABNdtU ⋅∆⋅=

∫

2/

0

)(

, (11)

where N is the number of turns, ∆B is the change of

magnetic field and A

S

is the magnetic core cross-section.

Because, as can be denoted from Fig. 4, the integral

voltage value is lowered through the initiating and ending

negative voltage for the same ∆U

out

smaller cross-sections

of pulse compressors can be chosen. Fig. 11 depicts output

voltage waveforms of a classical Fitch topology compared

to the proposed, modified topology. Calculations were led

for identical U

out

voltage peak values, U

C0

of 600V,

inductance and capacitor values as described in paragraph

III.B.

As can be noted from Fig. 11 for the same peak voltage

values voltage integrals will vary, that is the ration of

integral values of proposed topology to a classical Fitch

converter can be described as:

( )

67,0

5,1

)cos1(5,1

cos21

0

0

2/

0

00

2/

0

00

≈

⋅

⋅

=

−

−

∫

∫

C

C

T

C

T

C

ULC

ULC

dttU

dttU

π

π

ω

ω

(12)

In consequence the magnetic compressor material’s cross

section can be reduced with the coefficient of

approximately 0,67 when compared to classical Fitch

generator output waveforms.

V. TEST STAND CONSTRUCTION AND TEST RESULTS

Proposed topology was designed and constructed in

Laboratory of Power Electronic Converters, Szczecin

University of Technology. A 10-stage converter was

developed with a DSP control system. For the resonant

recharge modules WIMA FKP capacitors were used, a

parallel connection of two 22nF capacitors for a maximum

of 6000V for a single LC branch. A “litz” wire was used

for inductance windings in order to minimize the damping

coefficients of the system. RM14 cores were used,

measured inductance was in the range of 3,5 µH, stray

resistance (Fluke PM6304 bridge, for 100kHz) was in the

range of 10mΩ. In consequence the quality factor for a

single stage reaches 34 .As previously mentioned Ixys

Fig. 11. Half-period output voltage waveforms of a classical Fitch

converter and the proposed, modified topology.

Fig. 12. Converter construction of the modified Fitch topology pulse

power source, 10-stage construction.

IXDN 55N120 D1 IGBTs were implemented. A SMPS

charging power supply was used in order to supply driver

stages of consecutive modules. Prototype construction is

depicted in Fig. 12.

Measurements were led using LeCroy Wave Runner

6100A digital oscilloscope with PPE 20kV voltage probe

and Fluke ISM 50/10 passive current shunt. Typical

output voltage waveforms for different supply voltages are

presented in Fig. 13.

As can be denoted maximal voltage reaches

approximately 17,3kV, considering supply voltage of

600V the practical conversion factor is 2,88 per stage.

Because of poor dynamical power diode behaviour RCD

snubbers were used across IGBT transistors. Difference

between theoretical and practical voltage multiplication

factor is caused mainly by transistor losses, limited quality

factor and supply voltage distribution among consecutive

stages.

Fig. 13. Typical output voltage waveforms for different supply voltages,

10-stage construction.

Fig. 14. Single stage magnetic compression output waveforms.

A single stage magnetic compressor circuit was

implemented with following parameters: C

k

= 1,466 nF,

L

k(initial)

= 1,21 mH. Fig. 14 depicts measured output

voltage and current waveforms.

Spark gap switches were used as plasma load, voltage

rise time ratings were improved with the factor of

approximately 2,3, which is comparable to results

obtained in [11]. Digital oscilloscope registered rise time

values (10% - 90% of the waveform amplitude) shown an

improvement from 690 ns for the voltage rising slope

before the magnetic compressor to 300ns after

compression, better results are obtainable when dedicated

nanocrystalline or amorphous materials can be used [12].

VI. SUMMARY AND CONCLUSIONS

Paper presented introduces a modified, solid state Fitch-

generator topology with increased voltage conversion

factor and improved output voltage form in terms of

magnetic pulse compression circuit dimensions. Test stand

analysis proved the voltage conversion factor of 2,88 and

magnetic pulse compression circuit material’s cross

section minimization by the factor of 0,67. Both analytical

description and test results had proven the correctness of

converter construction concept.

Power, solid state switch dynamical parameters

influence on system’s efficiency is discussed as both

simplified energy loss approach and quality factor

discussion. Both analytical discussion (Fig. 6) and

measurements led had proven that dynamical transistor

parameters influence strongly the overall energy

efficiency of the converter, used IXYS transistors, with

their nominal t

r

=70ns belong to the group of fast

switching devices, however much faster switches are

reported in literature (IXYS DE475-102N21A, Infineon

SPP20N65C3) but are hard to find on the market and are

relatively expensive.

Considering control circuitry special attention has to be

taken because of high voltages and surge voltage output,

light-fibre control signal transmission and carefully

designed charging voltage supply are necessary.

Main drawbacks of the topology used include both the

number and necessary quality of passive resonant

construction elements. Moreover fast power switches have

to be used with possibly large collector-emitter blocking

voltage ratings. Poor dynamical diode behaviour implies

the use of additional snubber circuitry therefore

minimizing the voltage conversion factor. Great attention

has to be used in order to achieve possibly high circuit

quality factor ratings, careful design and precise

construction are necessary.

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