ArticlePDF Available

Design and Implementation of Efficient CIC Filter Structure for Decimation

Authors:

Abstract and Figures

This paper presents a double sharpened CIC decimation filter, which consists of generalized comb filter as first stage, sharpened comb filter as second and third stage. The comb decimation filter at the first stage operates at the input sampling rate, sharpened second stage operates at lower sampling rate as compared to first stage and sharpened third stage operates at lower than the first and second stages. This reduces the sampling at every stage of the three stage CIC decimation filter. The sharpened second stage produces the narrow passband droop and better stop band alias rejection. This narrow passband droop will be compensated with the help of third stage which is sharpened section. This filter structure is designed in MATLAB Simulink environment and implemented with help of Virtex-V XC5VLX110T-3ff1136. Device utilization and simulation results are tabulated.
Content may be subject to copyright.
International Journal of Computer Applications (0975 8887)
Volume 65 No.14, March 2013
1
Design and Implementation of Efficient CIC Filter
Structure for Decimation
P. Durai Saravanan
PG Student / ME Computer and Communication
Ganadipathy Tulsi’s Jain Engineering College
Vellore, Tamilnadu, India
V. Jayaprakasan
Professor / Department of ECE
Ganadipathy Tulsi’s Jain Engineering College
Vellore, Tamilnadu, India
ABSTRACT
This paper presents a double sharpened CIC decimation filter,
which consists of generalized comb filter as first stage,
sharpened comb filter as second and third stage. The comb
decimation filter at the first stage operates at the input
sampling rate, sharpened second stage operates at lower
sampling rate as compared to first stage and sharpened third
stage operates at lower than the first and second stages. This
reduces the sampling at every stage of the three stage CIC
decimation filter. The sharpened second stage produces the
narrow passband droop and better stop band alias rejection.
This narrow passband droop will be compensated with the
help of third stage which is sharpened section. This filter
structure is designed in MATLAB Simulink environment and
implemented with help of Virtex-V XC5VLX110T-3ff1136.
Device utilization and simulation results are tabulated.
Keywords
MATLAB Simulink, Xilinx Virtex-V, CIC Filter, Filter
sharpening.
1. INTRODUCTION
The use of non-recursive filter structures has been increasing
in the recent years for various applications. This is due to the
low power consumption and increase in the circuit speed,
especially when the decimation factor and the filter order are
high. The frequency response of CIC (Cascaded-integrator
comb) decimation filter with various techniques has been
reported in the past few decades by many researchers [1-12].
In 1981, Eugene Hogenauer [12] proposed a class of digital
filter for interpolation and decimation that requires no
multipliers and use limited storage hereby leading to more
economical hardware implementations. They are designated
as cascaded integrator-comb (CIC) filter, because structure
consists of an equal number of integrator section operating at
the high sampling rate and a comb section operating at the
low sampling rate.
A low power fifth order decimation comb filter with
programmable decimation ratio (16 and 8) and sampling rate
(128 MHz and 44.8 GHz) for GSM and DECT application
have been proposed by Y.Gao et al [3]. The low power
consumption is achieved by following approaches. First the
non-recursive architecture for comb filter is employed, second
unnecessary computations eliminated with polyphase
implementation of each stage and third each polyphase
components implemented with data-broadcast structure.
H. Aboushady et al. [4] presented a multistage polyphase
structure with maximum decimation factor in the first stage
has been used. The proper choice of this first stage decimation
factor can significantly improve the power consumption, area
and maximum sampling frequency.
J. F. Kaiser and R.W. Hamming [8] describes the filter
sharpening technique based on the idea of amplitude change
function (ACF) which is restricted to symmetric non-recursive
(FIR) filters with piecewise constant passband and stopband.
A. Kwentus [5] designed and implemented a programmable
CIC multirate decimation filter structure with filter sharpening
techniques to improve the filters passband response. This
allows the first stage CIC decimation filter to be followed by a
fixed-coefficient second-stage filter rather than a
programmable filter thereby achieving a significant hardware
reduction over existing approaches. A very efficient
multistage decimation filter for a sigma-delta A/D converter
has been proposed by L.L. Presti [6]. In this structure, the
first-stage of the filter is obtained by properly rotating the
zero-pole distribution of a comb filter in z-plane and then it
can be implemented by using a recursive structure.
Several schemes have been proposed by G. J. Dolecek and
S.K.Mitra [7], [9-11] to design CIC filters with improved
magnitude response. The authors proposed a different
structure that consists of a comb section and a sharpening
comb section with the latter section operating at a lower rate
than the high input rate for the realization of comb-decimation
filter with a sharpened magnitude response. Applying
sharpening to the decimation filter in the last stage provides
very good results, saving in number of operations comparing
to the case of sharpening of complete filter. The main idea of
this paper is to integrate the advantages of the structures
presented in order to obtain the structure that can operate at a
lower sampling rate while achieving better performances than
the original comb filter based structure.
2. CASCADED INTEGRATOR COMB
FILTER
Cascaded integrator comb [1] or Hogenauer filter, are
multirate filters used for realizing large sample rate changes in
digital systems. CIC filters are multiplierless structures,
consisting of only adders and delay elements which is a great
advantage when aiming at low power consumption. So the
CIC filters are frequently used in digital down converter and
digital up converters. The CIC filter is a class of hardware
efficient linear phase FIR digital filter consists of an equal
number of stages of ideal integrator and comb filter pairs. The
highly symmetric structure of this filter allows efficient
implementation in hardware. However the disadvantage of a
CIC filter is that is passband is not flat, which is undesirable
in many applications. This problem can be overcome through
the use of compensation filter. CIC filter achieve sampling
rate decrease (decimation) without using multiplication. The
CIC filter first performs the averaging operation then follows
it with the decimation.
The transfer function of the CIC filter in z-domain is given as
[1].
International Journal of Computer Applications (0975 8887)
Volume 65 No.14, March 2013
2
1
1
11
)( z
z
M
zH M
(1)
Where, M is the decimation factor
In equation (1) the numerator (
M
z
1
) represents the transfer
function of comb and the denominator 1/ (
1
1
z
) indicates
the transfer function of integrator.
Fig. 1 Structure of first order CIC filter
Figure 1 shows the first order CIC filter; here the clock
divider circuit divides the oversampling clock signal by the
oversampling ratio, M after the integrator stage. The
integrator operates at the input sampling frequency, while the
differentiator operates at down sampled clock frequency fs /M.
By operating at differentiator at the lower sampling rate the
power consumption is achieved.
A magnitude characteristic of the comb filter is improved by
cascading [3] several identical comb filters which is shown in
Figure 2. The transfer function of multistage comb filter
composed of identical single stage comb filter is given by,
K
M
z
z
M
zH
1
1
11
)(
(2)
The magnitude response of this filter is given by
K
jM
M
eH
)2/sin( )2/sin(
1
)(
(3)
Fig. 2 Structure of CIC filter with K stages
Fig.3 Response of CIC filter with different K values
Figure 3 shows the frequency response of CIC filter for
different stages, while increasing the K values passband droop
decreases and stopband attenuation increases.
2.1 CIC filter for sample rate Conversion
The CIC filters are utilized in multirate systems for
constructing digital up converter and down converter. The
ability of comb filter to perform filtering without
multiplication is very attractive to be applied to high rate
signals; moreover CIC filters are convenient for large
conversion factor, since the low pass bandwidth is very small.
In multistage decimators with large conversion factor, the
comb filter is the best solution for first decimation stage,
whereas in interpolation, the comb filter is convenient for the
last stage.
2.2 CIC filter for decimation
The basic concept of CIC filter is given in Figure 4, which
consists of factor of M down sampler and K-stage CIC filter.
Applying third identity, the factor of M down sampler is
moved and placed behind the integrator section and before the
comb section as shown in Figure 5. Finally the CIC decimator
is implemented as a cascade of K integrator, factor of M down
sampler and the cascade of K differentiator sections. The
integrator portion operates at the input data rate, whereas the
comb portion operates at M time’s lower sampling rate.
3. PROPOSED WORK
3.1 Proposed CIC filter design
The design of CIC filter depends three parameters; they are
decimation factor ‘M’, number of stages ‘K’ and delay in
comb section. The structure proposed in this paper is shown in
Figure 6 which consists of three stages. By applying
sharpening technique in the second stage and third stage will
improve the passband droop compared to existing CIC filter
structures.
International Journal of Computer Applications (0975 8887)
Volume 65 No.14, March 2013
3
Fig.4 Cascade of CIC filter and down sampler
Fig.5 Cascade of integrator section, down-sampler and comb section
First Stage Second Stage (Sharpened) Third Stage (Sharpened)
Fig.6 Proposed CIC filter structure
Filter sharpening [3] is the technique to improve the passband
droop and stopband attenuation using multiple realization of a
low order basic filter having the form.
K
p
m
k
p
n
mn fH
kn kn
fHfH )](1[
!! !)(
)()( 0
1
(4)
where, Hp(f) is a low order basic filter, n and m are non-
negative integers represent the number of non-zero
derivatives of Hnm(f) at points Hnm(f) = 0 and Hnm(f) = 1
respectively.
The Kaiser-Hamming sharpening technique applied to linear-
phase FIR filters with group delay of D samples has the
transfer function of H11(z), for n=1; m=1 can be written as
)](23[)()( 2
11 zHzzHzH p
D
p
(5)
The term [3z-D 2 Hp(z)] is responsible for passband droop
reduction and Hp(z)is responsible for stopband rejection.
The magnitude response of the sharpened filter [13] is
(6)
The generalized transfer function of CIC filter can be written
as
)()()()( 211 321 MMM zHzHzHzH
(7)
Where,
1
1
11
11
)( 1
z
z
M
zH M
1
21
11
11
)(
2
2M
MM
Mz
z
M
zH
21
21 1
11
)(
3
3MM
M
MM
z
z
M
zH
(8)
The decimation factor M is subdivided in to M1, M2 and M3.
The magnitude response is
)2/(sin )2/(sin1
)( 1
1
1
M
M
eH j
)2/(sin )2/(sin1
)(
1
21
2
21M
MM
M
eH Mj
)2/(sin )2/(sin1
)(
213
321 MMM
M
eH MMj
(9)
Transfer function of proposed CIC filter structure  is
given by
})]([2)]([3{
})]([2)]([3{
)]([)(
3
3
2
3
3
2
2
2
1
2121
11
K
MM
K
MM
K
M
K
M
L
PS
zHzH
zHzH
zHzH
(10)
where, is the number of stages in corresponding filter.
International Journal of Computer Applications (0975 8887)
Volume 65 No.14, March 2013
4
Fig.7 Realization of proposed CIC filter structure
Figure 7 shows the detailed implementation scheme of
proposed CIC filter structure. The first stage is comb
decimator with decimation factor M1 which can be realized in
either recursive or non-recursive scheme. As a result second
stage (sharpened section) is moved to a lower rate which is
M1 times lower than the input rate. Further the output of the
second stage will be again sharpened by third stage. This will
improves the passband droop performance compared to
existing structure.
3.2 Implementation of Proposed CIC filter
design
The recent advancement in the VLSI technology particularly
in FPGA as made possible, the realization of advanced Digital
Signal Processing algorithm in high frequency domain. With
this development a single chip solution is possible for
complex DSP based applications like, ADC, Decimation and
Interpolation in the communication system. Digital
implementation couples with signal processing algorithms
greatly enhance the system performance, reduced the cost and
increase the reliability of the system. Low power DSP systems
are implemented by changing the sampling clock for each
subsystem depending on the real requirements. The sampling
rate change results in aliasing; this necessitates the use of
filters to overcome it. So in this paper we discuss the
implementation of improved passband droop performance
three stage CIC filter.
The initial model was designed and tested in Simulink, a
software package from The Mathworks for modeling,
simulating and implementing the dynamic systems. The
Figure 9 shows the Simulink model of the proposed CIC filter
structure. This Simulink model is used as the reference model
for synthesis of the design in FPGA. To target the module for
FPGA, we choose to use Xilinx System Generator, which
provide a Simulink blockset that is then converted to Verilog
for synthesis and implementation this flow chart is shown in
Figure 8.
Fig. 8 FPGA Synthesis Flow
4. SIMULATION AND SYNTHESIS
RESULTS
Simulation results obtained by using the proposed CIC
decimation filter with sharpening technique in the second
stage and third stage. In order to compare the results with the
classical comb filter we found the equivalent number of the
stages of the classical comb filter of the length. In the first
stage we have a comb filter of length M1with L stages. In the
second and third stages we have the sharpened comb filter of
length M2 and M3 with K stages.
][nx
x
F
First stage
1
M
L
zH )]([ 1
-2
3
K
zH )]([ 3
2/)1( 3KN
z
Sharpened Third
Stage
K
zH 2
3)]([
3
M
-2
3
K
zH )]([ 2
2/)1( 2KN
z
Sharpened Second Stage
K
zH 2
2)]([
2
M
y[m]
Fy = Fx/M
International Journal of Computer Applications (0975 8887)
Volume 65 No.14, March 2013
5
Fig. 9 Implementation Structure of Proposed CIC Filter
(a) Overall magnitude responses
(b) Passband zooms
(c) Stop band response around the first null
Fig. 10 Magnitude responses plots for M=16, M1=2, M2=2, M3=4 with K=2 and L=4
International Journal of Computer Applications (0975 8887)
Volume 65 No.14, March 2013
6
(a) Overall magnitude responses
b) Passband zooms
(c) Stop band response around the first nul
Fig. 11Magnitude responses plots for M=16, M1=2, M2=2, M3=4 with K=4 and L=8
The magnitude response for the following decimation filters
using matlab has been computed and given. The magnitude
response of the developed proposed CIC filter structure, for
M=16 with different K and L values are computed and
compared with existing CIC structure. Figure 10 and 11
shows the magnitude response of (M=16, M1=2, M2=2,
M3=4) proposed CIC filter is compared with existing CIC [1]
modified sharpened CIC filter [7], where the passband and
stopband aliasing are emphasized.
Table 1 shows the device utilization summary of basic CIC,
modified CIC and Proposed CIC structure. Compared to basic
CIC and modified CIC filter structure, the proposed structure
utilizes additional hardware components (37% approximately)
and the power consumed also high compare with the exiting,
but the proposed structure gives 62% improvement in
passband droop performance.
5. CONCLUSION
The non-recursive three stage CIC filter structure was
designed and implemented with help of FPGA kit Virtex-V
and simulation results are graphed and tabulated. The
evaluation shows that improved in the passband droop
performance of the designed CIC filter as compared to
existing filter structure. The implementation result shows the
device utilization summary of the designed filter structure.
This filter is suited for DSP based applications where the best
Passband performance required.
International Journal of Computer Applications (0975 8887)
Volume 65 No.14, March 2013
7
Table -1 Overall Comparison of Proposed CIC Performance with existing
Filter
M
M1
M2
M3
K
L
Number
of
Slice
Registers
Number
of
Slice
LUTs
Number
of
fully
used
LUT-FF
Pairs
Number
of
bonded
IOBs
Passband
Droop
(dB)
Stopband
Droop
(dB)
CIC [1]
16
2
97
53
53
33
-0.111
-46.867
Modified
Sharpened CIC
[7]
16
4
4
2
4
353
1039
327
29
-0.017
-84.225
Proposed CIC
16
2
2
4
2
4
562
1649
521
29
-0.00638
-82.225
Difference value with existing in percentage
37
37
37
- 2
Passband Droop Improvement in Percentage
62
CIC [1]
16
4
161
85
85
33
-0.223
-93.74
Modified
Sharpened CIC
[7]
16
4
4
4
8
669
1409
574
31
-0.041
-177.92
Proposed CIC
16
2
2
4
4
8
1010
3085
962
29
-0.02
-174.5
Difference value with existing in percentage
34
54
40
-4
Passband Droop Improvement in Percentage
51
6. REFERENCES
[1] E. B. Hogenauer, “An economical class of digital filters
for decimation and interpolation,” IEEE Trans. Acoust.
Speech, Signal Process., vol. ASSP-29, no. 2, pp. 155
162, Apr. 1981.
[2] S. K. Mitra, Digital Signal ProcessingA Computer
Based Approach, 2nd ed. New York: McGraw-Hill,
2001.
[3] Y.Gao, L. Jia, and H. Tenhunen, “A fifth-order comb
decimation filter for multistandard transceiver
applications,” in Proc. IEEE Int. Symp. Circuits and
Systems, Geneva, Switzerland, May 2000, pp. III-89III-
92.
[4] H. Aboushady, Y. Dumonteix, M. M. Loerat, and H.
Mehrezz, “Efficient polyphase decomposition of comb
decimation filters in Sigma-Delta analog-to-digital
converters,” IEEE Trans. Circuits Syst. II, Analog Digit.
Signal Process, vol. 48, no. 10, pp. 898903, Oct.2001.
[5] Kwentus, Z. Jiang, and A. Willson Jr., “Application of
filter sharpening to cascaded integrator-comb decimation
filters,” IEEE Trans. Signal Process., vol. 45, no. 2, pp.
457467, Feb. 1997.
[6] L. L. Presti, “Efficient modified-sinc filters for sigma-
delta A/D converters,” IEEE Trans. Circuits Syst. II,
Analog Digit. Signal Process, vol. 47, no. 11, pp. 1204
1213, Nov. 2000.
[7] GordanaJovanovic-Dolecek and Sanjit K Mitra,”A New
Two-Stage Sharpened Comb Decimator”, IEEE Trans.
On Circuits and Systems, vol. 52, pp. 1414-1420, July
2005
[8] J. F. Kaiser and R. W. Hamming, “Sharpening the
response of a symmetric nonrecursive filters,” IEEE
Trans. Acoust. Speech, Signal Process, vol. ASSP-25,
no. 3, pp. 415422, Oct. 1977.
[9] GordanaJovanovic-Dolecek and Sanjit K Mitra,
“Sharpened comb decimator with improved magnitude
response”, IEEE Trans. Acoust. Speech, Signal Process,
vol. ASSP-2, pp. 929-932, 2004.
[10] GordanaJovanovicDolecek and Fred Harris,” On Design
of Two-Stage CIC Compensation Filter”, IEEE
International Symposium on Industrial Electronics (ISlE
2009) Seoul Olympic Parktel, Seoul, Korea, pp. 903-908,
July 5-8, 2009
[11] Alfonso Fernandez-Vazquez and Gordana Jovanovic
Dolecek,” Maximally Flat CIC Compensation Filter:
Design and Multiplierless Implementation”, IEEE
Transactions on Circuits and Systems-II; Express briefs,
Vol.59, No.2, pp.113-117, February 2012
7. AUTHORS’ PROFILE
P.DuraiSaravanan received his Bachelor’s Degree in
Electronics and Communication Engineering from Madras
University, Chennai, India in the year 2001. He has 10 years
industrial experience in an electronics based industry.
Presently he is pursuing Master Degree in Computer and
Communication Engineering in Anna University, Chennai,
India. His areas of interest are Wireless communication and
Signal Processing.
V.Jayaprakasan received his Bachelor’s Degree in
Electronics and Communication Engineering from
Bharadhidasan University, Tiruchirappalli, India in the year
1999 and Master’s Degree in Communication Systems from
Anna University, Chennai, India in the year 2006. He has
started his teaching profession in the year 2006 in
Ganadipathy Tulsi’s Jain Engineering College, Vellore.
Earlier he has 11 years industrial experience in an electronics
based industry. At present he is a Professor in Electronics and
Communication Department. He has published 1 research
papers in International Journals and 2 research papers in
International Conferences. His areas of interest are Wireless
communication, Networking and Signal Processing. He is a
life member of ISTE.
... This combination makes the CIC decimation component followed by the FIR decimation filter. In order to build a structure that can operate at a lower sampling rate while achieving better performances, a double sharpened CIC decimation filter has been presented [7]. This proposed filter consists of three cascading stages as follows: the first stage is the comb decimation filter that handles at the input sampling rate. ...
... Usually, this filter is used in multi-modulated digital signal processing as well as in interpolation and decimation. Unlike conventional FIR filters, CIC filters have two sections called integrator and comb sections, which perform simultaneously the digital low pass filtering and decimation operations [7,8]. ...
Article
The cascaded integrator comb (CIC) filters are characterized by coefficient less and reduced hardware requirement, which make them an economical finite impulse response (FIR) class in many signal processing applications. They consist of an integrator section working at the high sampling rate and a comb section working at the low sampling rate. However, they don’t have well defined frequency response. To remedy this problem, several structures have been proposed but the performance is still unsatisfactory. Thence, this paper deals with the improvement of the CIC filter characteristics by optimizing its sampling rate. This solution increases the performance characteristics of CIC filters by improving the stopband attenuation and ripple as well as the passband droop. Also, this paper presents a comparison of the proposed method with some other existing structures such as the conventional CIC, the sharpened CIC, and the modified sharpened CIC filters, which has proven the effectiveness of the proposed method.
... Pecotic, M.G. et al. [20] presented a method for the design of finite-impulseresponse CIC compensators whose coefficients are expressed as the sums of powers of two (SPT) based on the minimax error criterion to improve these characteristics. Recently, the paper [21] presents a double sharpened CIC decimation filter to compensate the narrow passband droop and to achieve better stop band alias rejection. ...
... Pecotic, M. G. et al. [18] presented a method for the design of finite-impulse-response CIC compensators whose coefficients are expressed as the sums of powers of two (SPT) based on the minimax error criterion to improve these characteristics. Recently, the paper [19] presents a double sharpened CIC decimation filter to compensate the narrow passband droop and to achieve better stop band alias rejection. ...
Article
Full-text available
Abstract—In many communication and signal processing systems, it is highly desirable to implement an efficient narrow-band filter that decimate or interpolate the incoming signals. This paper presents hardware efficient compensated CIC filter over a narrow band frequency that increases the speed of down sampling by using multiplierless decimation filters with polyphase FIR filter structure. The proposed work analyzed the performance of compensated CIC filter on the bases of the improvement of frequency response with reduced hardware complexity in terms of no. of adders and multipliers and produces the filtered results without any alterations. CIC compensator filter demonstrated that by using compensation with CIC filter improve the frequency response in passed of interest 26.57% with the reduction in hardware complexity 12.25% multiplications per input sample (MPIS) and 23.4% additions per input sample (APIS) w.r.t. FIR filter respectively. Keywords—Multirate filtering, Narrow-band Signaling, Compensation Theory, CIC filter, Decimation, Compensation filter.
Article
In a communication receiver, an efficient narrow-band filter plays a significant role that can decimate the incoming signals with proper filtering operation. The cascade integrator comb (CIC) works as a high-speed decimation filter for the anti-aliasing process. This paper focuses on a reconfigurable CIC decimator with pruning characteristics that reduce the hardware resources. Also, applying the partitioning method in the decimator factor can reduce the computation time significantly. The modified CIC decimators are simulated using Xilinx ISE 14.7 and then, synthesized the bit streams have been downloaded on Virtex-5 FPGA board to target the XC5VLX50T device. The performance has been analyzed concerning the number of stages and the decimation factors. The proposed three-stage CIC decimator saves the slice registers and power up to 39.84% and 16.17% respectively, as compared to similar types of architectures.
Chapter
This decimation introduces the replicas of the main signal spectrum. If the signal is not properly filtered, the overlapping of the repeated replicas of the original spectrum, called aliasing, may occur. The aliasing may destroy the useful information of the decimated signal and must be eliminated by the filter which precedes the decimation, called decimation filter. The most popular decimation filter is a comb filter, usually used in the first stage of decimation. However, its magnitude characteristic is not flat in the pass band of interest and there is not enough attenuation in the folding bands. Different methods are proposed to improve comb magnitude characteristic. This chapter presents an overview of methods for simultaneous improvement of comb magnitude characteristic in both: pass band and folding bands. The methods are divided into three main groups: sharpening-based methods, corrector-based methods, and methods based on the combination of alias rejection and compensator design methods.
Conference Paper
Full-text available
A new structure for the realization of a comb decimation filter with a sharpened magnitude response is advanced. The proposed structure consists of two main sections: a comb section and a sharpening comb section with the latter section operating at a lower rate than the high input rate. Using a polyphase decomposition, the sub-filters of the first section can also be operated at this lower rate. The improved magnitude response has been obtained by using the filter sharpening approach of J.F. Kaiser and R.W. Hamming (see IEEE Trans. on Acoustics, Speech, and Sig. Process., vol.ASSP25, p.415-22, 1977). The proposed filter has much less passband droop and better attenuation than the equivalent comb filter.
Conference Paper
Full-text available
A power efficient multi-rate multi-stage Comb decimation filter for mono-bit and multi-bit ΣΔ A/D converters is presented. Polyphase decomposition in all stages, with high decimation factor in the first stage, is used to significantly reduce the sampling frequency of the Comb filter. Several implementations indicate that proper choice of the first stage decimation factor can considerably improve power consumption, area and maximum sampling frequency. In multibit ΣΔ A/Ds, this optimum first stage decimation factor is function of the input wordlength
Article
Full-text available
In this paper, a method to design and implement a very efficient multistage decimation filter for a sigma-delta (ΣΔ) A/D converter is proposed. The scheme is composed of two stages, but the proposed method can be easily extended to a multiple-stage implementation. The first-stage filter is obtained by properly rotating the zero-pole distribution of a comb filter in the z-plane. The obtained structure exhibits linear phase and can be implemented by using a recursive structure with only two multipliers. The design phase is easy and very flexible. As most of the quantization noise is eliminated at the first stage, the second-stage filter can be designed with relaxed specifications. Any classical design algorithm can be used for it. An alternative scheme for the second stage can be obtained by splitting the stage into two substages, and the method proposed in this paper can be iterated.
Article
A general theory has been developed which shows how to interconnect multiple instances of the same filter H using only gain factors, adders, and delay elements to achieve an overall filter performance meeting much tighter specifications. The method assumes that all instances of the filter H are identical (exactly true for the digital filter case), that this filter H has a symmetric pulse response, and that the filter magnitude characteristics approximate unity in the passband and zero in the stopband. A simple specialization of the method called simple symmetric sharpening is developed. The general computational efficiency of the resulting sharpened filter is compared to the best possible filter design and found to be always greater than 50%. Three different cases of implementation of the technique are described and examples given of various designs. A number of properties of the method and various extensions and applications of the procedure are outlined.
Article
This brief introduces a design and implementation of maximally flat cascaded integrator comb compensation filters. In particular, we consider second- and fourth-order linear phase filters for narrow-band and wideband compensation. Closed-form equations for the computation of the filter coefficients are given. The multiplierless implementation is also considered. The number of adders is a function of the decimation factor Dand the number of stages N. The implementation complexity is discussed, and comparisons with some methods reported in the literature are provided.
Conference Paper
This paper presents the compensation filter design for the two-stage CIC decimation filter. The goal is twofold: to avoid the integrator section at high input rate and obtain a low wideband passband droop of the overall filter. To this end the decimation is split into two stages with the cascaded less order RRS filters at each stage. The first stage can be implemented either in non recursive form or using the polyphase decomposition. The simple compensation filter and the sharpening are applied to the second section where RRS filter is implemented as a CIC filter. The resulting structure is a multiplierless and with no integrators at high input rate. Additionally, the structure exhibits a low passband droop and a high stopband attenuation.
Conference Paper
A class of digital Finite Impulse Response (FIR) filters for decimation (sampling rate decrease) and interpolation (sampling rate increase) are presented. They require no multipliers and limited storage, thus making them an economical alternative to conventional implementations for certain applications. A digital filter in this class consists of cascaded ideal integrator stages operating at a high sampling rate and an equal number of comb stages operating at a low sampling rate. Together, a single integrator-comb pair produces a uniform FIR. The number of cascaded integrator-comb pairs is chosen to meet design requirements for stopband attenuation, passband falloff and transition width.
Conference Paper
In multi-standard transceivers programmable decimation filters are required to perform channel select filtering at baseband since the channel bandwidths, sampling rates, and CNR requirements are different. This paper presents a low power fifth-order comb decimation filter with programmable decimation ratios (16 and 8) and sampling rates (12.8 MHz and 44.8 MHz) for GSM and DECT applications. The non-recursive architecture is employed for the comb filter and low power VLSI implementation techniques are developed
Article
This paper presents a new sharpened comb decimator structure consisting of a cascade of a comb-filter based decimator and a sharpened comb decimator. The proposed realization scheme allows the sharpened section to operate at a lower rate that depends on the decimation factor of the first section. Using a polyphase decomposition, the subfilters of the first section can also be operated at this lower rate.