Conference Paper

Benchmarking and Improving III-V Esaki Diode Performance with a Record 2.2 MA/cm2 Peak Current Density to Enhance TFET Drive Current

DOI: 10.1109/IEDM.2012.6479118 Conference: International Electron Device Meeting

ABSTRACT

Recently, III-V tunneling field effect transistors (TFET) for low voltage logic applications (<0.5V) have gained attention with the demonstration of sub-60 mV/dec. subthreshold slopes [1]. A key outstanding issue with TFETs is limited drive currents, due to non-optimized carrier tunneling. With that issue in mind, the aim of this work is to map III-V Esaki tunnel diode (TD) performance to engineer TDs with ultra high current densities while maintaining large peak-to-valley current ratios (PVCR). This work describes the most comprehensive experimental benchmarking of TD performance reported, including (i) GaAs, (ii) In0.53Ga0.47As, (iii) InAs, (iv) InAs 0.9Sb0.1/Al0.4Ga0.6Sb, and (v) InAs/GaSb as a function of doping and effective tunnel barrier height. These results confirm that heterojunctions (bandgap engineering) and doping will enhance peak (JP) and Zener current densities beyond homojunction TDs [3], to a record 2.2MA/cm2 (JP) and 11 MA/cm2 (@ -0.3 V), laying the fundamental groundwork for a III-V TFET at the 7 nm technology node.

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