genVHDL: Automatic HDL code generation from high-level XML based hardware specifications


In software and hardware design projects teams need to collaborate with each other by sharing their design data. When the teams are geographically apart, as is the case in new global economy, the need to share data on a daily basis becomes the norm. This paper proposes a novel scheme and implements a tool that allows sharing of hardware design data using XML based hardware specifications. This can be used as a basis for a framework for model driven architecture (MDA). Data in XML can be expressed in different forms, e.g. schematic, HDL and state machines etc, to be used by different teams. XML has more advantages than traditional documentation systems. It has standard tools support, ease of storage and retrieval, flexibility and compactness. To minimize communication traffic on internet we are using high level hardware design in XML to make it as compact as possible, without loosing much information. According to the survey this is apparently the first such effort for using XML for this purpose and implementation of this tool. A tool "genVHDL" has been designed and developed in C++ to generate VHDL code from high level XML based hardware specifications. This can be used as runtime or compile time code generation tool. The code generated has been successfully synthesized for digital circuits. A basic digital logic components library has also been implemented. This is to show that XML has the potential of becoming a vehicle for documenting high level hardware specifications. Using XML it will be easier to store, retrieve, manipulate and provide shared access to data. Currently the tool only supports VHDL code generation but it can be extended to add support for other HDL and other forms. It can easily be integrated into other tools or applications, unlike other scripting languages which need a script engine.

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Available from: Shahid Alam
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