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Intrinsic resistive switching and memory effects in silicon oxide

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Resistive switching behaviors are described in silicon oxide (SiOx ) systems employing vertical E/SiOx /E (E denotes the electrode) structures. The switching is largely independent of the electrode material and attributed to the intrinsic properties of SiOx . Based on the recent experimental observation (Yao et al. in Nano Lett. 10:4105, 2010) of a silicon filament embedded in the SiOx matrix, we further discuss the switching mechanism in light of the measured electrical phenomena. The set voltages are largely SiOx -thickness independent, consistent with the mechanistic picture of point switching in the silicon filament. The multi-state switching and shifts in the set voltages with respect to the reset voltages are consistent with an electrochemical redox process (Si ↔ SiOy ) at the switching site.
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Appl Phys A (2011) 102: 835–839
DOI 10.1007/s00339-011-6267-6
Intrinsic resistive switching and memory effects in silicon oxide
Jun Yao ·Lin Zhong ·Douglas Natelson ·
James M. Tour
Received: 2 November 2010 / Accepted: 22 December 2010 / Published online: 26 January 2011
© Springer-Verlag 2011
Abstract Resistive switching behaviors are described in sil-
icon oxide (SiO
x
) systems employing vertical E/SiO
x
/E(E
denotes the electrode) structures. The switching is largely
independent of the electrode material and attributed to the
intrinsic properties of SiO
x
. Based on the recent experimen-
tal observation (Yao et al. in Nano Lett. 10:4105, 2010)of
a silicon filament embedded in the SiO
x
matrix, we further
discuss the switching mechanism in light of the measured
electrical phenomena. The set voltages are largely SiO
x
-
thickness independent, consistent with the mechanistic pic-
ture of point switching in the silicon filament. The multi-
state switching and shifts in the set voltages with respect to
the reset voltages are consistent with an electrochemical re-
dox process (Si SiO
y
) at the switching site.
J. Yao
Applied Physics Program Through the Department
of Bioengineering, Rice University, 6100 Main St., Houston,
TX 77005, USA
L. Zhong (
) · D. Natelson
Department of Electrical and Computer Engineering, Rice
University, 6100 Main St., Houston, TX 77005, USA
e-mail: lzhong@rice.edu
L. Zhong · J.M. Tour
Department of Computer Science, Rice University, 6100 Main
St., Houston, TX 77005, USA
D. Natelson (
)
Department of Physics and Astronomy, Rice University, 6100
Main St., Houston, TX 77005, USA
e-mail: natelson@rice.edu
J.M. Tour (
)
Department of Chemistry, Rice University, 6100 Main St.,
Houston, TX 77005, USA
e-mail: tour@rice.edu
1 Introduction
Resistance-change materials have been extensively studied
as potential candidates for future nonvolatile memory [1].
A wide range of materials have been studied to show re-
sistive switching behaviors [2], including metal oxides [3].
While the switching mechanism is still largely unclear and
may vary in different systems, metal elements are usu-
ally considered as the active and indispensable compo-
nents constituting the conducting pathways and hence the
switching phenomena. For example, metal-filament forma-
tion and ionic-state change are two of the commonly pro-
posed causes [3]. For this reason, some metal-oxide systems
even rely on further metal doping for the formation of resis-
tive switching [3, 4]. This focus on metal elements may have
contributed to the comparatively little attention paid to the
most prevalent oxide, SiO
x
, as a candidate for resistance-
change memory. While some programmable metallization
memory cells have involved SiO
x
, the memory effect is ex-
trinsic to SiO
x
, as the oxide merely serves as the solid elec-
trolyte glass matrix for the mobile metal ions [5].
In fact, the idea of extrinsic switching in SiO
x
by metal
injection from the electrodes has been largely unchanged
since the first observation of resistance-change phenomena
in silicon monoxide (SiO) [6], and was frequently revived in
metallic nanogap systems residing on SiO
2
substrates [7].
The lack of consideration of potential intrinsic electrical
phenomena from SiO
x
itself further lead to proposals of
electromechanical/electrochemical switching from the elec-
trodes in various nanogap systems on SiO
2
substrates [8, 9].
Recently, however, we revealed electrode-independent re-
sistive switching behaviors in various E–SiO
x
–E systems,
with the electrode materials ranging from metals to semi-
conductors, amorphous carbon and even carbon nanotubes
(CNTs) [10]. This depicted a picture of intrinsic switching
836 J. Yao et al.
Fig. 1 Electrical characterizations in E/SiO
x
/E devices. (a) Sche-
matic of the structure of E/SiO
x
/E vertical cell and its electrical
characterization setup. (b) IV curves in a formed TiW/SiO
x
/TiW
(120 nm/40 nm/120 nm) device. The numbers beside the curves in-
dicate the voltage sweep order and the black arrows indicate the
sweep directions. Inset shows 80 consecutive IV curves from a
polySi/SiO
x
/polySi (70 nm/40 nm/70 nm) vertical device. (c)Mem-
ory cycles in a TiW/SiO
x
/TiW device using +5V,+ 12 V, and + 1V
as set, reset, and read voltages, respectively. The set and reset currents
are not shown here
solely from SiO
x
. Following this implication, we demon-
strated resistive switching in a metal-free SiO
x
system us-
ing polycrystalline silicon (polySi) as the electrode ma-
terial [11]. Furthermore, by examining a localized CNT
SiO
x
–CNT switching system using transmission electron
microscopy, we visualized the conduction path—an aligned
pathway of silicon nanocrystals—embedded in the amor-
phous SiO
x
matrix, providing direct evidence for and in-
sights in the switching process intrinsic to SiO
x
[11]. This
intrinsic switching renders SiO
x
an attractive material for
constructing resistance-change memory, as SiO
x
is one of
the most frequently used materials in the semiconductor in-
dustry, and hence enables fully CMOS-compatible process-
ing. Here we further discuss the resistive switching behav-
iors in SiO
x
and their implications to the mechanism.
2 Experimental
The tested memory cells were typical capacitor-like struc-
tures, each with the thin SiO
x
layer sandwiched between
the top and bottom electrodes (see schematic in Fig. 1a).
The diameters of the cells were 50 µm for an easy probe-tip
landing. TiW and polySi were used as electrode materials to
form TiW/SiO
x
/TiW and polySi/SiO
x
/polySi (x 1.9–2)
sandwiched structures. The TiW layers (120 nm thick) were
grown by physical vapor deposition method. The polySi lay-
ers (70 nm thick) were grown by plasma enhanced chemical
vapor deposition (PECVD) method, followed by low-energy
boron implantation to achieve a resistivity 0.005 cm.
The SiO
x
layers were also grown by the PECVD method.
Standard photolithography and lift-off methods were used
to define a layer (40 nm thick) of circular chromium pat-
terns (50 µm in diameters) as the sacrificial mask. Reactive-
ion etching (SF
6
for polySi etching and CHF
3
/O
2
for both
TiW and SiO
x
etching) was then used to etch away the
top-electrode layer and the SiO
x
layer, leaving the regions
underneath the circular chromium patterns protected. The
chromium layer was then dissolved in a chromium etchant
(CEP-200). Electrical characterizations were performed at
room temperature in a vacuum (10
5
Torr) probe station
connected to an Agilent 4155C semiconductor parameter
analyzer.
3 Results and discussion
Figure 1b shows the typical current-voltage (IV) curves in a
formed TiW/SiO
x
/TiW (40 nm SiO
x
) device, demonstrat-
ing unipolar switching behaviors. Unlike some other unipo-
lar systems [1, 2], here the set voltage has a lower magnitude
than the reset voltage; starting from a high-resistance (OFF)
state, a sudden conductance increase (the set process) begins
at 3.5 V. A less abrupt conductance decrease in the low-
resistance (ON) state begins at a higher voltage (5.5V),
defining the reset region. Nonvolatile memory states be-
tween ON and OFF can be written to the device by volt-
age pulses of corresponding magnitudes in the set and reset
regions (see the memory cycle in Fig. 1c). Pulse width as
narrow as 100 ns is achievable [11].
It should be noted that while the metal elements in the
electrodes are susceptible to potential metal-migration re-
lated switching, the electrical behavior here is attributed
solely to the SiO
x
layer. Programmable metallization mem-
ory using SiO
x
as solid electrolyte features bipolar switch-
ing behavior [5], as opposed to the unipolar behavior here.
This can be further confirmed by replacing the electrode
material with nonmetals. The same switching behaviors
Intrinsic resistive switching and memory effects in silicon oxide 837
were observed in a metal-free polySi/SiO
x
/polySi (40 nm
SiO
x
) system (see inset in Fig. 1b) and other planar carbon-
electrode SiO
x
systems [10]. The visualization of a sili-
con nanocrystalline pathway (silicon filament) embedded
in the SiO
x
matrix revealed the intrinsic cause of resistive
switching in SiO
x
: the oxide feeds the formation of the sil-
icon filament as well as providing the solid supporting ma-
trix [11]. Like in many metal-oxide based resistive switch-
ing systems [3], a forming process is needed to transform
the pristine non-conducting state into the switching state in
SiO
x
. From the atomic structural point of view, the forming
process is to strip away some oxygen atoms and enrich the
silicon atoms locally to form silicon filament. The forming
process here involves voltage sweeps to a high value to in-
duce an initial soft breakdown locally in the SiO
x
layer [11].
In particular, as the etched vertical SiO
x
edge is more de-
fective or more susceptible to initial soft breakdown, the
switching was revealed to be localized at the vertical SiO
x
edge [11, 12]. Thermal annealing (600°C for 5 min) in vac-
uum (100 mTorr) was found to facilitate the electroforming
process as it induced an easier soft breakdown, and hence
was adopted in these vertical structures prior to electrical
characterizations.
While the visualization of the silicon filament provides
substantial insights into the intrinsic switching in SiO
x
,
the dynamics of the switching process is not yet revealed.
Conductance modulation by trapped charges in quasi-one-
dimensional semiconductors can cause memory effects in
a two-terminal configuration [13, 14]. Nevertheless, the
charging and discharging processes usually require differ-
ent voltage polarities, and hence result in bipolar switching
behavior [14], as opposed to the unipolar one observed here.
Memory states were recorded after the devices sat in an am-
bient environment for three months (Fig. 2). The good air
stability further indicates that the switching is unlikely to
be charge-based. Consequently, a voltage-driven structural
change in the silicon filament is more likely to be the cause.
In this regard, we varied the thickness of the SiO
x
layer,
to vary the length of the silicon filament, to study the effect
on the electrical behaviors. Vertical devices with SiO
x
layer
thickness ranging from 10 nm to 200 nm were fabricated and
electroformed to switching states. The threshold set voltage
(V
th
, defined as the voltage value at which the set process
begins) trend with respect to SiO
x
thickness is plotted in
Fig. 3a. It shows largely thickness-independent behaviors,
with the V
th
concentrated between 3.5 and 4 V. This weak
SiO
x
-thickness dependence or filament-length dependence
supports the mechanistic picture of point switching in the
filament (see illustration in Fig. 3b): for the large OFF resis-
tance, the set voltage drops mainly across the broken point
in the filament regardless of the filament length. The V
th
also seems to indicate an intrinsic threshold voltage value
at which some silicon conversion/transfer process begins to
Fig. 2 Memory state retention in polySi/SiO
x
/polySi devices. (a)ON
states from 22 individual devices after 3 months in ambient environ-
ment. (b) OFF states from 22 individual devices after 3 months in am-
bient environment. Inset shows reading cycles for different memory
states, with each symbol indicating each different memory state. The
memory states were recorded by voltage pulses at a rate of 1 read per
sec. All the memory states were read at +1V
Fig. 3 (a) V
th
from devices with different SiO
x
thicknesses. Data
points at 40 nm, 80 nm, 160 nm and 200 nm were collected from
TiW/SiO
x
/TiW structures, while data points at 10 nm and 20 nm were
collected from polySi/SiO
x
/polySi structures. The reset voltages were
at +12 V (+10 V for the 10 nm devices to avoid hard breakdown in
the SiO
x
layer). (b) Schematics of ON and OFF states resulting from a
point switching in a silicon filament embedded in the SiO
x
matrix
838 J. Yao et al.
Fig. 4 (a) IV curves of the set processes in a same TiW/SiO
x
/TiW
(40 nm SiO
x
) device. Each set IV curve was obtained after a reset
process, with different colors indicating different reset voltage values.
The black, magenta, blue,andgreen colors correspond to set IV curves
after +8V,+10 V, +12 V, and +14 V reset operations, respectively.
(b) Schematics of the valence states of silicon (or oxygen concentra-
tions) at the switching site in the filament with respect to different OFF
conduction states
heal and reconnect the broken point. It is thus likely that the
set process correlates to certain electrochemical processes
which require specific electrical potentials. As the only ele-
ments in the system are oxygen and silicon, we propose that
an electrochemical reduction process of SiO
y
Si is in-
volved in the set process to reconnect the silicon filament.
The reset process, on the other hand, is through an oxidiza-
tion process of Si SiO
y
mainly driven by current-induced
local heating, given its voltage-polarity independence and
higher voltage magnitude.
The above-proposed electrochemical redox process can
also account for the multi-level states and corresponding V
th
shifts observed in the SiO
x
devices. In the same device, a
lower magnitude in the reset voltage usually results in an in-
creased OFF conductance and it also slightly shifts the V
th
to a lower magnitude (see Fig. 4a). The conductance mod-
ulation in the OFF states by different reset values enables
the possibility of multi-bit memory [12, 15]. Meanwhile,
the device-size independence in the ON states [11] indicates
that this conductance modulation is through single or few
filaments, not a collective effect from a large number of fila-
ments. In other words, it is the structural/compositional vari-
ation at the switching point in the filament that governs the
conductance modulation. In the mechanistic picture that a
reset process is through Si SiO
y
, it is expected that the
final valence state of the Si
2y+
in SiO
y
will affect the con-
duction. More generally, a higher valence state in Si
2y+
(or
richer oxygen concentration) is likely to result in a more in-
sulating state (see illustration in Fig. 4b). A higher magni-
tude in the reset voltage should result in a more complete
oxidization process and hence lower conductance. On the
other hand, for the electrochemical process of SiO
y
Si
involved in a set process, the lower the valence state in the
Si
2y+
the less energy or electrical potential (applied volt-
age) is required for the reduction. Therefore, a decrease in
the magnitude of the reset voltage results in the shift of V
th
toward a lower magnitude as well. Note that valence states
of Si
0
,Si
+
,Si
2+
,Si
3+
, and Si
4+
were indeed observed and
identified in the SiO
x
, and the binding energy increases as
the valence state increases [16]. The stability of the various
valence states of silicon is also consistent with the robust
nonvolatile property and stability of the multi-level states
(see inset in Fig. 2b).
4 Other implications
Despite the large device sizes studied here (for the purpose
of easy testing), the observed small size of the silicon fil-
ament (d 5nm)[11] indicates promising device scaling.
Memory switching in confined SiO
x
volume was demon-
strated in vertical structures [11] or in planar structures us-
ing CNTs as electrodes [10]. Switching at dimensions below
50 nm was demonstrated in SiO
x
nanowires using graphitic
carbon as effective electrodes, although the switching was
not well understood at the time [8].
Based on the filament formation mechanism, the switch-
ing is largely independent of the SiO
x
stoichiometry. In
other words, similar switching can be induced in a variety
of SiO
x
(e.g., 1 x 2). Generally, a surface area is more
defective and more easily induced into the switching state.
This intrinsic conduction and switching from the soft break-
down in SiO
x
(SiO
2
is no exception) may even call some
molecular electronics and nanoelectronics studies into ques-
tion with respect to the actual cause for the observed electri-
cal phenomena [17], as SiO
2
is so frequently used in various
electronic devices as a nominal insulator. A detailed study
and discussion of this aspect may be found in [17].
5 Conclusion
In summary, we discussed the resistive switching behav-
iors intrinsic to SiO
x
. The SiO
x
-thickness independence or
filament-length independence in the switching voltage is
consistent with the mechanistic picture of point switching in
the silicon filament. The multi-state switching and V
th
shift
with respect to the reset voltage is further explainable by an
electrochemical redox process of Si SiO
y
at the switch-
ing site.
Intrinsic resistive switching and memory effects in silicon oxide 839
Acknowledgements D.N. acknowledges the support of the David
and Lucille Packard Foundation. L.Z. acknowledges support from the
Texas Instruments Leadership University Fund and National Science
Foundation Award No. 0720825. J.M.T. acknowledges support from
the Army Research Office (W911NF-08-C-0133), the Office of Naval
Research (N00039-10-0056) and the Air Force Office of Scientific Re-
search (FA9550-10-C-0098) through SBIR and STTR programs ad-
ministrated by PrivaTran, LLC.
References
1. R. Waser, M. Aono, Nat. Mater. 6, 833 (2007)
2. R. Waser, R. Dittmann, G. Staikov, K. Szot, Adv. Mater. 21, 2632
(2009)
3. A. Sawa, Mater. Today 11, 28 (2008)
4. M. Janousch, G.I. Meijer, U. Staub, B. Belley, S.F. Karg, B.P. An-
dreasson, Adv. Mater. 19, 2232 (2007)
5. C. Schindler, M. Weides, M.N. Kozicki, R. Waser, Appl. Phys.
Lett. 92, 122910 (2008)
6. J.G. Simmon, R.R. Verderber, Proc. R. Soc. Lond. Ser. A, Math.
Phys. Sci. 301, 77 (1967)
7. S. Furuta, T. Takahashi, Y. Naitoh, M. Horikawa, T. Shimizu, M.
Ono, Jpn. J. Appl. Phys. 47, 1806 (2008)
8. Y. Li, A. Sinitskii, J.M. Tour, Nat. Mater. 7, 966 (2008)
9. B. Standley, W. Bao, H. Zhang, J. Bruck, C. Lau, M. Bockrath,
Nano Lett. 8, 3345 (2008)
10. J. Yao, L. Zhong, Z. Zhang, T. He, Z. Jin, P.J. Wheeler, D. Natel-
son, J.M. Tour, Small 5, 2910 (2009)
11. J. Yao, Z. Sun, L. Zhong, D. Natelson, J.M. Tour, Nano Lett. 10,
4105 (2010)
12. J. Yao, L. Zhong, D. Natelson, J.M. Tour, Appl. Phys. Lett. 93,
253101 (2008)
13. X. Duan, Y. Huang, C.M. Lieber, Nano Lett. 2, 487 (2002)
14. J. Yao, Z. Jin, L. Zhong, D. Natelson, J.M. Tour, ACS Nano 3,
4122 (2009)
15. A. Beck, J.G. Bednorz, Ch. Gerber, C. Rossel, D. Widmer, Appl.
Phys. Lett. 77, 139 (2000)
16. F. Rochet, Ch. Poncey, G. Dufour, H. Roulet, C. Guillot, F. Sirotti,
J. Non-Cryst. Solids 216, 148 (1997)
17. J. Yao, L. Zhong, D. Natelson, J.M. Tour, J. Am. Chem. Soc.
(2010). doi:10.1021/ja108277r
... Most of the RS studies in Si-ncs are based on SiO x monolayers [3][4][5][6][7][8]. However, control of the size, distribution and separation of Si-ncs within SiO x monolayer structures remains a complicated issue. ...
... Nevertheless, the same trend is observed for different devices measured. The nonlinear electrical behavior and multilevel current states have been also reported in the RS behavior of SiO x monolayers [8,33]. Nevertheless, these devices exhibit unipolar RS where a lower RESET voltage produce an increased OFF conductance but the same current at the LRS [8]. ...
... The nonlinear electrical behavior and multilevel current states have been also reported in the RS behavior of SiO x monolayers [8,33]. Nevertheless, these devices exhibit unipolar RS where a lower RESET voltage produce an increased OFF conductance but the same current at the LRS [8]. Our devices show bipolar RS and a lower set voltage results in a decrease of the ON conductance and a lower RESET voltage, as observed in Fig. 6. ...
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