Conference Paper

A New Low Power High Performance Flip-Flop

Department of Electrical and Computer Engineering, University of California, Davis, CA, U.S.A.
DOI: 10.1109/MWSCAS.2006.382164 Conference: Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on, Volume: 1
Source: IEEE Xplore


Low power flip-flops are crucial for the design of low-power digital systems. In this paper we delve into the details of flip-flop design and optimization for low power. We compare the lowest power flip-flops reported in the literature and introduce a new flip-flop that competes with them.

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Available from: Ahmed Tarek Sayed
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