Three-Dimensional Real-Space Simulation of Surface Roughness in Silicon Nanowire FETs

IMEP-LAHC, Grenoble INP MINATEC, Grenoble, France
IEEE Transactions on Electron Devices (Impact Factor: 2.47). 11/2009; 56(10):2186 - 2192. DOI: 10.1109/TED.2009.2028382
Source: IEEE Xplore


We address the transport properties of narrow gate-all-around silicon nanowires in the presence of surface-roughness (SR) scattering at the Si/SiO2 interface, considering nanowire transistors with a cross section of 3 times 3 nm2 and gate length of 15 nm. We present transfer characteristics and effective-mobility calculations based on a full 3-D real-space self-consistent Poisson-Schrodinger solver within the nonequilibrium Green's function formalism. The effect of SR is included via a geometrical method consisting in a random realization of potential fluctuations described via an exponential autocorrelation law. The influence on transfer characteristics and on low-field mobility is evaluated by comparison with the clean case and for different values of the root mean square of potential fluctuations. The method allows us to exactly account for mode-mixing and subband fluctuations and to evaluate the effect of SR up to all orders of the interaction. We find that SR scattering is mainly responsible for positive threshold-voltage shift in the low-field regime, whereas SR-limited mobility slowly depends on the linear charge density, showing the inefficiency of mode-mixing scattering mechanism for very narrow wires.

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Available from: M. Bescond, Sep 04, 2015
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    • "Nonequilibrium Green's function (NEGF) formalism is used for this purpose. NEGF method is widely employed to model novel FETs, such as graphene [20]–[22], carbon nanotube [23], [24], and silicon nanowire [25], [26] FETs. We study the barrier shapes broadly used in literature and the WKB approximation for a wide range of barrier thicknesses, barrier heights, and applied voltages. "
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    • "As the ON-state characteristics of a transistor are also related to their effective mobility [49], [50], the electron mobility reduction due to IRS at low drain bias should be understood in relation with the ON-current reduction at high drain bias. The low-field effective mobility in NWFETs is calculated from the electron density and the conductance using the expression [32], [33] µ eff = G lin L ch qN ch (3) where G lin is the conductance in the linear region i.e. at low drain bias (V D = 5 mV in this work) and N ch is calculated by integrating the electron density in the subsection of the channel under the gate where the electron density is nearly uniform [33] as illustrated in Fig. 11(c). Assuming that the ballistic mobility is the effective mobility for a perfect NW, the IR-limited mobility µ IR can be calculated from the Matthiessen's rule, namely, µ −1 IR = µ −1 eff,IR −µ −1 ball where µ eff,IR is the effective mobility for rough NWs. "
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