Conference Paper

A Pipeline & Bus Interface Chip For Silicon Strip Detector Read-out

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... We used a binary read-out, where only the address of channels with pulse height exceeding a common threshold is recorded. It consists of a bipolar amplifier-comparator ASIC (LBIC) [3], and a CMOS 40MHz Digital Pipeline (CPD) [4]. Details of the FEE systems can be found in Refs. ...
... Details of the FEE systems can be found in Refs. [3] and [4], here we give only the essential properties; the rise time is 22ns, the double hit resolution is 60ns, and the input noise charge as a function of external capacitance C is σ n = 700 + 32 * C [e -]. These detector modules were successfully used in a beam test at KEK to determine the sigma-to-noise ratio [4]. ...
... [3] and [4], here we give only the essential properties; the rise time is 22ns, the double hit resolution is 60ns, and the input noise charge as a function of external capacitance C is σ n = 700 + 32 * C [e -]. These detector modules were successfully used in a beam test at KEK to determine the sigma-to-noise ratio [4]. ...
Article
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We report the study of amplifier noise on silicon micro strip detectors. We have used a fast, low noise amplifier-comparator VLSI chip with 22 ns shaping time developed for the LHC to determine the noise at the pre-amp as a function of strip length and strip geometry, i.e., interstrip capacitance and ohmic strip resistance. In addition, we have tested the noise in irradiated detectors. We have compared the results with simulations using SPICE
... The silicon detectors are 6cm long and 3.4cm wide, but we instrumented only the central part of both sides of each detector with 128 channels of fast low-power, low-noise FEE, consisting of a bipolar amplifier-comparator ASIC (LBIC) [5] and a CMOS 40MHz Digital Pipeline (CDP64) [6], both having 64 channels and designed to support 50µm detector pitch. Details of the FEE system an be found in Refs. ...
... Details of the FEE system an be found in Refs. [5] and [6], so here we give only the essential properties: the rise time is 20ns, the double hit resolution is 60ns, and the input noise charge as function of external capacitance C is σ noise =640+32 * C [electrons]. Because we wished to measure efficiencies as a function of pitch, we employed different bonding schemes between detector strips and FEE channels, as shown in Fig.1. ...
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We report the results of a beam test at KEK using double-sided AC-coupled silicon microstrip detectors with binary readout, i.e., a readout where the signals are discriminated in the front-end electronics and only the hit location as kept. For strip pitch between 50μ and 200μ, we determine the efficiency and the noise background as function of threshold setting. This allows us to reconstruct the Landau pulse height spectrum and determine the signal/noise ratio. In addition, the threshold/noise ratio necessary for operation with low occupancy is determined
... The detector is symbolized by the diode. The FEE consists of two chips: the bipolar amplifier-shaper-comparator ASIC (LBIC) [3] and the CMOS 40MHz digital pipeline (CDP64) [8]. The bipolar amplifier-shaper-comparator has an unipolar shaping with a peaking time of 22ns. ...
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We report on the characterization of an AC-coupled, double-sided silicon strip detector, with fast binary readout electronics, in a pion beam before and after proton irradiation. The proton irradiation was non-uniform and to increase the damage the detector was heated to accelerate the anti-annealing. The effective radiation level was about 1×10<sup>14</sup> p/cm<sup>2</sup>. Both the bias voltage of the detector and the threshold of the discriminator of the binary readout electronics were varied, and the efficiencies were determined. The irradiated detector clearly shows the effect of bulk inversion. The binary system proved to be efficient well below the full depletion voltage on the p-n junction side. Due to the highly non-uniform irradiation, the depletion voltage changes from close to zero to about 120 V along a single strip, but the detector appears to work without any noticeable failures
... A pitch adaptor allowed the connection of the 768 strips to the 512 channels, pairing half of the strips together. The modules comprised a hybrid populated with four LBIC-CDP [6] chip sets. Figure 1 shows the schematic drawing of the binary electronics. ...
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The noise seen by the front-end readout electronics of silicon microstrip detectors depends on the capacitive load on each channel and the shot noise due to the reverse current in the detector. Because ofthe short integration time ofthe LHC electronics (25 ns), the shot noise contribution is negligible as long as the current is kept to an acceptable level. However, any inter-strip capacitance increase after irradiation will degrade the noise performances of the detectors. A dependence of the capacitance on the crystal orientation ofthe silicon crystal used as a substrate for silicon detectors has been recently reported (Feld L.et al.,Radiation induced changes in the Interstrip Capacitance of Silicon Microstrip Detectors, 4thROSE Workshop on Radiation Hardening of Silicon Detectors, CERN 2-4 December 1998, Published in CERN/LEB 98-11 (697)). We present here the results ofirradiation ofsilicon microstrip detectors made on 6″ (100) and 4″ (111) crystal oriented silicon wafers in term of inter-strip capacitance and noise, measured using LHC speed binary electronics (LBIC, Spencer E.et al.,IEEE Trans. Nucl. Sci. NS-42 (1995) 796), as a function of bias. A strong dependence ofthe inter-strip capacitance on the bias applied to the detector has been found for the irradiated detectors made on (111) silicon, but this dependence decreases with the frequency of the measurement. At high frequencies, which are the only ones relevant for the noise behaviour ofthe detectors, we found no differences at high bias voltages between the values before and after irradiation for detectors made on silicon with different crystal orientations. The effect on the noise has been checked and at the nominal operation bias we found no measurable differences between detectors made on silicon with different crystal orientations. PACS 29.40Radiation detectors PACS 61.80.JhIon radiation effects PACS 61.80Physical radiation effects-radiation damage PACS 01.30.CcConference proceedings
... For the present tests, sets of pitch adaptors were used to allow the investigation of both 6 and 12 cm long strip properties using a single detector and 512 readout channels. The readout assembly consists of a hybrid populated with four LBIC [9]}CDP [10] chipsets, which are bonded to the detector via three pitch adaptors as illustrated schematically inFig. 1. ...
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Both n-strip on n-bulk and p-strip on n-bulk silicon microstrip detectors have been irradiated at the CERN PS to a fluence of and their post-irradiation performance compared using fast binary readout electronics. Results are presented for test beam measurements of the efficiency and resolution as a function of bias voltage made at the CERN SPS, and for noise measurements giving detector strip quality. The detectors come from four different manufacturers and were made as prototypes for the SemiConductor Tracker of the ATLAS experiment at the CERN LHC.
... The comparator output is sampled and the streams of 0's and 1's that results from this sampling are stored digitally in a RFO buffer. The trigger latency buffer is implemented as dualported SRAM in a manner similar to previous work [13]. Independent read and write pointers are used in order that data can be read from the buffer at a rate faster than that of the write clock. ...
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... The thickness was 300µm and the depletion voltage was 70V before irradiation. We connected 128 strips on the n-side to the channels of a low-power, fast amplifier comparator chip LBIC [3] followed by a digital pipeline CDP64 [4], and providing the bias to the p-side. The readout was done via a local level shifter board located about 10cm from the detector and 20m cable through the VME based readout sequencer DRS at 40MHz into a Mac PC. ...
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We have irradiated an n-side silicon microstrip detector to an equivalent high energy fluence of 1×10<sup>15</sup> p cm<sup>-2 </sup> using 55 MeV protons. We determined the median pulse height to be 0.7 fC at a bias voltage of 180 V, and deduced a depletion region of about 80 μm
... They are placed a few cm from the beam axis, as can be seen inFig. 1 which the layout of a single detector board is shown, and so they are exposed to high radiation levels. The CDP [3] is a clock driven digital data buffer pipeline that stores the data during the trigger latency period ðB1 msÞ and then sends it to the data acquisition system. It is an 81 column, 64 row RAM memory realized in 0:8 mm CMOS technology . ...
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... A threshold was set on the LBIC comparator such that, for any signal above (below) 1 fC, a "1"(0) was passed to the output. This output bit was sampled at 40 MHz and stored in the circular 256 deep digital pipeline of a CDP128 chip [12]. An above-threshold signal from the photomultiplier tube produced a trigger to the data acquisition that could be delayed by a pulse generator. ...
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