The ‘permanent’ component of NBTI: Composition and annealing

Abstract

A number of recent publications explain NBTI to consist of a recoverable and a more permanent component. While a lot of information has been gathered on the recoverable component, the permanent component has been somewhat elusive. We demonstrate that oxide defects commonly linked to the recoverable component also form an important contribution to the permanent component of NBTI. As such, they can contribute to both the threshold voltage shift as well as to the charge pumping current. Under favorable conditions, particularly when subjected to continuous charge-pumping measurements, the permanent component can show recovery rates comparable to that of the recoverable component. We argue that this enhanced recovery is due to a recombination enhanced defect reaction mechanism. We introduce a simple extension to our switching trap model to also capture the impact of charge pumping measurements on the transition rates between the defect states.

Full text

The ‘Permanent’ Component of NBTI: Composition and Annealing
T. Grasser∗, Th. Aichinger†,‡, G. Pobegen†, H. Reisinger•,
P.-J. Wagner∗, J. Franco◦, M. Nelhiebel , and B. Kaczer◦
∗Christian Doppler Laboratory for TCAD at the Institute for Microelectronics, TU Wien, Austria
†KAI, Villach, Austria ‡Now at Penn State University, USA •Infineon, Munich, Germany
◦imec, Leuven, Belgium Infineon, Villach, Austria
Abstract— A number of recent publications explain NBTI to
consist of a recoverable and a more permanent component. While
a lot of information has been gathered on the recoverable com-
ponent, the permanent component has been somewhat elusive.
We demonstrate that oxide defects commonly linked to the re-
coverable component also form an important contribution to the
permanent component of NBTI. As such, they can contribute to
both the threshold voltage shift as well as to the charge pumping
current. Under favorable conditions, particularly when subjected
to continuous charge-pumping measurements, the permanent
component can show recovery rates comparable to that of the
recoverable component. We argue that this enhanced recovery
is due to a recombination enhanced defect reaction mechanism.
We introduce a simple extension to our switching trap model to
also capture the impact of charge pumping measurements on the
transition rates between the defect states.
I. INTRODUCTION
Recent research indicates that two components dominantly
contribute to the negative bias temperature instability (NBTI)
[1–6]: while one component dominates the recovery (R)the
other one has been suspected to be more or less permanent (P).
It has been recently shown that the complete NBTI induced
degradation can be annealed at higher temperatures [6–8],
implying that Pis recoverable as well, albeit at larger time-
scales compared to R. The most important aspect regarding P
is that it might dominate device degradation at long times and
could thus be the crucial degradation mechanism eventually
determining the lifetime [6]. Unfortunately, the extraction of
Pis challenging as within conventional measurement windows
(1μs–100 ks) it is normally overshadowed by R. As such,
our understanding of Pis somewhat vague, also regarding its
constituents, be it interface and/or oxide defects [3, 6], or fixed
positive charges [6]. We show that considerable precautions
have to be taken for accurate extraction of P,asitsuffersfrom
similar issues than those typically related to the extraction of
R, such as measurement delay, measurement duration,aswell
as stress/recovery artifacts introduced by the measurement
procedure itself. Contrary to the work of Huard [6], who links
Pto interface states and an equal amount of fixed positive
charge, our analysis demonstrates that a significant fraction of
Pis due to switching oxide traps, which contribute to both the
threshold voltage shift ΔVth and to the frequency dependent
fraction of the charge pumping current.
II. ERRONEOUS EXTRACTION OF P
The most straight-forward approach for the extraction of P
would be to wait until the recovery of ΔVth has leveled at a
plateau, thus directly exposing P. However, the fundamental
problem here is the large timescales involved in the recovery
of R, as even a short stress of ts=1μscan lead to recovery
transients of up to 1ks, not to mention the recovery of Pitself.
On the other hand, Pis created at a slower rate than R, making
it difficult to locate plateaus within reasonable measurement
times (<1week). As a consequence, plateaus in the recovery
are rarely reported in literature [6]. (The plateau reported in
[9] was later found to be not reproducible.)
Using different test technologies, from thick SiO2to SiON
and high-κgate stacks, we investigated a number of possible
extraction methods. Most unfortunately, the extraction of P
turned out to be much more complicated than expected. In
particular, despite the fact that some attempts are incorrect
altogether, it seemed almost as if Pwas trying to evade our
characterization attempts. Fig. 1 summarizes some potential
mistakes related to the extraction of P:
M1: The recovery of ΔVth has to be plotted on a relative
logarithmic scale following the end of stress, otherwise a
spurious plateau appears. Such ‘plateaus’ are commonly
found in literature but are completely irrelevant and
simply a consequence of the inadequate presentation of
the data.
M2: Switching to a lower temperature temporarily freezes
recovery, resulting in a spurious plateau [10]. While the
example temperature switch from 80 ◦Cto40◦Cgivenin
Fig. 1 may appear pathological, a typical real-world case
appears to be given in [6]: The recovery of the devices
was monitored at a high temperature on a probe-station
for a day. Then, the devices were taken off the probe-
station and stored at room temperature to be re-measured
after some time. The plateaus obtained from this method
are completely arbitrary.
M3: Application of a short positive bias partially removes
oxide charges, temporarily accelerating recovery. This is
because the emission time constant of switching traps
depends strongly on the gate bias [13, 15]. Back at the
original recovery voltage, these defects have already been
annealed, resulting in a spurious plateau until the original
recovery continues.
M4: In order to minimize the recovery, short stress times
and low stress voltages can be chosen. This leads to
relatively weak stresses and relatively short recovery
times. However, particularly in thin oxides, the difference
between stress and recovery voltage can be small, leading
to notable degradation at the recovery voltage, interfering
with the actual recovery. As a consequence, spurious
plateaus can appear.
978-1-4244-9111-7/11/$26.00 ©2011 IEEE 6A.2.1 IRPS11-605

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th [mV]
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Unstressed
P?
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1.4nm PNO
Higher Readout Voltage
Vs= -1.2V
Vr= -0.5V
Vth = -0.3V
125oC
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ΔICP [pA]
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ΔICP [pA]
Relax
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P?
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1.5nm High-κ
Large CP Range
Vs= -2.1V
VH= -0.75V
VL= +0.75V
Vth = -0.3V
M1 M2 M3 M4 M5
Fig. 1. Potential mistakes encountered while trying to locate plateaus in ΔVth recovery traces. The top figures show apparent plateaus, which have nothing
to do with permanent degradation. The reasons for the occurrence of these plateaus are illustrated in the bottom figures. From left to right: (M1) The recovery
of ΔVth is plotted as a function of the total time, rather than the recovery time tr. Even if the recovery perfectly follows log(tr), a spurious plateau will
appear if the data is plotted this way, which has nothing whatsoever to do with P. Similar considerations relate to plotting the data on a linear scale, where
the spurious plateau depends solely on the measurement time. (M2) Due to the large recovery time required, the device is only kept at stress temperature
for a short amount of time [6] and, to ease measurement, recovery is continued at a lower temperature. This, however, is pointless, as a switch to a lower
temperature freezes the recovery [10], which results in a spurious plateau. (M3) In order to remove R, which is due to trapped holes in the oxide [6,11–13],
a positive bias could be applied [14]. However, since the trap sites are switching traps, this has basically the same effect as a temperature switch, because
such a bias switch only removes a few decades from the recovery trace, which continues after that. (M4) Relaxation gate voltages only slightly larger than the
threshold voltage can already lead to degradation, in this example Vrelax =−0.5V, with Vth =−0.3V. As a result, degradation overlaps with the ‘normal’
recovery, resulting in a spurious plateau for a certain amount of time. The signature of this plateau is that it disappears when either stress or relaxation voltages
are changed. (M5) If the charge pumping amplitude is chosen too large, for this 1.5nm high-κdevice for example from ±0.75 V, degradation is observed
during the CP measurement, again resulting in a spurious plateau as in (M4). Note the strong relaxation of ΔICP, which is anything but constant.
M5: Similarly to M4, charge pumping (CP) measurements can
lead to degradation of ΔICP when the charge pumping
amplitude is chosen too large. Balancing the recovery
of ΔICP, this can lead to spurious plateaus as well,
just like M4. M5 already highlights an important issue
[16]: ΔICP is not constant, even within conventional
measurement windows, contradicting claims that ΔICP
is nearly constant and equal to P[1, 6]. In particular, the
resemblance between the recovery of ΔVth in M4 and
ΔICP in M5 is indeed striking.
III. ATTEMPTS AT EXTRACTING P
We proceed by analyzing ΔVth recovery traces recorded af-
ter carefully selected stress/recovery voltages, stress/recovery
times, and temperature. A typical plateau at the end of the
recovery is shown in Fig. 2. According to Huard [6], this
plateau is due to semi-permanent interface states ΔNit and
fixed oxide charges. Interface states are fast and can quickly
follow changes in the bias (<1ms). Thus, a change of the
interfacial Fermi-level would result in a rapid change of the
charge stored in these interface states, ΔQit(EF), according
to their density-of-states. In particular, after a temporary bias
change, the same ΔVth would be expected back at the original
bias. This is clearly not the case. In fact, ΔVth only slowly
goes back to its original value, an apparent degradation during
the recovery phase [14]. We call this phenomenon reverse
recovery, which thus indicates that a significant part of P
is due to slow oxide defects, ΔNot, such as those observed
previously [11, 13, 17]. The explanation of the reverse recovery
effect is as follows: during stress, defects are created inside
the oxide. These defects have an energy level in the silicon
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➡
~40% Reverse
Recovery
2.2nm PNO
10s @ -2.3V/175oC
Fig. 2. Typical plateau observed under medium stress conditions. After the
plateau has been reached, a positive bias was applied for a short time. For
P∼ΔNit, one would expect ΔVth to rapidly follow bias changes (within a
1ms). In fact, a pronounced reverse recovery is observed with time constants
as large as 10 ks, indicating that ΔNot contributes to P.
bandgap and their occupancy depends on the position of
the Fermi-level. During application of a positive bias, the
defects are discharged. This does not mean that the defects
are annealed, the discharging step just makes them electrically
neutral and thus invisible in ΔVth. Once in this metastable
neutral state, the defects can either completely anneal or
they can be charged again when the Fermi-level is moved
back to the threshold voltage. However, as the time constants
responsible for charging and discharging can be considerably
6A.2.2IRPS11-606

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-1.9V
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➡
2.2nm PNO
10s @ 175oC
Reverse Recovery
Fig. 3. Left: Plateaus in the recovery of ΔVth for three different stress
voltages. Right: After short application of a positive bias pulse, again consid-
erable reverse recovery is observed, which indicates a significant contribution
of slow switching oxide traps to the plateau.
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th [mV]
1s
3s
10s
30s
100s
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10
-P,-R [mV]
P~t0.39
R~t-0.006
2.2nm PNO; 175oC
100 x 1s@-2.1V/8ks@V
th
P ~ ΔV
th(8ks)
R ~ ΔV
th(2μs) - P
Fig. 4. Low duty factor experiment (1/8000) with 1sstress followed by 8ks
recovery repeated 100 times. ΔVth(8 ks) recorded at the end of every trace
increases as shown in the inset, indicating the build-up of slowly recoverable
damage. At the same time, Ris slightly reduced, albeit by a much smaller
amount than the creation of P(inset).
larger than those typically associated with interface states, their
charging is visible as a reverse recovery transient [3]. Note that
this is markedly different from the conventional picture of hole
trapping, where holes are simply trapped in the oxide. Such
trapped holes would not react that sensitively to changes of
the Fermi-level and when discharged, they are already fully
annealed [3]. Moving back to the threshold voltage would
not result in a reverse recovery as these defects can only be
charged again by application of a large negative stress pulse.
Fig. 3 shows the bias dependence of these plateaus, demon-
strating that the recovery settles at a higher level when larger
stress voltages are employed. Fig. 3 also demonstrates the
100101102103104105
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th/ΔV
th(10ks)
-13V
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-19V
-22V
-25V
1s @ +2V
➡
1s @ +2V
➡
CP for 10ks
➡
CP for 10ks
➡
30nm SiO2
100ms @ 200oC
100ms @ 125oC
Fig. 5. The same effect as in Fig. 2 is observed on thick SiO2devices. The
reverse recovery time constants are either somewhat larger or the application
of positive bias anneals a fraction of the oxide defects, this being more
pronounced at lower T. Continuous CP for 10 ks removes a further fraction,
cf. Fig. 9.
fundamental dilemma regarding the characterization of the
plateaus, namely that even after a stress time of only 10 s,the
plateaus may only become gradually visible after a recovery
of 105s(about a day), which is already close to the maximum
experimentally feasible recovery time.
One possibility to stimulate the build-up of Pwithout
excessive creation of Ris by repeated stress and recovery
experiments with a very low duty factor. Such an experiment
results in a slow additive component Pto the otherwise
unchanged recoverable component R. Unfortunately, due to
the intricate dynamic nature of the experiment, the analysis of
the data is also much more involved and not possible without
assumptions taken from a sensible model. An example of
such an experiment with a duty factor of 1/8000 is shown
in Fig. 4. While Pincreases with a relatively large power-law
exponent of about 0.4, the reduction of Ris only weak. Still,
this reduction in Rmight be indicative of a coupling between
Rand P[4, 6].
Fig. 5 documents our search for plateaus on thick SiO2
devices. In order to make the plateaus clearly visible so that
their bias and temperature dependence can be studied, we kept
the stress short (10 ms). At 200 ◦C, where both degradation as
well as recovery are strongest, the recovery levels to a plateau
after about 104s. Again, the large disparity between stress and
recovery times, which differ by six orders in magnitude, is
hard to miss. After the plateau had been reached, the devices
were driven into accumulation for 1s. Back at the original
read-out voltage (VG=Vth), ΔVth was found to be reduced
by 40%, the same percentage as observed for the thin SiON
devices. Again, reverse recovery was observed, resulting in
ΔVth to slowly increase following this bias switch. However,
even after 104sthe original degradation of the plateaus level
was not reached, contrary to the thin SiON devices. Also, the
effect appears to be about the same for all stress voltages
used. Following this reverse recovery phase, a continuous
6A.2.3 IRPS11-607

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-1.8V
-2.0V
-2.2V
-2.4V
-2.6V
-2.8V
1.8nm PNO
100μs @ 150oC
Fig. 6. Plateaus are occasionally also observed after ultra-short stress times,
shown for a 1.8nmPNO device. The plateaus are not permanent and strongly
depend on the stress bias. Particularly after such weak stresses, it is important
that the degradation at VG=Vth is negligible in order to avoid mistake M4
of Fig. 1.
CP measurement lasting 104swas performed. At the end
of this CP measurement, the degradation level was reduced
by about 60% relative to the original plateau value. Again,
even after such a long CP measurement, reverse recovery was
visible. The same experiment was repeated at 125 ◦C where the
plateaus were only reached after a considerably longer time.
Now, the response of the devices to the short accumulation
pulse and the long charge pumping measurement depended
on the stress voltage used.
IV. BIAS DEPENDENCE OF P
For lifetime back-extrapolation, the bias dependence of P
is crucial. This is mostly due to the fact that at higher stress
voltages and temperatures, the contribution of Prelative to
Rapparently increases, which has to be corrected for when
extrapolating back to operating conditions. Huard [6] observed
P∼Eγ
ox with a technology-independent γ=4, without
giving details of the extraction scheme for P.
Another example showing experimentally observable
plateaus which appear already after a ts= 100 μsstress is
giveninFig.6.TheEox dependence of these plateaus is shown
in Fig. 7, together with the plateaus of Figs. 3–5 and related
experiments. Contrary to the universal exponent of 4given
by Huard, a wider range is observed, with values smaller and
larger than 4. Also, the bias dependence of the plateaus in
the thick SiO2devices (Fig. 5) shows exponents around 3.2
at 200 ◦C and in the range 4.2–5.6at 125 ◦C. The latter is
insofar interesting as the initial plateau has γ=4.2, which
increases to 5.2after application of +2 V for 1s, and even to
5.6after continuous CP measurements for 10 ks.Thisagain
demonstrates that P, whatever it is and by whatever means it
is extracted, is not really permanent.
10-3
10-2
10-1
100
101
102
103
ΔICP [nA]
10
Electric Field [MV/cm]
10-3
10-2
10-1
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101
102
103
-ΔV
th [mV]
Plateau
Post 1s@+2V
Post 10ks CP
2.2nm PNO
1.8nm PNO
3nm SiO2
ts=100s 200oC
175oC
150oC
125oC
2.8
4.1
3.3
4.0
10 x
4.2
4.3
4.9
5.4
7.0
CP-Delay
41ms;100ms;1s;10s;100s
1.5nm High-κ
100s@125oC
30nm SiO2
ts=100ms
200oC
125oC
~3.2 4.2
5.2
5.8
4
6.1
100μs@150
o
C
10s
36
Fig. 7. The field dependence of the ‘permanent’ part. For the 1.8nm PNO
device from Fig. 6 we take P∼ΔVth(tr=1s), for the ones of Figs. 3
and 5 P∼ΔVth(tr=10ks)was chosen. In addition, for the thick SiO2
devices, the last value at the end of the second and third relaxation cycle are
shown (10 ks after the bias switch and 10 ks after the 10 ks CP measurement
cycles). Also shown is the field dependence of the CP current, which appears
to behave in a similar manner. In any case, Pcan be fitted by a power-law
∼Eγ
ox.
10-3
10-2
10-1
100
ΔICP [nA]
41ms
100ms
1s
10s
100s
~Eγ
10-2 100102
Duration
4
6
8
Exponent γ
1.5nm High-κ
100s @ 125oC
257
Electric Field [MV/cm]
Fig. 8. The permanent component has been suggested to correlate with
the change in the charge pumping current, P∼ΔICP. Just like in ΔVth
measurements, the CP current is very sensitive to the measurement time in
all our investigated technologies. This has a profound impact on the extracted
bias dependence of P. Only for short CP measurements an E4
ox dependence
as in [6] is obtained.
V. C ORRELATION WITH CHARGE-PUMPING DATA
It has been occasionally suggested [6, 19] that Pis corre-
lated to the CP current, ΔICP. In that context, ΔICP has been
interpreted as being proportional to the number of interface
states. Particularly at lower frequencies it has been observed,
however, that ICP also contains considerable contributions
from oxide traps [20]. This issue has been commonly neglected
in the context of NBTI [21].
6A.2.4IRPS11-608

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ICP Pre
ICP Post
6MV/cm @ 125oC
30nm SiO2
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Wait @ -0.5V
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Interrupted @ -0.5V
Interrupted @ +0.5V
Continuous CP
1.5nm High-κ
125oC
Fig. 9. Recovery of the CP current at a frequency of 1MHz. Contrary to other
observations [6], the CP current is never constant in any of our technologies,
consistent with [16]. Most importantly, continuous CP accelerates recovery.
When the beginning of the CP measurement is delayed for variable amounts
of time, with VGbeing either the CP high- or low-level, rapid recovery
is observed at the beginning of the delayed continuous CP measurement.
Application of the CP high- and low-levels during the wait phase proves that
it is not the voltage but rather the charge pumping itself that causes the rapid
recovery. Top: For a thick 30 nm SiO2device. The inset shows a constant-
base-level CP sweep before and after stress. Bottom:Fora1.5nm high-κ
gate stack device. The same effect is observed in both dramatically different
technologies.
The bias dependence of ΔICP is compared in Fig. 7 to the
bias dependence of the ΔVth plateaus, which particularly for
fast CP measurements seems to agree well, indicating a cor-
relation between the defects visible in these two experiments.
Such a correlation has led previous studies to conclude that
ΔVth as well as ΔICP are dominated by interface states [22].
Interestingly, the bias dependence of ΔICP is very sensitive
to the measurement duration as shown in Fig. 8. While for fast
CP experiments (41 ms) we obtain γ=4, we observe a strong
dependence of the extracted exponent on the duration of the
CP measurement. This is reminiscent to ΔVth measurements
[23], where the exponent also increases with the measurement
duration. The reason for this behavior is that ΔICP shows
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0.4
0.6
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1.4
Normalized ΔICP and ΔV
th
Delay 1s
Delay 10s
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Delay 1000s
Continuous CP
ΔV
th
ΔV
th Post 1ks CP
CP Delayed @ VH (-0.5V)
Readout ΔIS→ΔV
th During Delay
1.5nm High-κ
125oCΔV
th Post 1ks CP
Fig. 10. Extension of the experiment in Fig. 9: the change in the linear
source current ΔISat the CP high-level VHis read during the wait phase and
converted to ΔVth following [18]. This clearly demonstrates that the onset
of the accelerated CP recovery follows the recovery of ΔVth.CPinduced
accelerated recovery in ΔICP is paralleled by a recovery in ΔVth by the
same fraction.
10-2 10-1 100101102103104105106107
Relaxation Time [s]
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3
4
5
ΔN
eff [1011 cm-2]
Fit: A tr
-n
1kHz
10kHz
100kHz
1MHz
2.5MHz
0 0.5
-VH [V]
0
2
4
6
8
10
N
eff [1010 cm-2]
Unstressed
VL = +0.5V
1.5nm High-κ
125oC
Fig. 11. Frequency dependence of the CP recovery. With lower frequency, a
larger amount of oxide defects contributes to ΔNeff. With increasing CP
time, however, the oxide defects are ‘pumped-away’, giving a frequency
independent ΔNeff as expected from a pure ΔNit contribution.
similar recovery rates as ΔVth which is contrary to Huard’s
work, but consistent with the observation of Rangan et al. [16].
Remarkably, recovery is accelerated by the CP measure-
ment, see Fig. 9. The effect is quite similar for thick SiO2
and thin high-κdevices. At first glance one might relate this
to the bias-dependence of the defect annealing rates, since the
transistor is continuously pulsed between accumulation and
inversion. As it has already been shown for ΔVth recovery,
recovery can be accelerated when the transistor is driven
towards accumulation [3, 23]. This effect, so undoubtedly
present, does not provide the full answer, though. This can be
seen in Fig. 9 which also shows reference CP measurements
which were interrupted by constant bias phases at the low-
6A.2.5 IRPS11-609

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0
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|ΔV
th - ΔV
th(10ms)|
0s Ref
1s
10s
100s
1ks
10ks
Reduced Reverse Recovery
1.5nm High-κ
125oC
CP Followed by ΔV
th Meas.
Cont. CP
Fig. 12. Impact of continuous CP measurements with variable duration on
ΔVth. A considerable recovery in ΔVth is observed. Also, with increasing
CP duration, the reverse recovery is reduced, indicating that CP anneals slow
oxide defects, ΔNot.
and high-level of the charge pumping pulse, which according
to the previous argument should contain the most effective
recovery case. However, the ΔICP recovery in the continuous
CP measurement is even larger, implying that it is accelerated
by the pulsing event itself.
Fig. 10 shows that ΔICP at the beginning of delayed CP
measurements follows the recovery of ΔVth. Also, the amount
of recovery induced by the CP measurement is mirrored
in the recovery of ΔVth. This data strongly suggests that
both ΔVth and ΔICP are at least partially related to the
same microscopic defect, namely switching oxide traps [13,
24–26]. This conclusion is also confirmed by the frequency
dependence of the ΔICP recovery shown in Fig. 11 which
gradually becomes smaller after long CP times, indicating that
it is oxide defects which can be ‘pumped-away’.
Further confirmation that defects visible in ΔVth react to CP
measurements is given in Fig. 12: following a CP cycle, ΔVth
shows reverse recovery due to slow oxide defects reaching
their equilibrium occupancy after long times. Since this reverse
recovery becomes smaller and smaller with increasing recov-
ery time, it must be concluded that the defects responsible for
reverse recovery can recover as well.
In [27] it was argued that the recovery of ICP was not due
to the actual recovery of interface states, but rather due to
a reduction of the swing of the surface potential. Although
we fail to see why the ‘width of the CP hat’ should be
related to the density of interface states, we performed full
constant amplitude and constant-base-level CP measurements
in addition to the single-point CP experiments shown in the
previous figures. The result is shown in Fig. 13 and quite
reassuringly, the same level of degradation and recovery is
observed in all measurements, except for the 1V constant
amplitude CP measurements, which use an amplitude too small
to cover the whole bandgap. Fig. 13 also shows the detrimental
impact of CP measurements which can lead to degradation
and thus to artificial plateaus, cf. (M5), particularly at higher
temperatures.
10-2 10-1 100101102103104105106
Time [s]
1
10
100
ΔICP [%]
SinglePoint ±0.75
CBL -0.75V
CA ΔV=1.5V
CA ΔV=1.0V
1.5nm High-κ
50oC
CP Caused Degradation
Unstressed Devices
125oC
SinglePoint ±0.75
CBL -0.75V
CA ΔV=-0.75V
Fig. 13. All CP methods see the same recovery rate (ΔICP /decade), plotted
relative to ICP,0. The single-point CP method is the fastest and gives the
same ΔICP as the full constant-base-level sweep (CBL). Comparable full
constant-amplitude (CA) sweeps with proper ΔValso see the same ΔICP.
Particularly at higher temperatures, CP measurements can lead to degradation.
Relaxation
Structural
Relaxation
Structural
2’
Positive
Metastable
Substrate
with
Exchange
Charge
Neutral
Stable 2Positive
Stable
1
1’
Substrate
with
Exchange
Charge
Metastable
Neutral
FastSlow
Defect Annealing Charge Changes
Slow
Reverse RecoveryCharge Pumping
Distributed TimeconstantsDistributed Timeconstants
Fast
Fast Slow
Distributed Timeconstants
Defect Creation
+
+
+
Fig. 14. The switching oxide trap model developed recently [13] is consistent
with the experimentally observed behavior. Created defects can be switching
traps and exchange charge with the substrate (1↔2), some of them faster,
contributing to ΔICP in a frequency-dependent manner, some of them very
slow, thus causing reverse recovery or transient RTN [13], thereby contributing
to ΔVth only (if in state 2).
VI. THE DEFECT MODEL
Except for the newly discovered effect of CP-induced recov-
ery, which will be discussed separately below, all features ob-
served so far are consistent with the detailed defect properties
identified using our recent time-dependent defect spectroscopy
(TDDS) measurements [13, 15]. The microscopic model we
use for the description of the defects is an extension of the
switching trap model proposed by Lelis et al. [24] and shown
in Fig. 14:
•The defects are switching traps, that is, have an energy-
level in the Si bandgap. Prior to stress, the defect is in the
neutral state 1, while stress transfers it into the positive
state 2. Depending on the defect properties, the defect
6A.2.6IRPS11-610

1.5 2 2.5 3 3.5 4 4.5 5 5.5
1000/T [1/K]
ΔICP Recovery [%]
Wait @ -0.5V
Wait @ +0.5V
Continuous CP ±0.5V 13 meV
8 meV
1 meV
1.5nm High-κ
1ks @ -2.1V; 10ks Recovery
20
30
40
50
60
70
80
Fig. 15. Temperature dependence of the CP recovery: Continuous CP
recovers ΔICP down to 30% of the post-stress ΔICP , nearly independently
of temperature. Remaining at −0.5V maintains 60% at −60 ◦C. Mere
application of +0.5V, the worst-case in a bias-driven interpretation, reduces
ΔICP only down to 40% at −60 ◦C.
may have a neutral metastable state 1, which provides the
aforementioned energy-level in the bandgap. Transitions
from 2to 1are particularly likely during switches toward
accumulation or during CP measurements. While in 1,
the defect is uncharged and thus not visible in ΔVth.
•The defects may contribute to the CP signal in two ways.
First, on an unstressed device, transitions between 1and
2, provided they are sufficiently fast, can create recombi-
nation events. Contrary to interface states, whose contri-
bution is temperature-independent, these switching traps
will provide a larger contribution at higher temperatures.
In particular, they will form the temperature-dependent
tail of constant-base-level CP measurements. In addition,
as shown in Fig. 13, CP can lead to degradation, which
corresponds to a transition to state 2. Once in state 2,
transitions between 2and 1can also contribute to ICP,
resulting in a temperature- and bias-dependent hysteresis
of the CP curve [21].
•During NBTI stress, the defects move from the neutral
state 1to stable state 2. There, again, transitions between
2and 1can also contribute to ICP, resulting in a
temperature- and frequency-dependent contribution. This
appears to be a significant contribution to ΔICP following
NBTI stress.
•Since the time-constants are widely distributed, only the
faster transitions between 2and 1can contributed to
ICP. As seen in Figs. 2, 3, 5, and 12, the slower states
constitute the reverse recovery effect.
•The reason why these switching traps can contribute to
both ΔVth and ΔICP is simply because once created,
these defects can be either positive (state 2) or neutral
(state 1), depending on the Fermi-level, the former
contributing to ΔVth. This Fermi-level dependent defect
occupancy also causes the change in the sub-threshold
slope reported after NBTI stress [28, 29].
Positive
Neutral
1’
11
Pumping
Total Energy (Vibronic + Electronic)
Reaction Coordinate
Stress
Charge
’Phonon−Kick’
2
2’
Fig. 16. Schematic illustration of the REDR effect: To p: During stress,
defects become positively charged. Middle: During CP, the neutral level is
rapidly moved up and down, causing frequent transitions. Bottom: The excess
energy of the recombination events is deposited into the accepting mode,
which leads to a reduction of the activation energy, known as the ‘phonon-
kick’ or REDR effect [30].
VII. UNDERSTANDING CP-INDUCED RECOVERY
In order to understand the CP-induced recovery, we first
studied its temperature dependence which is shown in Fig. 15.
At all temperatures, wait phases at −0.5V show relatively
weak recovery but a relatively strong temperature dependence.
Compared to wait phases at −0.5V, wait phases at +0.5V
result in a stronger recovery but have a weaker temperature
dependence. Finally, continuous CP measurements without an
intermediate wait phases accelerate recovery down to 30% of
the stress level after 10 ks, nearly independent of temperature.
A possible explanation for this behavior is as follows: the
CP measurement at Imax
CP is designed to maximize the number
of recombination events. Each event releases an energy of the
order of the silicon bandgap. With 106cycles per second, this
accumulates to an enormous amount of energy which has to be
dissipated via phonons. In due course, reactions near the defect
site can be dramatically enhanced, a phenomenon known as the
‘phonon-kick’, or more recently as recombination enhanced
defect reaction (REDR) [30, 31]. This is schematically shown
in Fig. 16, where the REDR accelerates the transition from
the neutral metastable state to the neutral equilibrium state.
Following the arguments of Weeks et al. [31], the thermal
transition rate from state 1to state 1of our switching trap
model [13],
k11=νe−βε11(1)
with ε11as the thermal barrier separating the states 1and 1,
is replaced by k11+k∗
11with the enhanced rate
k∗
11=ν∗e−β(ε11−ε∗),(2)
with β−1=k
BT. From our experimental data we extract
ε∗≈60 meV and ν∗=2.5×1014 s−1, with the convincing
calibration result shown in Fig. 17. We remark that, as noted
6A.2.7 IRPS11-611

20
40
60
80
100
120
ΔICP [%]
10-2 100102104
20
40
60
80
100
ΔICP [%]
10-2 100102104
Recovery Time [s]
Wait @ -0.5V
Wait @ +0.5V
Cont. CP ±0.5
125oC -60oC
Filled Syms: Model
Open Syms: Data
Last@1ks Last@1ks
Fig. 17. Consideration of REDR in our switching trap model [3, 13] allows to
reproduce the experimental data very well. Top : Data from Fig. 15 at 125 ◦C
and −60 ◦C. Bottom: The last long recovery trace during continuous CP at
125 ◦Cand−60 ◦C. The scatter particularly in the initial data (up to 20%)
makes the model calibration challenging.
previously for ΔVth recovery [11], temperature-activated mi-
croscopic defect time constants again result in an apparent
temperature-independent macroscopic behavior.
VIII. SPECIAL CASE:HYDROGEN-RICH WAFER
The log-like recovery of ΔICP as for instance shown in
Figs. 9 and 13 is clearly incompatible with the recovery
predicted by the reaction-diffusion (RD) model [32], (1 +
ts/tr)−1, which does not depend on bias or temperature
[33]. A peculiar exception has been observed on a hydrogen-
rich 30 nm SiO2split-wafer. Measuring ΔICP only once per
decade results in ΔICP ∼const. By contrast, a continuous CP
measurement produces recovery traces which bear a striking
resemblance to the RD prediction, particularly for ts=10ks,
see Fig. 18. After studying different stress times, however, we
found the measured recovery to be practically independent of
the stress-time, not scaling universally over ts/tras expected
from RD theory [33]. Still, under continuous CP conditions,
recovery could be a diffusion-limited process in this particular
wafer. An intriguing feature is that after longer stress times
the devices continue to degrade after the end of stress. This is
consistent with the idea that hydrogen is released during stress
which then depassivates interface states and creates oxide
defects [34–37]. Otherwise, degradation after termination of
the stress would not be possible. We remark that this is the
standard model of irradiation damage [38, 39].
IX. CONCLUSIONS
We have demonstrated that the plateaus occasionally ob-
served in carefully tuned stress/recovery experiments consist
of contributions from interface states as well as slower donor-
like switching oxide traps. These plateaus are not permanent
and normally not too well developed, making a precise def-
inition and extraction difficult. In particular, the plateaus can
0
0.2
0.4
0.6
0.8
1
Normalized ΔICP
Continuous CP
Paused@-2V
Continuous CP
RD
10-4 10-2 1001021041061081010
Relaxation Time [s]
0
0.2
0.4
0.6
0.8
1
Normalized ΔICP
Continuous CP
Paused@-2V
Continuous CP
RD
Excessive H Concentration Wafer
125oC
100s @ 6MV/cm
10ks @ 6MV/cm
10-3 10-2 10-1 100101102103104105106107108
Recovery Time [s]
0
0.2
0.4
0.6
0.8
1
Normalized ΔICP
RD
100s
1ks
10ks
100ks
Continuous CP
6MV/cm @ 125oC
30nm SiO2
Excessive H Concentration Wafer
Post-Stress
Degradation
Fig. 18. To p: In an extremely H-rich wafer, recovery in ΔICP is
basically absent provided only occasional CP measurements are made. A
diffusion-limited recovery behavior seems to dominate for continuous CP
measurements. Bottom: The recovery rate appears to be roughly independent
of the stress time, meaning that the hydrogen profile is only weakly disturbed
during stress. With increasing stress, though, the initial degradation during the
recovery phase can last for up to 10 s and amount to 20%. This is a degradation
of ΔICP which was found in this hydrogen-rich wafer only and must not be
confused with the reverse recovery visible in ΔVth only, cf. Fig. 12.
be annealed by applying short positive bias pulses or, more
effectively, by continuous CP measurements. Particularly the
latter provides an efficient means for annealing NBTI degra-
dation, likely due to a recombination enhanced defect reaction
mechanism. Under normal recovery conditions, the recovery
of ΔVth determines the starting level of ΔICP, which starts
recovering quickly once CP measurements are performed.
The latter demonstrates that oxide defects contribute to both
ΔVth and ΔICP. Overall, considering Pas permanent will
lead to serious errors, even within conventional measurement
windows. Finally, we have suggested a simple extension of
our switching trap model to also account for recombination
enhanced defect reaction (REDR) effects.
6A.2.8IRPS11-612

ACKNOWLEDGMENT
This work has received funding from the EC’s FP7 grant
agreement n◦216436 (ATHENIS) and from the ENIAC MOD-
ERN project n◦820379.
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6A.2.9 IRPS11-613