Conference Paper

A new genetic simulated annealing algorithm for hardware-software partitioning

DOI: 10.1109/ICISE.2010.5690308 Conference: Information Science and Engineering (ICISE), 2010 2nd International Conference on
Source: IEEE Xplore


To solve the hardware/software partitioning problem in embedded system, this paper proposed a new genetic simulated annealing algorithm (NGSA) which based on analysis of genetic algorithms and simulated annealing algorithm the main advantages and disadvantages. The genetic algorithm integrates the simulated annealing idea; niche technology is introduced to maintain population diversity; and the Metropolis criterion with the formation of new groups to improve the quality of group. Experimental results show that the algorithm has strong climbing ability and global search capability, and the fitness value is significantly improved than genetic algorithm and simulated annealing algorithm.

11 Reads
  • Source
    • "Therefore, exact solutions for this problem tend to be quite slow, especially as the number of system components increases. Hence, many algorithms were proposed to solve this problem; such as Particle Swarm Optimization [2], greedy partitioning algorithms [3], simulated annealing [4], Genetic algorithm [5], Dynamic programming [6], integer linear programming [7], etc. All these approaches can work perfectly within their own codesign environments, but it is difficult to compare them, because of the large differences in their co-design environments as well as the lack of commonly adopted benchmarks [8]. "
    [Show abstract] [Hide abstract]
    ABSTRACT: Hardware and Software co-design has become one of the main methodologies in modern embedded systems. The partitioning step, i.e. to decide which components of the system should be implemented in hardware and which ones in software, is the most important step in the embedded systems. Since the costs and delays of the final design strongly depend on partitioning results, there is a need to get an accurate estimate for hardware area, delay and power. However, accurate delay estimation methods are slow as they need a scheduling step. In this paper, we propose a reliable delay estimation method to be used within the partitioning step prior to the scheduling step.
    Full-text · Conference Paper · Aug 2013
  • Source
    • "Many general-purpose heuristic algorithms are also utilized to solve the system partitioning problem. Simulated annealing-related algorithms [22] [23] [24], genetic algorithms [8] [9] [25] [26], tabu search, and greedy algorithms [25] [27] [28] have been extensively used to solve partitioning problem. "
    [Show abstract] [Hide abstract]
    ABSTRACT: As being one of the most crucial steps in the design of embedded systems, hardware/software partitioning has received more concern than ever. The performance of a system design will strongly depend on the efficiency of the partitioning. In this paper, we construct a communication graph for embedded system and describe the delay-related constraints and the cost-related objective based on the graph structure. Then, we propose a heuristic based on genetic algorithm and simulated annealing to solve the problem near optimally. We note that the genetic algorithm has a strong global search capability, while the simulated annealing algorithm will fail in a local optimal solution easily. Hence, we can incorporate simulated annealing algorithm in genetic algorithm. The combined algorithm will provide more accurate near-optimal solution with faster speed. Experiment results show that the proposed algorithm produce more accurate partitions than the original genetic algorithm.
    Full-text · Article · Apr 2013 · Journal of Applied Mathematics
  • [Show abstract] [Hide abstract]
    ABSTRACT: Hardware-Software partitioning and scheduling are the crucial steps in HW-SW codesign of MPSoC since they have a strong effect on the performance, area, power and the system. Considered as NP-complete problem, the involvement of inter-task data dependencies have posed a serious challenge on the MPSoC based embedded application domain. In this paper, we propose an efficient algorithm for dependent task HW-SW codesign with Greedy Partitioning and Insert Scheduling Method (GPISM) by task graph. For hardware tasks, the critical path with maximum sum of benefit-to-area ratio can be achieved and implemented in hardware while the total area occupation in this path fitting global hardware constraint; after that, the task graph is updated by removing tasks in the critical path iteratively until the available hardware area doesn't fit. For software tasks, the longest communication time path can be obtained from the updated task graph and assigned to software implementation integrally, then second path will be located if it does exist. For task scheduling, rest scatter nodes are inserted into hardware/software implementation list by scheduling criterion. Simulation results demonstrate that GPISM algorithm has a polynomial time complexity without affordable computation; meanwhile it can greatly improve system performance even in the case of generation large communication cost, and efficiently facilitate the researchers to partition and schedule embedded applications on MPSoC hardware architectures.
    No preview · Conference Paper · Sep 2012