Schottky-Drain Technology for AlGaN/GaN High-Electron Mobility Transistors

Article (PDF Available)inIEEE Electron Device Letters 31(4):302 - 304 · May 2010with47 Reads
DOI: 10.1109/LED.2010.2040704 · Source: IEEE Xplore
Abstract
In this letter, we demonstrate 27% improvement in the buffer breakdown voltage of AlGaN/GaN high-electron mobility transistors (HEMTs) grown on Si substrate by using a new Schottky-drain contact technology. Schottky-drain AlGaN/GaN HEMTs with a total 2-??m-thick GaN buffer showed a three-terminal breakdown voltage of more than 700 V, while conventional AlGaN/GaN HEMTs of the same geometry showed a maximum breakdown voltage below 600 V. The improvement of the breakdown voltage has been associated with the planar contact morphology and lack of metal spikes in the Schottky-drain metallization.
302 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 4, APRIL 2010
Schottky-Drain Technology for AlGaN/GaN
High-Electron Mobility Transistors
Bin Lu, Student Member, IEEE, Edwin L. Piner, Member, IEEE, and Tomás Palacios, Member, IEEE
Abstract—In this letter, we demonstrate 27% improvement in
the buffer breakdown voltage of AlGaN/GaN high-electron mo-
bility transistors (HEMTs) grown on Si substrate by using a new
Schottky-drain contact technology. Schottky-drain AlGaN/GaN
HEMTs with a total 2-µm-thick GaN buffer showed a three-
terminal breakdown voltage of more than 700 V, while con-
ventional AlGaN/GaN HEMTs of the same geometry showed a
maximum breakdown voltage below 600 V. The improvement
of the breakdown voltage has been associated with the planar
contact morphology and lack of metal spikes in the Schottky-drain
metallization.
Index Terms—Buffer breakdown, GaN-on-silicon, high-electron
mobility transistor (HEMT), power electronics, Schottky drain.
I. INTRODUCTION
D
UE TO their combination of high electron mobility (µ
e
)
and high critical electric field (E
c
), AlGaN/GaN high-
electron mobility transistors (HEMTs) are excellent candi-
dates for the next generation of power electronic devices [1].
These excellent properties allow the fabrication of power
circuits with unprecedented performance. For example, a
175–350-V boost converter based on the AlGaN/GaN HEMT
technology has recently achieved 97.8% conversion efficiency
at 1-MHz switching speed with 300-W output power [3].
Most of the reported high-breakdown AlGaN/GaN HEMTs
are grown on SiC substrates, whose limited diameter (up to 4 in)
and high cost severely hinder the commercialization of GaN-
based power electronics. Due to the large available size and
lower cost of silicon substrates, AlGaN/GaN HEMTs grown on
Si (111) are becoming attractive for GaN-based power switches.
Recently, crack-free GaN grown on 150-mm Si substrates has
been reported by s everal groups [4], [5] with a sheet resistance
of 260 / and mobility up to 1650 cm
2
/V · s [5]. In addition,
the GaN-on-Si wafers also enable the seamless integration of
Si CMOS electronics with GaN power transistors [6], bringing
a new degree of freedom for designing more compact systems,
such as on-chip power distribution networks for microproces-
sors [7], [8].
Manuscript received August 28, 2009. First published February 25, 2010;
current version published March 24, 2010. This work was supported in part
by M/A-COM and in part by the MARCO Interconnection Focus Center. The
review of this letter was arranged by Editor G. Meneghesso.
B. Lu and T. Palacios are with the Department of Electrical Engineering
and Computer Science, Massachusetts Institute of Technology, Cambridge,
MA 02139 USA (e-mail: binlu@mit.edu; tpalacios@mit.edu).
E. L. Piner is with Nitronex Corporation, Durham, NC 27703 USA (e-mail:
epiner@nitronex.com).
Color versions of one or more of the figures in this letter are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LED.2010.2040704
In spite of the great potential of GaN-on-Si power electron-
ics, the breakdown voltages of standard AlGaN/GaN HEMTs
grown on Si are much lower than those grown on SiC. For
example, the breakdown voltages of AlGaN/GaN HEMTs with
a total 2-µm epitaxial layer on Si substrates are typically less
than 600 V [9], [10], while for the same epitaxial layer thickness
on SiC, a 1.9-kV breakdown voltage has been demonstrated
[2]. Several approaches have been used to improve the device
breakdown voltage, including increasing the epitaxial layer
thickness [9]–[11], doping the buffer with Fe or C [12], [13],
and using AlGaN in the buffer [14]. Recently, a 1.8-kV break-
down voltage has been demonstrated in AlGaN/GaN HEMTs
on Si by increasing the buffer thickness to 6 µm [10]. However,
the growth of t hick buffer layers increases the cost of GaN-on-
Si wafers. In this letter, we demonstrate a new technology based
on the use of a Schottky metallization in the drain contact to
increase the buffer breakdown voltage by 27%.
II. D
EVICE FABRICATION
Both Schottky-drain and conventional ohmic-drain HEMTs
were fabricated on Al
0.26
Ga
0.74
N/AlN/GaN heterostructures
grown on 4-inch Si (111) substrates by Nitronex Corporation.
These structures have a total 2-µm undoped GaN/AlGaN buffer,
a 1-nm AlN interlayer, and a 17.5-nm AlGaN barrier with
a 2-nm GaN cap layer [16]. For the conventional HEMTs,
Ti/Al/Ni/Au alloyed ohmic source and drain contacts were
formed after 870
C annealing for 30 s in N
2
atmosphere. In the
Schottky-drain HEMTs, unannealed Ti/Au metallization was
used for the drain contact. Prior to this metallization, a 10-nm
recess was performed on the Al
0.26
Ga
0.74
N barrier by a low-
energy BCl
3
/Cl
2
plasma in an electron cyclotron resonance
system to reduce the series resistance and turn-on voltage
of the Schottky-drain contacts. Then, 150-nm mesa isolation
was achieved by BCl
3
/Cl
2
plasma etching. Finally, Ni/Au/Ni
Schottky gates were formed by e-beam evaporation. Both the
ohmic-drain and Schottky-drain devices were simultaneously
fabricated on the same wafer and in very close proximity from
each other. These devices have the gate length (L
g
) of 2 µm,
gate-to-source spacing (L
gs
) of 1.5 µm, and gate-to-drain spac-
ing (L
gd
) varying from 5 to 20 µm. For the buffer breakdown
characterization, no gate was formed between the source and
drain contacts. The breakdown voltage was measured with a
Tektronix Curve Tracer as a voltage source and two Agilent
34401A multimeters to measure the current and voltage. The
breakdown voltage is defined as the voltage when the leakage
current reaches 1 mA/mm. Fluorinert was used to prevent
surface flashover during measurements.
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LU et al.: SCHOTTKY-DRAIN TECHNOLOGY FOR AlGaN/GaN HEMTs 303
Fig. 1. (a) Buffer lateral leakage current of the ohmic-drain and Schottky-
drain devices with 14-µm contact spacing. The inset shows the leakage current
in semilog scale and the measurement configuration. (b) Buffer lateral break-
down voltage as a function of source-to-drain spacing. The inset compares the
maximum buffer breakdown voltages of the Schottky-drain and ohmic-drain
devices with the reported maximum buffer breakdown voltages for different
total epitaxial thicknesses.
III. EXPERIMENTAL RESULTS
The buffer lateral breakdown voltage of the ohmic-drain and
the Schottky-drain devices was measured in structures where
a 150-nm-deep recess was performed between the source and
drain contacts to eliminate the 2DEG [inset of Fig. 1(a)]. The Si
substrate was floating during the measurement. Fig. 1(a) shows
the typical lateral breakdown IV curves of a conventional
ohmic-drain device and a Schottky-drain device with 14-µm
source-to-drain distance (L
sd
). The Schottky-drain device
shows 150 V higher breakdown voltage than the ohmic-drain
device, reaching 700 V, 27% improvement. To compare the
leakage currents of the ohmic-drain and Schottky-drain devices,
the same IV curves are shown in semilog scale in the inset
of Fig. 1(a). The leakage current of the Schottky-drain de-
vice is five times lower than that of the ohmic-drain device.
Fig. 1(b) shows the breakdown voltages for different source-
to-drain distances. For source-to-drain spacing below 14 µm,
the breakdown voltage increases linearly with the distance. For
source-to-drain spacing above 14 µm, the breakdown voltage
saturates, which is an indication of vertical current leakage from
the GaN buffer to the Si substrate. Since the Si substrate is
conductive (with sheet resistance of 2–4 k/, measured from
the Van der Pauw structure), the lateral voltage drop across the
Si substrate is negligible, resulting i n the breakdown satura-
Fig. 2. (a) Three-terminal breakdown voltages as a function of gate-to-drain
distances. (b) Specific R
on
as a function of breakdown voltages. The inset
shows the IV curves of the ohmic-drain and Schottky-drain devices with
L
g
= 2 µm, L
gs
= 1.5 µm, and L
gd
= 10 µm.
tion. Therefore, the maximum achievable breakdown voltage in
AlGaN/GaN HEMTs on Si substrate is limited by the GaN-to-
Si vertical breakdown. Comparing with the maximum reported
buffer breakdown voltages in the literature, the inset of Fig. 1(b)
shows that the new Schottky-drain contact devices have the
highest buffer breakdown voltage for a given epitaxial layer,
2 µm in this case.
The three-terminal breakdown voltage (V
bk
) of the ohmic-
drain and Schottky-drain HEMTs was measured under a gate-
to-source bias of 8 V, enough to pinch off the devices which
have a threshold voltage of 2 V. The maximum breakdown
voltage of the ohmic-drain devices is between 500 and 600 V
while the maximum breakdown voltage for the Schottky-drain
devices is between 600 and 700 V, with some of them showing
more than 700 V (up to 748 V). Although the results show some
dispersion in different areas of the sample, the Schottky-drain
devices always have higher breakdown voltages than the ohmic-
drain devices when devices near to each other are compared
[Fig. 2(a)]. On average, the Schottky-drain devices show more
than 100 V higher breakdown voltage than the ohmic-drain
devices.
The
ON-resistance (R
on
) of both the standard HEMTs and
the Schottky-drain HEMTs was calculated from the IV
curves, as shown in the inset of Fig. 2(b). The active area be-
tween source and drain is used for the specific R
on
calculation,
including a 2-µm transfer length from contact pads. Because
the Schottky-drain HEMTs can achieve the same breakdown
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304 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 4, APRIL 2010
Fig. 3. SEM cross section of (a) ohmic contact on AlGaN/GaN and (b) Schottky contact on AlGaN/GaN HEMT structures grown on Si substrates.
voltage as the ohmic-drain HEMTs with shorter gate-to-drain
spacing, they have lower specific R
on
than the standard HEMTs
for V
bk
> 400 V, as shown in Fig. 2(b). The use of Schottky-
drain contacts has allowed the fabrication of transistors with
4.5-m · cm
2
specific R
on
at 700 V. In addition, the proposed
Schottky-drain contact technology can also be used as an inte-
grated protection diode for GaN power amplifiers, as reported
in [15].
IV. DISCUSSION
To find out the origin of the increased breakdown voltage
associated with the Schottky-drain contact, the samples were
cleaved and the cross section of the ohmic and Schottky con-
tacts was studied with a scanning electron microscope (SEM).
In contrast to the flat AlGaN/GaN surface underneath the
Schottky contact [Fig. 3(b)], voids have been found in the
GaN underneath the ohmic contact, as shown in Fig. 3(a). This
finding is consistent with [17] where pits in the GaN were found
after etching away the alloyed ohmic contacts. We believe that
the voids in the GaN created by the alloyed ohmic contact are
responsible for the higher leakage current and lower breakdown
of the ohmic-drain devices. However, the detailed mechanism is
not clear at this moment.
V. S
UMMARY
In this letter, we have demonstrated that the use of Schottky-
drain contacts can increase the buffer breakdown voltage of
AlGaN/GaN HEMTs grown on Si substrates. The use of
this new technology allowed the fabrication of AlGaN/GaN
HEMTs with more than 700-V three-terminal breakdown
voltage and a specific R
on
of 4.5 m · cm
2
on a GaN-on-Si
sample with only 2-µm total epitaxial layer. These results
demonstrate the great potential of GaN-on-Si devices for power
electronics.
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    • "In spite of the outstanding electrical properties of GaN material, the main challenge is to improve reliability of GaN HEMTs [2]. Many researchers have put significant effort into improving the breakdown voltage (BV) of conventional lateral GaN HEMTs by employing field plates (FPs) [1], increasing the epitaxial-layer thickness [3, 4], doping the buffer with iron or carbon [5], inserting AlGaN buffer layer to the HEMT structure [6, 7], and use of Schottky contacts in drain [8]. Bin Lu et al [9] presented innovative technology to improve BV of GaN HEMTs to ∼1500 V by replacing silicon substrate with an insulating carrier wafer. "
    [Show abstract] [Hide abstract] ABSTRACT: A novel enhancement mode structure, a buried gate gallium nitride (GaN) high electron mobility transistor (HEMT) with a breakdown voltage (BV) of 1400 V–4000 V for a source-to-drain spacing (L SD) of 6 μm–32 μm, is investigated using simulations by Silvaco Atlas. The simulations are based on meticulous calibration of a conventional lateral 1 μm gate length GaN HEMT with a source-to-drain spacing of 6 μm against its experimental transfer characteristics and BV. The specific on-resistance R S for the new power transistor with the source-to-drain spacing of 6 μm showing BV = 1400 V and the source-to-drain spacing of 8 μm showing BV = 1800 V is found to be 2.3 mΩ · cm2 and 3.5 mΩ · cm2, respectively. Further improvement up to BV = 4000 V can be achieved by increasing the source-to-drain spacing to 32 μm with the specific on-resistance of R S = 35.5 mΩ · cm2. The leakage current in the proposed devices stays in the range of ∼5 × 10−9 mA mm−1.
    Full-text · Article · Oct 2014
    • "With a similar trend for both samples, it can be observed that the hybrid drain devices present, in general, the highest V BK , and the conventional ohmic drain devices have relatively lower V BK . The reason of V BK enhancement for Schottky and hybrid drain devices could be attributed to the smooth interface between the Schottky metal and the AlGaN barrier layer (or GaN cap layer) and lack of metal spiking [8]. In addition, the hybrid drain devices present even higher V BK than the pure Schottky drain structure. "
    [Show abstract] [Hide abstract] ABSTRACT: In this letter, a hybrid Schottky–ohmic drain structure is proposed for AlGaN/GaN high-electron-mobility transistors on a Si substrate. Without additional photomasks and extra process steps, the hybrid drain design forms a $\Gamma$-shaped electrode to smooth the electric field distribution at the drain side, which improves the breakdown voltage and lowers the leakage current. In addition, the hybrid drain provides an auxiliary current path and decreases the on -resistance, in contrast to the devices with a pure Schottky drain. Compared with the conventional ohmic drain devices, the breakdown voltage could be improved up to 64.9%, and the leakage current is suppressed by one order of magnitude without degradation of the specific on-resistance.
    Article · Jul 2012
    • "1. Schottky-drain metallization 2. Substrate removal 3. Dual gate transisors 3. Schottky-Drain Technology To maximize the breakdown voltage of GaN power transistors for a given thickness of the buffer region, it is important to engineer the electric field in the drain access region in a way that it is as uniform as possible. Our group has recently developed a new drain contact technology based on a Schottky metallization that significantly increases the device breakdown voltage[4] "
    [Show abstract] [Hide abstract] ABSTRACT: Between 5 and 10% of the world's electricity is wasted as dissipated heat in the power electronic circuits needed, for example, in computer power supplies, motor drives or the power inverters of photovoltaic systems. This paper describes how the unique properties of GaN enables a new generation of power transistors has the potential to reduce by at least an order of magnitude the cost, volume and losses of power electronic systems. We will describe three key technologies: Schottky drain contacts and substrate removal to increase the breakdown voltage, and a dual-gate device with superior enhancement-mode characteristics.
    Article · Oct 2010 · IEEE Electron Device Letters
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