Synchronization with timing recovery loop in UHF RFID reader receivers
DOI: 10.1109/ICECS.2010.5724720 Conference: 17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, Athens, Greece, 12-15 December, 2010
This paper focuses on synchronization of radio frequency identification (RFID) reader receivers, which plays a significant role for stability and efficiency of RFID systems. Performance of RFID reader suffers from a back-link-frequency variation of tags at a maximum of 22% according to widely used RFID standards. A new synchronization scheme employing timing recovery loop in RFID Reader Receivers is presented to solve the problem with less hardware cost. Simulation results give an improved performance compared with conventional schemes. The design is implemented on Xilinx Spartan-3E FPGA and function is verified on our RFID test platform.
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ABSTRACT: One key challenge for ultra-high frequency (UHF) radio-frequency identification (RFID) reader design is to demodulate the weak tag response signal which tends to be easily distorted and has considerable frequency deviations. In this paper, a baseband demodulator based on a matched filter (MF) is proposed to enhance the reliability of signal processing for the EPCglobal Class-1 Generation-2 (Gen2) RFID reader systems. The proposed demodulator is very robust against strong signal distortions and large frequency deviations happening on the received backscattered signal from a passive RFID tag. The validity and usefulness is demonstrated by both computer simulations and implementation experiments.
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