Conference Paper

Empty Resource Compaction Algorithms for Real-Time Hardware Tasks Placement on Partially Reconfigurable FPGAs Subject to Fault Ocurrence.

DOI: 10.1109/ReConFig.2011.34 Conference: 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011
Source: DBLP


This paper deals with online scheduling and allocation of real-time hardware tasks onto partially reconfigurable Xilinx FPGAS. We present a novel fault-aware online allocator which ensures the correctness of the computation by circumventing the permanent damage in the chip. The allocator is merged with an EDF-based scheduler to make up a highly-Reliable Reconfigurable Real-Time Operating System (R3TOS). The experiments carried out show that R3TOS misses 10% less deadlines and reduces the scheduling time overhead by over 90% compared with related approaches.

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Available from: Xabier Iturbe, Jan 22, 2014
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    • "Specifically for this scenario, we propose a novel EDF-based scheduling algorithm, two novel task allocation heuristics (EAC and EVC), and a novel task allocation strategy (called Snake). A preliminary description of EAC and EVC allocation heuristics has been presented in[7], while the Snake task allocation strategy has been firstly proposed in[8]. This article provides an extended explanation of these approaches as well as new experimental results in order to gain a better understanding of them. "
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    ABSTRACT: This paper describes a novel way to exploit the computation capabilities delivered by modern Field-Programmable Gate Arrays (FPGAs), not only towards a higher performance, but also towards an improved reliability. Computation-specific pieces of circuitry are dynamically scheduled and allocated to different resources on the chip based on a set of novel algorithms which are described in detail in this article. These algorithms consider most of the technological constraints existing in modern partially reconfigurable FPGAs as well as spontaneously occurring faults and emerging permanent damage in the silicon substrate of the chip. In addition, the algorithms target other important aspects such as communications and synchronization among the different computations that are carried out, either concurrently or at different times. The effectiveness of the proposed algorithms is tested by means of a wide range of synthetic simulations, and, notably, a proof-of-concept implementation of them using real FPGA hardware is outlined.
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    • "Previously we have proposed two novel algorithms for swappable hardware task placement: the Empty Area / Volume Compaction algorithms (EAC and EVC, respectively) [11]. Both are aimed at dealing with fragmentation, trying to keep the empty resources adjacent. "
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    ABSTRACT: In this paper we present "Snake", a novel technique for allocating and executing hardware tasks onto partially reconfigurable Xilinx FPGAs. Snake permits to alleviate the bottleneck introduced by the Internal Configuration Access Port (ICAP) in Xilinx FPGAs, by reusing both intermediate partial results and previously allocated pieces of circuitry. Moreover, Snake considers often neglected aspects in previous approaches when making allocation decisions, such as the technological constraints introduced by reconfigurable technology and inter-task communication issues. As a result of being a realistic solution its implementation using real FPGA hardware has been successful. We have checked its ability to reduce not only the overall execution time of a wide range of synthetic reconfigurable applications, but also time overheads in making allocation decisions in the first place.
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