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Contactless testing: Possibility or pipe-dream?

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The traditionally wired interfaces of many electronic systems are in many applications being replaced by wireless interfaces. Testing of electronic systems (both integrated circuits and printed circuit boards) still requires physical electrical contact through probe needles and/or sockets. This paper addresses the state-of-the-art, options, and hurdles-still-to-take of contactless testing, which would resolve many test challenges due to shrinking size and pitch of pads and pins and inaccessibility of advanced assembly techniques as System-in-Package (SiP) and 3D stacked ICs.
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... Also, we review existing research on wireless testing, and discuss on-chip interconnect for three dimensional ICs (3D ICs) for comparison. Some of the material in this chapter appears in [45]. ...
... The limitations of direct-contact testing mostly derive from the physical contact between the wafer and the probe needles. If we could completely replace physical contacts with wireless communication, the foregoing problems could be greatly alleviated [45]. Wireless testing supports the flexibility of contact location as well, making both SIP testing and parallel testing possible. ...
... This enables the communicating circuits to consume relatively low power, and eliminates wave propagation effects like fading, reflection and phase shifting. If the distance between the transceivers is very small, near-field communication may be more efficient than RF communication due to its weak inter-channel interference [43] [45]. ...
Article
Integrated circuits (ICs) are usually tested during manufacture by means of automatic testing equipment (ATE) employing probe cards and needles that make repeated physical contact with the ICs under test. Such direct-contact probing is very costly and imposes limitations on the use of ATE. For example, the probe needles must be frequently cleaned or replaced, and some emerging technologies such as three-dimensional ICs cannot be probed at all. As an alternative to conventional probe-card testing, wireless testing has been proposed. It mitigates many of the foregoing problems by replacing probe needles and contact points with wireless communication circuits. However, wireless testing also raises new problems which are poorly understood such as: What is the most suitable wireless communication technique to employ, and how well does it work in practice? This dissertation addresses the design and implementation of circuits to support wireless testing of ICs. Various wireless testing methods are investigated and evaluated with respect to their practicality. The research focuses on near-field capacitive communication because of its efficiency over the very short ranges needed during IC manufacture. A new capacitive channel model including chip separation, cross-talk, and misalignment effects is proposed and validated using electro-magnetic simulation studies to provide the intuitions for efficient antenna and circuit design. We propose a compact clock and data recovery architecture to avoid a dedicated clock channel. An analytical model which predicts the DC-level fluctuation due to the capacitive channel is presented. Based on this model, feed-forward clock selection is designed to enhance performance. A method to select proper channel termination is discussed to maximize the channel efficiency for return-to-zero signaling. Two prototype ICs incorporating wireless testing systems were fabricated and tested with the proposed methods of testing digital circuits. Both successfully demonstrated gigahertz communication speeds with a bit-error rate less than 10^???11. A third prototype IC containing analog voltage measurement circuits was implemented to determine the feasibility of wirelessly testing analog circuits. The fabricated prototype achieved satisfactory voltage measurement with 1 mV resolution. Our work demonstrates the validity of the proposed models and the feasibility of near-field capacitive communication for wireless testing of ICs.
... Cette solution vise à réaliser une méthode de test sans contact complète pour les wafers. Le coeur de cette technique consiste en une antenne qui fonctionne en émetteur-récepteur [86], [87], [88]. ...
Thesis
Les étapes de test en production sont basées à ce jour sur des contrôles optiques (AOI), inspection des joints de soudures par Rayons-X (AXI), électriques (ICT) et tests fonctionnels. Face à la multiplication et à la miniaturisation des composants, la cohabitation de plusieurs technologies (numérique, analogique, radiofréquence, puissance…) sur le même PCB (Printed Circuit Board), les moyens de test listés précédemment ne sont plus suffisants pour répondre complètement aux exigences de couverture de tests en production, car peu performants et coûteux en temps de développement et de cycle de test.L'objectif de cette thèse CIFRE avec ACTIA Automotive en collaboration avec le laboratoire LAAS-CNRS est de définir une stratégie de test en production innovante et adaptée aux produits à forte densité en envisageant dans un premier temps toutes les techniques existantes ou à développer. Pour ce faire, nous avons abordé dans cette thèse, des améliorations à apporter aux méthodologies de test existantes et proposé également des approches de test utilisables en amont de la production des PCBAs (Printed Circuit Board Assemblies) à haute densité et à signaux rapides.Premièrement, nous avons introduit une nouvelle technique sans contact pour tester des PCBAs lorsque l’accès physique de test est très limité. La technique consiste à utiliser des sondes de champ magnétique proche, qui détectent la distribution de champ magnétique émanant de certains composants montés sur le PCB dans le but de tester leur présence sur la carte et leur valeur par la suite. Deuxièmement, une approche de test utilisant des signatures thermiques infrarouges est présentée. Cette technique peut détecter les défauts d’assemblage du composant tel que sa présence, sa valeur et dans certain cas son état de santé, ce qui permet de conclure sur l’état de défaut du PCBA. Afin d’évaluer la pertinence de ces deux techniques, plusieurs scénarios de défaut ont été considérés et analysés avec un algorithme de détection de valeurs aberrantes. Sur plusieurs cas, les défauts de fabrication sont discriminés avec des marges importantes, tout en tenant compte de la variabilité de spécification des composants.Finalement, une technique pour regagner de l’accessibilité de test sur des pistes de transmission de signal de haute fréquence est présentée. La technique consiste à utiliser de petites ouvertures dans le masque de soudure directement au-dessus des pistes portant des signaux digitaux. Les conducteurs exposés sont mis en contact avec une sonde à bout déformable, conducteur et anisotrope. La faisabilité industrielle de cette technique a été testée sur un prototype que nous avions développé en collaboration avec la filiale d’ACTIA Group : ACTIA Engineering Services.
... On the other hand, if the ATE is equipped with a wireless transceiver while the same wireless transceivers are deployed within the dies test vectors from the ATE will be received directly by the wireless nodes without the need for contact probe into each die in the wafer. However, to facilitate wafer testing using wireless nodes, power also need to be delivered to the DUT from the probe card wirelessly, which can be a major challenge [25]. We advocate a hybrid approach to be used for wafer testing in which power is transferred using contact probes while wireless nodes are used for faster test delivery. ...
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... Even though the characterisation of the core circuit is highly desired, it is mostly impossible to measure the output signals of these parts directly due to the imposed parasitics and loading effects of the contact pad and measurement facilities. The use of contactless measurements becomes increasingly significant for such core circuits, without the need for pads connected to the core circuit manufactured [1,[5][6][7]. However, most of the contactless measurement techniques are developed for deployment at Printed Circuit Board (PCB) level [8,9]. ...
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This paper presents a bridged contactless measurement technique that can measure the resonant frequency and quality factor of a fully-integrated powered off voltage-controlled oscillator (VCO). Unlike the use of the conventional two-coil inductive link, the proposed technique uses an additional inductor to bridge the coupling between the LC tank and the external inductor serving measurement purposes. This makes it possible to examine the on-chip high frequency oscillator with an off-chip inductor at Printed Circuit Board (PCB) level. As an example, a K-band VCO as well as the proposed test structure have been designed and simulated using 0.13 μm CMOS technology. The quality factor and operating frequency of the oscillator are measured using the proposed contactless technique through extraction from the frequency response of a bridged inductive link. The efficiency of the method has been validated by full wave electromagnetic simulation. As a reference, the characterization of the oscillator is also obtained using the Cadence Spectre RF and Mentor Graphic’s Calibre PEX commercial Electronic Design Automation (EDA) software. The results of these two solutions agree considerably well, which supports the feasibility and potentials of using this technique for contactless measurements.
... Wireless testing aims to replace probe needles with contactless circuits that link the wafer and ATE. Efforts are also spent on contact-less testing [20], which by definition does not cause any probe damage. The potential technologies for wireless testing include radio-frequency (RF), near-field, and optical communication. ...
Article
This second part addresses a selection of topics related to Electromagnetic interference (EMI) issues in three-dimensional integrated components. Details about Through Silicon Via (TSV) technology, modelling and parasitic effects are introduced in the first part, then key concepts such as signal integrity (SI), power integrity (PI), and Electromagnetic Interference are introduced.
... Antenna is very important and critical element in many RF applications, wireless communications, integrated passive devices (IPD), and power harvesting systems. High-gain antenna is required to overcome the limited output power of the silicon-based transmitter and the great free-space propagation loss at very high frequencies as the output power of transmitter antenna and the receiver antenna sensitivity are limited by the breakdown voltage and noise factor of CMOS transistors [6]- [10]. ...
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