Conference Paper

Iterative OPDD Based Signal Probability Calculation.

Comput. Eng. Res. Center, Texas Univ., Austin, TX
DOI: 10.1109/VTS.2006.43 Conference: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA
Source: DBLP


This paper presents an improved method to accurately estimate signal probabilities using ordered partial decision diagrams (OPDDs) [Kodavarti 93] for partial representation of the functions at the circuit lines. OPDDs which are limited to a certain maximum number of nodes are built iteratively with different variable orderings to efficiently explore different regions of the function. Signal probability bounds (upper and lower) are computed from the OPDDs. From each OPDD, information is extracted to tighten the signal probability bound and guide the variable ordering for the next OPDD. By restricting the size of each OPDD to a small number of nodes, they can be constructed and processed quickly to obtain a fast and accurate estimate of signal probabilities. Experimental results demonstrate the effectiveness of the approach compared with existing methods

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    • "One such technique is the cutting algorithm by [20], which cuts fanout lines in the circuit to make the circuit a forest, and assigns a bound [0] [1] to the cut lines, then propagates the probability bounds to the primary outputs. Another technique for computing signal probability bound is to use ordered partial decision diagrams (OPDDs) as described in [21]. In our work, we are interested in the probability value instead of the probability bound. "
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