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[Show abstract][Hide abstract]ABSTRACT: In this paper the development of a smart imaging core following a SystemC-based design flow is presented. The smart imaging
core integrates an ARM processor and two specific hardware blocks for image processing: a smart imaging coprocessor and a
motion estimation coprocessor. A SystemC-based design flow is applied, comprising the design, synthesis and verification and
synthesis of the two coprocessors, as well as the development and integration of the embedded software on the smart imaging
core. The two coprocessors are successfully modeled and refined from C/C++-based algorithmic descriptions down to architecture
reference models using SystemC and TLM concepts. For the RTL implementation of the coprocessor hardware high-level synthesis
tools are used. The applied SystemC-based design flow enabled the iterative refinement of the architecture towards an optimal
RTL implementation. Furthermore, the use of SystemC TLM supports the integration of fast functional models of the coprocessors
on a virtual prototype platform of the target architecture. This virtual prototype is beneficially used during the embedded
software development phase.
Preview · Article · Aug 2005 · Design Automation for Embedded Systems