Spiking neural network-based auto-associative memory using FPGA interconnect delays

Conference Paper · December 2011with5 Reads
DOI: 10.1109/FPT.2011.6132701 · Source: DBLP
Conference: 2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011

    Abstract

    This paper describes the design of an auto-associative memory based on a spiking neural network (SNN). The architecture is able to effectively utilize the massive interconnect resources available in FPGA architectures as a good match to the axons in biological neural networks. A complete implementation of the memory on a single FPGA is presented. The signal processing circuitry is composed from simple, parallel building blocks and the training logic is implemented using an on-chip soft processor.