Conference Paper

Low power single electron OR/NOR gate operating at 10GHz

DOI: 10.1109/ISVLSI.2010.78 Conference: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2010, 5-7 July 2010, Lixouri Kefalonia, Greece
Source: DBLP


The design and simulation of a single-electron OR/NOR gate is being presented using a Monte Carlo based tool. Both the OR/NOR behavior and the stability were verified while the free energy behavior of the circuit was also examined. The results confirmed that the circuit behaved as an OR/NOR gate, depicting improved characteristics than previously published single electron OR circuits, achieving a really fast operational speed at low power. Moreover, the noise through the circuit was nearly diminished, while a stable behavior of the circuit was verified without any noise present at the output points.

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Available from: Nikos Konofaos, Jul 03, 2014
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