A Study on the Design of Floating-Point Functions in FPGAs

Conference Paper · September 2003with17 Reads
DOI: 10.1007/978-3-540-45234-8_137 · Source: DBLP
Conference: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings

    Abstract

    Floating-Point Operations represent a common task in a variety of applications, but such operations often result in a bottleneck,
    due to the large number of machine cycles required to compute them. Even though the FPGA community has developed advanced
    algorithms to improve the speed of FLOPs, floating-point transcendental functions are still underdeveloped. In this paper,
    we discuss some of the tradeoffs faced when implementing floating-point functions in FPGAs. These techniques, including lookup
    tables, and CORDIC algorithms, have been used in the past for the implementation of fixed-point analytic functions. This paper
    seeks to apply those methods to floating-point functions. The implementation results from different versions of a floating-point
    sine function are summarized in terms of speed, area, and accuracy to understand the effect of different architectural alternatives.