Yvon Savaria

Yvon Savaria
Polytechnique Montréal · Department of Electrical Engineering

PhD

About

622
Publications
52,111
Reads
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3,849
Citations
Additional affiliations
September 1985 - present
Polytechnique Montréal
Position
  • Professor (Full)
May 1985 - present
Polytechnique Montréal
Position
  • Professor (Full)
May 1985 - present
Polytechnique Montréal
Position
  • Professor (Full)

Publications

Publications (622)
Article
Programmable network data planes have extended the capabilities of packet processing in network devices by allowing custom processing pipelines and agnostic packet processing. While a variety of applications can be implemented on current programmable data planes, there are significant constraints due to hardware limitations. One way to meet these c...
Article
Full-text available
This paper presents a method to monitor the thermal peaks that are major concerns when designing Integrated Circuits (ICs) in various advanced technologies. The method aims at detecting the thermal peak in Systems on Chip (SoC) using arrays of oscillators distributed over the area of the chip. Measured frequencies are mapped to local temperatures t...
Conference Paper
Full-text available
Epilepsy is a life-threatening disease affecting millions of people all over the world. Artificial intelligence epileptic predictors offer excellent potential to improve epilepsy therapy. Particularly, deep learning models such as convolutional neural networks (CNN) can be used to accurately detect ictogenesis through deep structured learning repre...
Preprint
In this paper we study the effects of quantization in DNN training. We hypothesize that weight quantization is a form of regularization and the amount of regularization is correlated with the quantization level (precision). We confirm our hypothesis by providing analytical study and empirical results. By modeling weight quantization as a form of ad...
Preprint
Memristors enable the computation of matrix-vector multiplications (MVM) in memory and, therefore, show great potential in highly increasing the energy efficiency of deep neural network (DNN) inference accelerators. However, computations in memristors suffer from hardware non-idealities and are subject to different sources of noise that may negativ...
Preprint
Full-text available
Recent efforts in deep learning show a considerable advancement in redesigning deep learning models for low-resource and edge devices. The performance optimization of deep learning models are conducted either manually or through automatic architecture search, or a combination of both. The throughput and power consumption of deep learning models str...
Article
We present in this paper design considerations and implementation challenges of a proposed versatile SoC/SiP sensor interface intended for industrial applications. The proposed interface involves high-voltage circuits such as class-D power amplifiers, gate drivers, level shifters, and electrical isolators. Also, it includes low-voltage blocks like...
Article
One of the most important topics in the field of wireless sensor networks is the development of approaches to improve network lifetime. In this paper, an energy-efficient control and routing protocol for wireless sensor networks is presented. This algorithm is based on reinforcement learning for energy management in the network. This protocol seeks...
Article
A miniaturized biosensor for carbamazepine (CBZ) detection and quantification was designed, implemented and fabricated. The 11 mm2 CMOS chip was packaged and coupled with a 3-electrode electrochemical cell. A complete characterization of the sensor was conducted via two steps: 1) Molecular imprinting of PEDOT polymer sites by cyclic voltammetry (CV...
Article
Full-text available
One of the most important features of solid-state drives (SSDs) is the ability to update data sectors out of place, performing garbage collection operations within its physical blocks, to mitigate limited flash memory lifespan. In SSDs, a firmware called the Flash Translation Layer (FTL) is used to hide such features from the operating system. One...
Article
Full-text available
As a wide bandgap semiconductor, Gallium Nitride (GaN) device proves itself as a suitable candidate to implement high temperature (HT) integrated circuits. GaN500 is a technology available from the National Research Council of Canada to serve RF applications. However, this technology has the potential to boost HT electronics to higher ranges of ope...
Article
Full-text available
Abstract A self‐timed microarchitecture called KeyRing is presented, and a method for implementing KeyRing circuits compatible with a timing‐driven electronic design automation (EDA) flow is discussed. The KeyRing microarchitecture is derived from the AnARM, a low‐power self‐timed ARM processor based on ad hoc design principles. First, the unorthod...
Article
Full-text available
Nowadays, many industries are in favor of using intelligent design-space exploration as opposed to brute-force analysis. In many applications, the design-space is defined by multiple variables and their interactions. Although brute-force analysis is very simple, it is rarely scalable when the number of variables in the system increases. With the ri...
Article
This paper proposes and validates a low complexity multichannel ring-oscillator based Time-to-Digital Converter (TDC) architecture for field programmable gate arrays (FPGAs). Channels of that TDC are mainly composed of Look-Up Tables (LUTs) configured as embedded memories. The channels share a same ring oscillator. A previously proposed delay tunin...
Conference Paper
This paper evaluates the thermal and thermo-mechanical behavior of a packaged sensor interface embedding several high and low-voltage integrated circuits (ICs). The main objective of this study is to apply a numerical procedure to evaluate the fatigue strength of the layers and materials that, in general, represent one of the weakest parts of integ...
Article
Full-text available
Radio frequency energy harvesting (RFEH) is very attractive for the Internet of things (IoT) and self-powered micro-systems such as wearable biomedical devices and wireless sensor networks. This paper proposes, analyzes, and implements a new RF-DC converter in standard 130 nm CMOS technology. The developed converter is designed and optimized for ul...
Conference Paper
System in Package (SiP) is widely used to miniaturize electronic systems and increase their level of integration. Since reliability and lifetime estimation depend critically on accuracy of thermal models and temperature of inter-layers that constitute the SiP, a Foster based model is proposed to achieve this purpose. In this model, heat transfer be...
Conference Paper
This paper presents a barrel RISC-V processor designed to control a deep neural network accelerator. Our design has a 5-stage pipeline data path with 8 hardware threads (harts). Each thread is executed under a strict round robin scheduler and is responsible for providing data and control signals to a neural network processing element (PE). Each PE...
Article
Power consumption is an important limitation in designing analog-to-digital converters (ADCs) used in low-power sensing applications. This paper estimates analytically the power bound of a two-step multi-stage noise-shaping successive-approximation-register incremental ADC (two-step MASH NS-SAR IADC) proposed in our previous work. Our model conside...
Article
Breathing rate monitoring is a must for hospitalized patients with the current coronavirus disease 2019 (COVID-19). We review in this paper recent implementations of breathing monitoring techniques, where both contact and remote approaches are presented. It is known that with non-contact monitoring, the patient is not tied to an instrument, which i...
Preprint
Full-text available
The P4 language has drastically changed the networking field as it allows to quickly describe and implement new networking applications. Although a large variety of applications can be described with the P4 language, current programmable switch architectures impose significant constraints on P4 programs. To address this shortcoming, FPGAs have been...
Conference Paper
The P4 language has drastically changed the networking field as it allows to quickly describe and implement new networking appli- cations. Although a large variety of applications can be described with the P4 language, current programmable switch architectures impose significant constraints on P4 programs. To address this shortcoming, FPGAs have be...
Article
Full-text available
Convolutional Neural Networks (CNNs) have a major impact on our society, because of the numerous services they provide. These services include, but are not limited to image classification, video analysis, and speech recognition. Recently, the number of researches that utilize FPGAs to implement CNNs are increasing rapidly. This is due to the lower...
Article
Full-text available
This paper presents a wireless power and downlink data transfer system for medical implants operating over a single 10 MHz inductive link. The system is based on a Carrier Width Modulation (CWM) scheme for high-speed communication and efficient power delivery using a novel modulator circuit design. Unlike conventional modulation techniques, the dat...
Article
Full-text available
In this study, a method for fine adjustment of Xilinx field programmable gate array (FPGA) routing delays is proposed and applied to improve the linearity of an unbalanced multi‐measurement time‐to‐digital converter (TDC). The delay control method increases load capacitances of interconnect points of switch matrices by small amounts using additiona...
Article
Full-text available
This paper proposes a real-time thermal monitoring method using embedded integrated sensor interfaces dedicated to industrial integrated system applications. Industrial sensor interfaces are complex systems that involve analog and mixed signals, where several parameters can influence their performance. These include the presence of heat sources nea...
Article
We present the first Gallium Nitride (GaN)-based demodulator system dedicated to demodulating Load-Shift Keying (LSK) modulated signals that can operate at high temperature (HT). GaN500 technology is adopted to implement the proposed demodulator. Stable DC output characteristics of epitaxial AlGaN/GaN Heterojunction Field Effect Transistors (HFETs)...
Conference Paper
Full-text available
The emergence of P4, a domain specific language , coupled to PISA, a domain specific architecture, is revolutionizing the networking field. P4 allows to describe how packets are processed by a programmable data plane, spanning ASICs and CPUs, implementing PISA. Because the processing flexibility can be limited on ASICs, while the CPUs performance f...
Preprint
Full-text available
The emergence of P4, a domain specific language, coupled to PISA, a domain specific architecture, is revolutionizing the networking field. P4 allows to describe how packets are processed by a programmable data plane, spanning ASICs and CPUs, implementing PISA. Because the processing flexibility can be limited on ASICs, while the CPUs performance fo...
Preprint
Full-text available
Convolutional Neural Networks (CNNs) have a major impact on our society because of the numerous services they provide. On the other hand, they require considerable computing power. To satisfy these requirements, it is possible to use graphic processing units (GPUs). However, high power consumption and limited external IOs constrain their usability...
Article
Classical transition delay fault (TDF) model-based delay tests cannot detect small-delay defects (SDDs) properly in many circuits because they do not set the test slack properly to match the size of the tested delay fault. In this article, we propose a new method of using faster-than-at-speed clocks to enhance a classical TDF-based test pattern set...
Article
Full-text available
The productivity achieved when developing applications on high-performance reconfigurable heterogeneous computing (HPRHC) systems is increased by using the Open Computing Language (OpenCL). However, the hardware produced by OpenCL compilers in field-programmable gate arrays (FPGAs) can result in severe performance bottlenecks that are challenging t...
Preprint
Full-text available
Deep neural networks (DNNs) depend on the storage of a large number of parameters, which consumes an important portion of the energy used during inference. This paper considers the case where the energy usage of memory elements can be reduced at the cost of reduced reliability. A training algorithm is proposed to optimize the reliability of the sto...
Article
Full-text available
The current method of designing robust digital circuits requires running analysis and simulations over multiple process-voltage-temperature (PVT) points to meet the design specifications. However, in small-delay defect (SDD) testing, the computation of the SDD test quality uses a single PVT point. This makes it less accurate to describe the test qu...
Article
Full-text available
In this paper, we present a new Carrier Width Modulation (CWM) scheme for simultaneous transfer of power and data over a single inductive link. An ultra-low power CWM demodulator is also proposed. Unlike conventional demodulators for a similar modulation scheme, the proposed CWM circuit allows higher-speed demodulation and simple implementation. It...
Chapter
Model quantization is leveraged to reduce the memory consumption and the computation time of deep neural networks. This is achieved by representing weights and activations with a lower bit resolution when compared to their high precision floating point counterparts. The suitable level of quantization is directly related to the model performance. Lo...
Article
Full-text available
In this paper, we present a fast hybrid priority queue architecture intended for scheduling and prioritizing packets in a network data plane. Due to increasing traffic and tight requirements of high-speed networking devices, a high capacity priority queue, with constant latency and guaranteed performance is needed. We aim at reducing latency to bes...
Preprint
Model quantization is leveraged to reduce the memory consumption and the computation time of deep neural networks. This is achieved by representing weights and activations with a lower bit resolution when compared to their high precision floating point counterparts. The suitable level of quantization is directly related to the model performance. Lo...
Article
Full-text available
Flexibility is one mandatory aspect of channel coding in modern wireless communication systems. Among other things, the channel decoder has to support several code lengths and code rates. This need for flexibility applies to polar codes that are considered for control channels in the future 5G standard. This paper presents a new generic and flexibl...
Article
The aim of the present work is to mitigate the problem of high power demand peak and load oscillations in the operation of a large population of thermostatically controlled loads (TCLs) operated by Model Predictive Control (MPC) at the TCL level. Two desynchronized MPC schemes are introduced: adding random delays in reference signals and extra pena...