Yacov Shneider

Yacov Shneider
Technion - Israel Institute of Technology | technion · Faculty of Electrical Engineering

MS

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12
Publications
3,163
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83
Citations
Additional affiliations
January 2006 - March 2015
Technion - Israel Institute of Technology
Position
  • Chief enginner

Publications

Publications (12)
Article
Full-text available
We present a planar three terminal device fabricated on a silicon-on-insulator substrate. The device is based on a two-layer dielectric stack comprising SiO2 tunneling and HfO2 layers. A so-called gate electrode is placed between two other contacts, of the source and drain, all deposited on the insulator stack. In the dark as well as under illumina...
Article
Full-text available
We propose and demonstrate planar metal-insulator-semiconductor-metal photodetectors fabricated on a silicon-on-insulator substrate with an n-type silicon device layer. The gate insulator comprises a double layer dielectric stack of SiO 2 and HfO 2 . Detectors with different electrode geometries were characterized in a wide wavelength range: from 2...
Article
Full-text available
A metal–insulator–metal (MIM) capacitor was developed herein with an atomic layer deposition-fabricated hafnia aluminate (HfAlOx) dielectric layer. A preparation flow combining pre- and post-deposition treatment yielded a device with increased capacitance density and excellent dielectric integrity that can be employed in front-end and back-end of l...
Article
Full-text available
We describe a new metal-insulator-semiconductor (MIS) device in which cobalt based nano particles (NPs) in a core-shell structure (Co–core and Co3O4-shell) are embedded between a thermally grown SiO2 layer and a HfO2 film deposited by atomic layer deposition. Two additional structures were prepared for comparison. One had no NPs and the other inclu...
Article
Hole trapping was studied in the Al2O3-SiO2 (A-O) dielectric stack developed for HV CMOS and nonvolatile memory (NVM) applications. Pt electrode blocked the electron injection from the gate. Holes tunneling from the p-type Si substrate through the thermal silicon oxide layer (40 A) are trapped in the alumina layer (80 A) and result in the shift of...
Article
Full-text available
We describe a new type of optically sensitive tunable capacitor with a wide band response ranging from the ultraviolet (245 nm) to the near infrared (880 nm). It is based on a planar Metal-OxideSemiconductor (MOS) structure fabricated on an insulator on silicon substrate where the insulator layer comprises a double layer dielectric stack of SiO2-Hf...
Article
Full-text available
We describe a new type of optically sensitive tunable capacitor with a wide band response ranging from the ultraviolet (245 nm) to the near infrared (880 nm). It is based on a planar Metal-Oxide- Semiconductor (MOS) structure fabricated on an insulator on silicon substrate where the insulator layer comprises a double layer dielectric stack of SiO2-...
Article
Full-text available
We describe a new type of optically sensitive tunable capacitor with a wide band response ranging from the ultraviolet (245 nm) to the near infrared (880 nm). It is based on a planar Metal-Oxide-Semiconductor (MOS) structure fabricated on an insulator on silicon substrate where the insulator layer comprises a double layer dielectric stack of SiO2-H...
Article
Full-text available
A high sensitivity photo-detector operating in the 245 to 880 nm wavelength range is reported. It is based on a planar Metal-Oxide-Semiconductor (MOS) structure fabricated on an insulator on silicon substrate where the insulator layer comprises a double layer dielectric stack of SiO2-HfO2. The MOS detector undergoes a voltage stress process after w...
Article
Full-text available
An optically triggered nonvolatile memory based on platinum nano-particles embedded within a SiO2 and HfO2 dielectric stack on a silicon on insulator (SOI) substrate is presented. The memory cell exhibits a very wide spectral response, from 220 nm to 950 nm; much wider than common photo-detectors fabricated on SOI. It offers several functionalities...
Article
Full-text available
We report on the structural and electrical characteristics of non-volatile memory (NVM) transistors and capacitors that use Pt nanocrystals (NCs) for charge storage. The transistor exhibits a memory window of 0.6 V for a sweep of ±2.5 V which increases to 11.5 V at ±10 V. The trapped charges (electron and hole) density for a ±10 V write/erase signa...
Article
Full-text available
We demonstrate a low voltage nonvolatile memory field effect transistor comprising thermal SiO2 tunneling and HfO2 blocking layers as the gate dielectric stack and Au nanocrystals as charge storage nodes. The structure exhibits a memory window of similar to 2 V at an applied sweeping voltage of +/- 3 V which increases to 12.6 at +/- 12 V. Retention...

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