Vladimir L. Petrović

• PhD
• Assistant Professor at University of Belgrade

In this paper we present analysis of area efficiency of conventional binary-weighted and split-capacitor topologies of switched-capacitor DAC for SAR ADC. Although the main reason for usage of split-capacitor topologies is reducing the DAC's area, the analysis showed that it is not always the case since the linearity parameters of split-capacitor t...

This paper presents a novel algorithm for the estimation of heart rate variability (HRV) features using 24-GHz continuous-wave Doppler radar with quadrature architecture. The proposed algorithm combines frequency and time domain analysis for high-accuracy estimation of beat-to-beat intervals (BBIs). Initially, band pass filtered in-phase (I) and qu...

The measurement of human vital signs is a highly important task in a variety of environments and applications. Most notably, the electrocardiogram (ECG) is a versatile signal that could indicate various physical and psychological conditions, from signs of life to complex mental states. The measurement of the ECG relies on electrodes attached to the...

5G new radio supports a variety of new technologies and services, demanding significant improvements in radio access network (RAN) latency, throughput, and flexibility. Disaggregation addresses these challenges by splitting the RAN into network units – central (CU), distributing (DU), and radio (RU), enabling data processing virtualization and impl...

Cilj ovog rada je da se kroz analizu performansi kontrole grešaka najčešće korišćenih algoritama dekodovanja 5G NR LDPC (kodovi sa proverama parnosti male gustine (engl. low-density parity-check)) kodova i njihove hardverske kompleksnosti preporuče optimalni algoritam i bitske širine koje daju najbolji odnos performansi kontrole grešaka i upotreblj...

Software defined radio (SDR) brought flexibility and easier development to the design of telecommunication systems. However, achieving real-time performance with SDR using general purpose processors (GPP) is still a challenging topic. We have examined performance of SDR DVB-S2X transmitter implemented in GNU Radio framework using a multi-core proce...

Serbian: U disertaciji su predložena brza, fleksibilna i hardverski efikasna rešenja za kodovanje i dekodovanje izuzetno neregularnih kodova sa proverama parnosti male gustine (engl. low-density parity-check, LDPC, codes) zahtevana u savremenim komunikacionim standardima. Jedan deo doprinosa disertacije je u novoj delimično paralelnoj arhitekturi...

This paper presents a novel approach for the reduced-complexity Min-Sum (MS) decoding of low density parity check (LDPC) codes in the partially parallel layered decoder architecture, which contains a large number of serial check node processors. Reduced complexity is obtained by using the variant of the single-minimum Offset Min-Sum (smOMS) algorit...

Quasi-cyclic low-density parity-check (QC–LDPC) codes are introduced as a physical channel coding solution for data channels in 5G new radio (5G NR). Depending on the use case scenario, this standard proposes the usage of a wide variety of codes, which imposes the need for high encoder flexibility. LDPC codes from 5G NR have a convenient structure...

This paper presents a novel approach for the reduced-complexity Min-Sum (MS) decoding of low density parity check (LDPC) codes in the partially parallel layered decoder architecture, which contains large number of serial check node processors. Reduced complexity is obtained by using the variant of the single-minimum Offset Min-Sum (smOMS) algorithm...

Non-contact detection of heartbeat and breathing rate has great potential for various applications (health systems, sleep studies, rescue, motion detection/correction etc.). One of the most promising ways for non-contact physiological measurement is using Doppler radar technology. This paper presents the design of the system for evaluation of Doppl...

In this paper we propose a method for real-time blob detection in large images with low memory cost. The method is suitable for implementation on the specialized parallel hardware such as multi-core platforms, FPGA and ASIC. It uses parallelism to speed-up the blob detection. The input image is divided into blocks of equal sizes to which the maxima...

We propose a method for real-time blob detection in large images by exploiting parallelism in computation which can be easily obtained in a specialized hardware (multi-core platforms, FPGA, ASIC). In this method, image is divided into blocks of equal size to which a maximally stable extremal regions (MSER) blob detector is applied in parallel. Para...

In this paper energy-aware embedded system simulator is presented. Simulation model supports describing behavior of different hardware and software subsystems and power and performance management algorithms. Using presented simulator, two algorithms with different optimization goals were tested: power management of single processor using Dynamic Fr...