Stefano di Matteo- Doctor of Engineering
- Tenure Track Researcher at Atomic Energy and Alternative Energies Commission
Stefano di Matteo
- Doctor of Engineering
- Tenure Track Researcher at Atomic Energy and Alternative Energies Commission
Research Engineer (Tenure Track) - CEA Leti/List in Grenoble
- Hardware Implementation of Post-Quantum Cryptography
About
23
Publications
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Introduction
Current institution
Additional affiliations
CEA
Position
- Research Engineer
Description
- Leader of the Chaire "Hardware Implementation of Post-Quantum Cryptography" in the PQ-TLS project (within the PEPR Quantique)
Publications
Publications (23)
The Firmware Over-The-Air (FOTA) technology aims at updating the firmware of mobile computing devices via wireless. In the automotive industry, FOTA can keep the firmware of the various electronic controllers up-to-date without any manual intervention, so that to improve the operational performance and quickly fix the security vulnerabilities of ve...
This paper presents a cycle-accurate verification environment for the Crypto-Tile, a cryptographic accelerator integrated into the EPI General Purpose Processor. The focus of this work is to provide a robust methodology for validating the functionality and performance of the Crypto-Tile. The verification environment includes an in-depth examination...
Recently, there has been a growing interest in Physically Unclonable Functions (PUFs). These electronic circuits possess several key characteristics such as unpredictability and uniqueness that make them particularly attractive for security applications. PUFs offer an appealing solution for secure boot applications, providing a hardware-based mecha...
This paper presents the design and FPGA implementation of a hardware accelerator for the Post-Quantum CRYSTALS-Kyber and CRYSTALS-Dilithium algorithms, named CRYPHTOR (CRYstals Polynomial HW acceleraTOR). The proposed architecture includes a unified memory arrangement and dedicated ALUs for Kyber and Dilithium, capable of accelerating several polyn...
When designing a resilient computing system, the desired degree of Reliability, Availability, and Serviceability (RAS) must be assessed and guaranteed. This article presents a Hardware-Software (HW-SW) Interface for Error Logging and Reporting independent of specific Instruction Set Architectures (ISA), aiming to improve RAS in computing systems. A...
Cyberattacks and cybercriminal activities constitute one of the biggest threats in the modern digital era, and the frequency, efficiency, and severity of attacks have grown over the years. Designers and producers of digital systems try to counteract such issues by exploiting increasingly robust and advanced security mechanisms to provide secure exe...
p>This article presents a Hardware-Software (HWSW) Interface for Error Logging and Reporting, whose aim is to improve Reliability, Availability, and Serviceability (RAS) in both 32- and 64-bit RISC-V architectures. A HW-SW Interface defines the facilities by which detected hardware errors are logged into an ad hoc set of registers (i.e., error reco...
Ring learning with errors (RLWE) is largely adopted in Post-Quantum cryptography and Homomorphic encryption schemes. RLWE cryptosystems are defined over polynomial quotient rings, where polynomial additions/subtractions and multiplication are required. In this paper we propose the implementation of a hardware accelerator for polynomial operations r...
Random number generators are a key element for various applications, such as computer simulation, statistical sampling, and cryptography. They are used to generate/derive cryptographic keys and non-repeating values, e.g., for symmetric or public key cyphers. The strength of a data protection system against cyber attacks corresponds to the strength...
This work describes the hardware implementation of a cryptographic accelerators suite, named Crypto-Tile, in the framework of the European Processor Initiative (EPI) project. The EPI project traced the roadmap to develop the first family of low-power processors with the design fully made in Europe, for Big Data, supercomputers and automotive. Each...
Homomorphic Encryption (HE) allows performing specific algebraic computations on encrypted data without the need for decryption. For this reason, HE is emerging as a strong privacy-preserving solution in cloud computing environments since it allows to keep data secure even in the case the cloud server is not trusted. HE libraries such as Microsoft...
Self-propelled wheelchairs are challenging to drive on off-road routes or require enormous physical effort in situations where the gradient exceeds 8%. For most people, these situations are too strenuous and therefore impractical. This work presents an innovative plug-and-play system to electrify a manual wheelchair. With the constraint of not irre...
Digital designs complexity has exponentially increased in the last decades. Heterogeneous Systems-on-Chip integrate many different hardware components which require a reliable and scalable verification environment. The effort to set up such environments has increased as well and plays a significant role in digital design projects, taking more than...
In the cybersecurity field, the generation of random numbers is extremely important because they are employed in different applications such as the generation/derivation of cryptographic keys, nonces, and initialization vectors. The more unpredictable the random sequence, the higher its quality and the lower the probability of recovering the value...
This paper presents a System-on-Chip (SoC) implementation of a cryptographic hardware accelerator supporting multiple AES based block cypher modes, including the more advanced CMAC, CCM, GCM and XTS modes. Furthermore, the proposed design implements in hardware advanced features for AES key secure storage. A flexible interface allows the communicat...
This article presents a cryptographic hardware (HW) accelerator supporting multiple advanced encryption standard (AES)-based block cipher modes, including the more advanced cipher-based MAC (CMAC), counter with CBC-MAC (CCM), Galois counter mode (GCM), and XOR-encrypt-XOR-based tweaked-codebook mode with ciphertext stealing (XTS) modes. The propose...
In recent years, public-key cryptography and digital signature have become fundamental components of digital infrastructures. Such a scenario has to face a new and increasing threat, represented by quantum computers. It is well known that quantum computers in the next years will be able to run algorithms capable of breaking the security of currentl...
Cybersecurity is a critical issue for Real-Time IoT applications since high performance and low latencies are required, along with security requirements to protect the large number of attack surfaces to which IoT devices are exposed. Elliptic Curve Cryptography (ECC) is largely adopted in an IoT context to provide security services such as key-exch...
Random numbers are widely employed in cryptography and security applications. If the generation process is weak, the whole chain of security can be compromised: these weaknesses could be exploited by an attacker to retrieve the information, breaking even the most robust implementation of a cipher. Due to their intrinsic close relationship with anal...
This paper proposes the architecture of the hash accelerator, developed in the framework of the European Processor Initiative. The proposed circuit supports all the SHA2 and SHA-3 operative modes and is to be one of the hardware cryptographic accelerators within the crypto-tile of the European Processor Initiative. The accelerator has been verified...
